github-mirror/linux
1
0
Fork 0
mirror of https://github.com/torvalds/linux.git synced 2026-06-05 13:06:59 +02:00
Code Issues Actions Packages Projects Releases Wiki Activity Graph

SoCFPGA DTS updates for v4.20

Browse Source 
- Rename de0_sockit to de0_nano_soc
 - Update NAND clocking
 - Set timer interrupt to edge sensitive
 - Stratix10 platform updates
   - Update devkit with correct i2c clock
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJbjqHuAAoJEBmUBAuBoyj0eQwP/2bD8hI2SajRVxmdoDFpEGS4
 uAUwe4Fb6UTEY5KeLsBbHAV7BUdkVJm7/5NO6TK5kyjtGH+T7LLKAH7BEzl7Lgs7
 TmtLstHHU0A6A9MaE3yPB4wGPtf0bSAgSCw9BWXnF0WxatCioYoCzDjC9kAk5D8V
 4wecm6C6+n++HsPB5kHFwagTPlzs53+W3jMFiwFWlPnGWGL8937bXa7rJEWzwCA3
 lewMShBIhX/2VpiN7DQ7F09/GULr40qcvmcIUftGsV59XbA7X55kJ/0J+dlL6+BF
 zYeFs3duiB36hv4w24t51mJeQSoYr94KTC5RjIeAAXYkgAlulTfZmTeHN24BCaj6
 OUsBS6vCM394icFYEkB3HW1oGIl8/hdft7Xxi90Kbuic5PKRES05RzrtnpsKp9kR
 in1uPJt7hrTIouok6/hNIg1x4ALaBUwBRwdngTVS2Z/1zktzAs5ZMBNyfAz0XRcj
 CmeRcK6dc3vZEl3rPT37YH8rWIh2AldszwmJv2gzVhyCxhqPyORR1bFCWSmelNT2
 GKewlsgQdEPMRMQ5WODfG97dd8bdd8vH6EG/ZjrrNV7lP6MVvXjbc+JtJ04IQaQC
 Z98Q8LlvK1gAOnoYPiOEn7fmIM4oSSQF3V8qwE6/I1VfxlKaAuBbdjsFCFh9ySb3
 UasHfuYazBCoTxGMUfTI
 =AelY
 -----END PGP SIGNATURE-----

Merge tag 'socfpga_updates_for_v4.20_part1' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into next/dt

SoCFPGA DTS updates for v4.20
- Rename de0_sockit to de0_nano_soc
- Update NAND clocking
- Set timer interrupt to edge sensitive
- Stratix10 platform updates
  - Update devkit with correct i2c clock

* tag 'socfpga_updates_for_v4.20_part1' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
  ARM: dts: socfpga: Rename socfpga_cyclone5_de0_{sockit,nano_soc}
  ARM: dts: socfpga: update NAND clocking for c5/a5
  ARM: dts: arria10: update NAND clocking
  ARM: dts: socfpga: set timer interrupt to edge sensitive
  ARM: dts: socfpga: use stdout-path for chosen node
  arm64: dts: stratix10: i2c clock running out of spec

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2018-09-04 10:35:04 -07:00
commit 7adb6bab28
7 changed files with 36 additions and 8 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
arch/arm/boot/dts/Makefile
View File

@ -892,7 +892,7 @@ dtb-$(CONFIG_ARCH_SOCFPGA) += \
socfpga_arria10_socdk_sdmmc.dtb \
socfpga_cyclone5_mcvevk.dtb \
socfpga_cyclone5_socdk.dtb \
socfpga_cyclone5_de0_sockit.dtb \
socfpga_cyclone5_de0_nano_soc.dtb \
socfpga_cyclone5_sockit.dtb \
socfpga_cyclone5_socrates.dtb \
socfpga_cyclone5_sodia.dtb \

12
arch/arm/boot/dts/socfpga.dtsi
View File

@ -483,10 +483,17 @@ nand_x_clk: nand_x_clk {
clk-gate = <0xa0 9>;
};
nand_ecc_clk: nand_ecc_clk {
#clock-cells = <0>;
compatible = "altr,socfpga-gate-clk";
clocks = <&nand_x_clk>;
clk-gate = <0xa0 9>;
};
nand_clk: nand_clk {
#clock-cells = <0>;
compatible = "altr,socfpga-gate-clk";
clocks = <&f2s_periph_ref_clk>, <&main_nand_sdmmc_clk>, <&per_nand_mmc_clk>;
clocks = <&nand_x_clk>;
clk-gate = <0xa0 10>;
fixed-divider = <4>;
};
@ -754,7 +761,8 @@ nand0: nand@ff900000 {
reg-names = "nand_data", "denali_reg";
interrupts = <0x0 0x90 0x4>;
dma-mask = <0xffffffff>;
clocks = <&nand_x_clk>;
clocks = <&nand_clk>, <&nand_x_clk>, <&nand_ecc_clk>;
clock-names = "nand", "nand_x", "ecc";
status = "disabled";
};

22
arch/arm/boot/dts/socfpga_arria10.dtsi
View File

@ -377,13 +377,28 @@ qspi_clk: qspi_clk {
clk-gate = <0xC8 11>;
};
nand_clk: nand_clk {
nand_x_clk: nand_x_clk {
#clock-cells = <0>;
compatible = "altr,socfpga-a10-gate-clk";
clocks = <&l4_mp_clk>;
clk-gate = <0xC8 10>;
};
nand_ecc_clk: nand_ecc_clk {
#clock-cells = <0>;
compatible = "altr,socfpga-a10-gate-clk";
clocks = <&nand_x_clk>;
clk-gate = <0xC8 10>;
};
nand_clk: nand_clk {
#clock-cells = <0>;
compatible = "altr,socfpga-a10-gate-clk";
clocks = <&nand_x_clk>;
fixed-divider = <4>;
clk-gate = <0xC8 10>;
};
spi_m_clk: spi_m_clk {
#clock-cells = <0>;
compatible = "altr,socfpga-a10-gate-clk";
@ -650,7 +665,8 @@ nand: nand@ffb90000 {
reg-names = "nand_data", "denali_reg";
interrupts = <0 99 4>;
dma-mask = <0xffffffff>;
clocks = <&nand_clk>;
clocks = <&nand_clk>, <&nand_x_clk>, <&nand_ecc_clk>;
clock-names = "nand", "nand_x", "ecc";
status = "disabled";
};
@ -760,7 +776,7 @@ sysmgr: sysmgr@ffd06000 {
timer@ffffc600 {
compatible = "arm,cortex-a9-twd-timer";
reg = <0xffffc600 0x100>;
interrupts = <1 13 0xf04>;
interrupts = <1 13 0xf01>;
clocks = <&mpu_periph_clk>;
};

0
arch/arm/boot/dts/socfpga_cyclone5_de0_sockit.dts → arch/arm/boot/dts/socfpga_cyclone5_de0_nano_soc.dts
View File

3
arch/arm/boot/dts/socfpga_cyclone5_socrates.dts
View File

@ -22,7 +22,8 @@ / {
compatible = "ebv,socrates", "altr,socfpga-cyclone5", "altr,socfpga";
chosen {
bootargs = "console=ttyS0,115200";
bootargs = "earlyprintk";
stdout-path = "serial0:115200n8";
};
memory@0 {

3
arch/arm/boot/dts/socfpga_cyclone5_vining_fpga.dts
View File

@ -54,7 +54,8 @@ / {
compatible = "samtec,vining", "altr,socfpga-cyclone5", "altr,socfpga";
chosen {
bootargs = "console=ttyS0,115200";
bootargs = "earlyprintk";
stdout-path = "serial0:115200n8";
};
memory@0 {

2
arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts
View File

@ -124,6 +124,8 @@ &watchdog0 {
&i2c1 {
status = "okay";
clock-frequency = <100000>;
i2c-sda-falling-time-ns = <890>; /* hcnt */
i2c-sdl-falling-time-ns = <890>; /* lcnt */
adc@14 {
compatible = "lltc,ltc2497";