Merge branch 'pci/bwctrl'

- Disable bwctrl on Intel P45 to avoid a boot hang (Ilpo Järvinen)

* pci/bwctrl:
  PCI/bwctrl: Disable BW controller on Intel P45 using a quirk
This commit is contained in:
Bjorn Helgaas 2026-02-06 17:09:14 -06:00
commit 7ac2359cf1
3 changed files with 14 additions and 0 deletions

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@ -250,6 +250,9 @@ static int pcie_bwnotif_probe(struct pcie_device *srv)
struct pci_dev *port = srv->port;
int ret;
if (port->no_bw_notif)
return -ENODEV;
/* Can happen if we run out of bus numbers during enumeration. */
if (!port->subordinate)
return -ENODEV;

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@ -1359,6 +1359,16 @@ static void quirk_transparent_bridge(struct pci_dev *dev)
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82380FB, quirk_transparent_bridge);
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_TOSHIBA, 0x605, quirk_transparent_bridge);
/*
* Enabling Link Bandwidth Management Interrupts (BW notifications) can cause
* boot hangs on P45.
*/
static void quirk_p45_bw_notifications(struct pci_dev *dev)
{
dev->no_bw_notif = 1;
}
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2e21, quirk_p45_bw_notifications);
/*
* Common misconfiguration of the MediaGX/Geode PCI master that will reduce
* PCI bandwidth from 70MB/s to 25MB/s. See the GXM/GXLV/GX1 datasheets

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@ -406,6 +406,7 @@ struct pci_dev {
user sysfs */
unsigned int clear_retrain_link:1; /* Need to clear Retrain Link
bit manually */
unsigned int no_bw_notif:1; /* BW notifications may cause issues */
unsigned int d3hot_delay; /* D3hot->D0 transition time in ms */
unsigned int d3cold_delay; /* D3cold->D0 transition time in ms */