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clk: renesas: r9a09g077: Use devm_ helpers for divider clock registration

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Convert the divider clock registration in the R9A09G077 CPG driver to use
device-managed (devm_) helper functions.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20251028165127.991351-4-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
This commit is contained in:
Lad Prabhakar 2025-10-28 16:51:25 +00:00 committed by Geert Uytterhoeven
parent 3b32a07584
commit 7a9d0318da
1 changed files with 16 additions and 14 deletions
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30
drivers/clk/renesas/r9a09g077-cpg.c
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@ -220,21 +220,23 @@ r9a09g077_cpg_div_clk_register(struct device *dev,
parent_name = __clk_get_name(parent);
if (core->dtable)
clk_hw = clk_hw_register_divider_table(dev, core->name,
parent_name, CLK_SET_RATE_PARENT,
addr,
GET_SHIFT(core->conf),
GET_WIDTH(core->conf),
core->flag,
core->dtable,
&pub->rmw_lock);
clk_hw = devm_clk_hw_register_divider_table(dev, core->name,
parent_name,
CLK_SET_RATE_PARENT,
addr,
GET_SHIFT(core->conf),
GET_WIDTH(core->conf),
core->flag,
core->dtable,
&pub->rmw_lock);
else
clk_hw = clk_hw_register_divider(dev, core->name,
parent_name, CLK_SET_RATE_PARENT,
addr,
GET_SHIFT(core->conf),
GET_WIDTH(core->conf),
core->flag, &pub->rmw_lock);
clk_hw = devm_clk_hw_register_divider(dev, core->name,
parent_name,
CLK_SET_RATE_PARENT,
addr,
GET_SHIFT(core->conf),
GET_WIDTH(core->conf),
core->flag, &pub->rmw_lock);
if (IS_ERR(clk_hw))
return ERR_CAST(clk_hw);