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drm/i915/dp: Introduce helper to check pixel rate against dotclock limits
Add intel_dp_dotclk_valid() helper, that checks the required pixel rate against platform dotclock limit. With joined pipes the effective dotclock limit depends upon the number of joined pipes. Call the helper from the mode_valid phase and from the compute_config phase where we need to check the limits for the given target clock for a given joiner candidate. v2: Rename the helper to intel_dp_dotclk_valid(). (Imre) Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Reviewed-by: Imre Deak <imre.deak@intel.com> Link: https://patch.msgid.link/20260202103731.357416-13-ankit.k.nautiyal@intel.com
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@ -1412,6 +1412,18 @@ bool intel_dp_can_join(struct intel_display *display,
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}
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}
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bool intel_dp_dotclk_valid(struct intel_display *display,
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int target_clock,
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int num_joined_pipes)
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{
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int max_dotclk = display->cdclk.max_dotclk_freq;
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int effective_dotclk_limit;
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effective_dotclk_limit = max_dotclk * num_joined_pipes;
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return target_clock <= effective_dotclk_limit;
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}
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static enum drm_mode_status
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intel_dp_mode_valid(struct drm_connector *_connector,
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const struct drm_display_mode *mode)
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@ -1474,8 +1486,6 @@ intel_dp_mode_valid(struct drm_connector *_connector,
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*/
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status = MODE_CLOCK_HIGH;
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for (num_joined_pipes = 1; num_joined_pipes <= I915_MAX_PIPES; num_joined_pipes++) {
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int max_dotclk = display->cdclk.max_dotclk_freq;
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if (connector->force_joined_pipes &&
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num_joined_pipes != connector->force_joined_pipes)
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continue;
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@ -1543,9 +1553,9 @@ intel_dp_mode_valid(struct drm_connector *_connector,
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if (status != MODE_OK)
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continue;
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max_dotclk *= num_joined_pipes;
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if (target_clock > max_dotclk) {
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if (!intel_dp_dotclk_valid(display,
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target_clock,
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num_joined_pipes)) {
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status = MODE_CLOCK_HIGH;
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continue;
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}
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@ -2776,12 +2786,10 @@ intel_dp_compute_link_for_joined_pipes(struct intel_encoder *encoder,
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const struct drm_display_mode *adjusted_mode =
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&pipe_config->hw.adjusted_mode;
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struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
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int max_dotclk = display->cdclk.max_dotclk_freq;
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struct link_config_limits limits;
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bool dsc_needed, joiner_needs_dsc;
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int ret = 0;
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max_dotclk *= num_joined_pipes;
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joiner_needs_dsc = intel_dp_joiner_needs_dsc(display, num_joined_pipes);
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dsc_needed = joiner_needs_dsc || intel_dp->force_dsc_en ||
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@ -2805,7 +2813,10 @@ intel_dp_compute_link_for_joined_pipes(struct intel_encoder *encoder,
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fxp_q4_from_int(pipe_config->pipe_bpp),
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0, false);
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if (ret || adjusted_mode->crtc_clock > max_dotclk)
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if (ret ||
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!intel_dp_dotclk_valid(display,
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adjusted_mode->crtc_clock,
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num_joined_pipes))
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dsc_needed = true;
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}
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@ -2831,7 +2842,9 @@ intel_dp_compute_link_for_joined_pipes(struct intel_encoder *encoder,
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if (ret < 0)
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return ret;
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if (adjusted_mode->crtc_clock > max_dotclk)
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if (!intel_dp_dotclk_valid(display,
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adjusted_mode->crtc_clock,
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num_joined_pipes))
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return -EINVAL;
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}
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@ -224,5 +224,8 @@ int intel_dp_sdp_min_guardband(const struct intel_crtc_state *crtc_state,
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int intel_dp_max_hdisplay_per_pipe(struct intel_display *display);
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bool intel_dp_can_join(struct intel_display *display,
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int num_joined_pipes);
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bool intel_dp_dotclk_valid(struct intel_display *display,
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int target_clock,
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int num_joined_pipes);
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#endif /* __INTEL_DP_H__ */
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@ -606,12 +606,10 @@ static int mst_stream_compute_link_for_joined_pipes(struct intel_encoder *encode
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&pipe_config->hw.adjusted_mode;
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struct intel_connector *connector =
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to_intel_connector(conn_state->connector);
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int max_dotclk = display->cdclk.max_dotclk_freq;
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struct link_config_limits limits;
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bool dsc_needed, joiner_needs_dsc;
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int ret = 0;
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max_dotclk *= num_joined_pipes;
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joiner_needs_dsc = intel_dp_joiner_needs_dsc(display, num_joined_pipes);
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dsc_needed = joiner_needs_dsc || intel_dp->force_dsc_en ||
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@ -625,7 +623,10 @@ static int mst_stream_compute_link_for_joined_pipes(struct intel_encoder *encode
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if (ret == -EDEADLK)
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return ret;
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if (ret || adjusted_mode->clock > max_dotclk)
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if (ret ||
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!intel_dp_dotclk_valid(display,
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adjusted_mode->clock,
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num_joined_pipes))
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dsc_needed = true;
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}
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@ -669,7 +670,9 @@ static int mst_stream_compute_link_for_joined_pipes(struct intel_encoder *encode
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if (ret)
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return ret;
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if (adjusted_mode->clock > max_dotclk)
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if (!intel_dp_dotclk_valid(display,
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adjusted_mode->clock,
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num_joined_pipes))
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return -EINVAL;
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}
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@ -1525,8 +1528,6 @@ mst_connector_mode_valid_ctx(struct drm_connector *_connector,
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*status = MODE_CLOCK_HIGH;
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for (num_joined_pipes = 1; num_joined_pipes <= I915_MAX_PIPES; num_joined_pipes++) {
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int max_dotclk = display->cdclk.max_dotclk_freq;
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if (connector->force_joined_pipes &&
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num_joined_pipes != connector->force_joined_pipes)
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continue;
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@ -1571,9 +1572,9 @@ mst_connector_mode_valid_ctx(struct drm_connector *_connector,
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if (*status != MODE_OK)
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continue;
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max_dotclk *= num_joined_pipes;
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if (mode->clock > max_dotclk) {
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if (!intel_dp_dotclk_valid(display,
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mode->clock,
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num_joined_pipes)) {
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*status = MODE_CLOCK_HIGH;
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continue;
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}
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