mirror of
https://github.com/torvalds/linux.git
synced 2026-05-28 17:13:52 +02:00
arm64: dts: realtek: add missing cache properties
As all level 2 and level 3 caches are unified, add required cache-unified and cache-level properties to fix warnings like: rtd1293-ds418j.dtb: l2-cache: 'cache-level' is a required property rtd1293-ds418j.dtb: l2-cache: 'cache-unified' is a required property Link: https://lore.kernel.org/r/20230421223151.115243-1-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
This commit is contained in:
parent
a0936e9edf
commit
7a242135a4
|
|
@ -30,6 +30,8 @@ cpu1: cpu@1 {
|
|||
|
||||
l2: l2-cache {
|
||||
compatible = "cache";
|
||||
cache-level = <2>;
|
||||
cache-unified;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -44,6 +44,8 @@ cpu3: cpu@3 {
|
|||
|
||||
l2: l2-cache {
|
||||
compatible = "cache";
|
||||
cache-level = <2>;
|
||||
cache-unified;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -44,6 +44,8 @@ cpu3: cpu@3 {
|
|||
|
||||
l2: l2-cache {
|
||||
compatible = "cache";
|
||||
cache-level = <2>;
|
||||
cache-unified;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -44,6 +44,8 @@ cpu3: cpu@3 {
|
|||
|
||||
l2: l2-cache {
|
||||
compatible = "cache";
|
||||
cache-level = <2>;
|
||||
cache-unified;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -88,11 +88,15 @@ cpu5: cpu@500 {
|
|||
l2: l2-cache {
|
||||
compatible = "cache";
|
||||
next-level-cache = <&l3>;
|
||||
cache-level = <2>;
|
||||
cache-unified;
|
||||
|
||||
};
|
||||
|
||||
l3: l3-cache {
|
||||
compatible = "cache";
|
||||
cache-level = <3>;
|
||||
cache-unified;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user