mirror of
https://github.com/torvalds/linux.git
synced 2026-06-08 22:52:35 +02:00
Merge branch 'linux-linaro-lsk-v4.4' into linux-linaro-lsk-v4.4-android
This commit is contained in:
commit
79df8fa79b
2
Makefile
2
Makefile
|
|
@ -1,6 +1,6 @@
|
|||
VERSION = 4
|
||||
PATCHLEVEL = 4
|
||||
SUBLEVEL = 28
|
||||
SUBLEVEL = 30
|
||||
EXTRAVERSION =
|
||||
NAME = Blurry Fish Butt
|
||||
|
||||
|
|
|
|||
|
|
@ -226,6 +226,27 @@ static int ghash_async_digest(struct ahash_request *req)
|
|||
}
|
||||
}
|
||||
|
||||
static int ghash_async_import(struct ahash_request *req, const void *in)
|
||||
{
|
||||
struct ahash_request *cryptd_req = ahash_request_ctx(req);
|
||||
struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
|
||||
struct ghash_async_ctx *ctx = crypto_ahash_ctx(tfm);
|
||||
struct shash_desc *desc = cryptd_shash_desc(cryptd_req);
|
||||
|
||||
desc->tfm = cryptd_ahash_child(ctx->cryptd_tfm);
|
||||
desc->flags = req->base.flags;
|
||||
|
||||
return crypto_shash_import(desc, in);
|
||||
}
|
||||
|
||||
static int ghash_async_export(struct ahash_request *req, void *out)
|
||||
{
|
||||
struct ahash_request *cryptd_req = ahash_request_ctx(req);
|
||||
struct shash_desc *desc = cryptd_shash_desc(cryptd_req);
|
||||
|
||||
return crypto_shash_export(desc, out);
|
||||
}
|
||||
|
||||
static int ghash_async_setkey(struct crypto_ahash *tfm, const u8 *key,
|
||||
unsigned int keylen)
|
||||
{
|
||||
|
|
@ -274,7 +295,10 @@ static struct ahash_alg ghash_async_alg = {
|
|||
.final = ghash_async_final,
|
||||
.setkey = ghash_async_setkey,
|
||||
.digest = ghash_async_digest,
|
||||
.import = ghash_async_import,
|
||||
.export = ghash_async_export,
|
||||
.halg.digestsize = GHASH_DIGEST_SIZE,
|
||||
.halg.statesize = sizeof(struct ghash_desc_ctx),
|
||||
.halg.base = {
|
||||
.cra_name = "ghash",
|
||||
.cra_driver_name = "ghash-ce",
|
||||
|
|
|
|||
|
|
@ -41,30 +41,35 @@ static irqreturn_t cplds_irq_handler(int in_irq, void *d)
|
|||
unsigned long pending;
|
||||
unsigned int bit;
|
||||
|
||||
pending = readl(fpga->base + FPGA_IRQ_SET_CLR) & fpga->irq_mask;
|
||||
for_each_set_bit(bit, &pending, CPLDS_NB_IRQ)
|
||||
generic_handle_irq(irq_find_mapping(fpga->irqdomain, bit));
|
||||
do {
|
||||
pending = readl(fpga->base + FPGA_IRQ_SET_CLR) & fpga->irq_mask;
|
||||
for_each_set_bit(bit, &pending, CPLDS_NB_IRQ) {
|
||||
generic_handle_irq(irq_find_mapping(fpga->irqdomain,
|
||||
bit));
|
||||
}
|
||||
} while (pending);
|
||||
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
static void cplds_irq_mask_ack(struct irq_data *d)
|
||||
static void cplds_irq_mask(struct irq_data *d)
|
||||
{
|
||||
struct cplds *fpga = irq_data_get_irq_chip_data(d);
|
||||
unsigned int cplds_irq = irqd_to_hwirq(d);
|
||||
unsigned int set, bit = BIT(cplds_irq);
|
||||
unsigned int bit = BIT(cplds_irq);
|
||||
|
||||
fpga->irq_mask &= ~bit;
|
||||
writel(fpga->irq_mask, fpga->base + FPGA_IRQ_MASK_EN);
|
||||
set = readl(fpga->base + FPGA_IRQ_SET_CLR);
|
||||
writel(set & ~bit, fpga->base + FPGA_IRQ_SET_CLR);
|
||||
}
|
||||
|
||||
static void cplds_irq_unmask(struct irq_data *d)
|
||||
{
|
||||
struct cplds *fpga = irq_data_get_irq_chip_data(d);
|
||||
unsigned int cplds_irq = irqd_to_hwirq(d);
|
||||
unsigned int bit = BIT(cplds_irq);
|
||||
unsigned int set, bit = BIT(cplds_irq);
|
||||
|
||||
set = readl(fpga->base + FPGA_IRQ_SET_CLR);
|
||||
writel(set & ~bit, fpga->base + FPGA_IRQ_SET_CLR);
|
||||
|
||||
fpga->irq_mask |= bit;
|
||||
writel(fpga->irq_mask, fpga->base + FPGA_IRQ_MASK_EN);
|
||||
|
|
@ -72,7 +77,8 @@ static void cplds_irq_unmask(struct irq_data *d)
|
|||
|
||||
static struct irq_chip cplds_irq_chip = {
|
||||
.name = "pxa_cplds",
|
||||
.irq_mask_ack = cplds_irq_mask_ack,
|
||||
.irq_ack = cplds_irq_mask,
|
||||
.irq_mask = cplds_irq_mask,
|
||||
.irq_unmask = cplds_irq_unmask,
|
||||
.flags = IRQCHIP_MASK_ON_SUSPEND | IRQCHIP_SKIP_SET_WAKE,
|
||||
};
|
||||
|
|
|
|||
|
|
@ -909,6 +909,14 @@ static void eeh_handle_special_event(void)
|
|||
/* Notify all devices to be down */
|
||||
eeh_pe_state_clear(pe, EEH_PE_PRI_BUS);
|
||||
bus = eeh_pe_bus_get(phb_pe);
|
||||
if (!bus) {
|
||||
pr_err("%s: Cannot find PCI bus for "
|
||||
"PHB#%d-PE#%x\n",
|
||||
__func__,
|
||||
pe->phb->global_number,
|
||||
pe->addr);
|
||||
break;
|
||||
}
|
||||
eeh_pe_dev_traverse(pe,
|
||||
eeh_report_failure, NULL);
|
||||
pcibios_remove_pci_devices(bus);
|
||||
|
|
|
|||
|
|
@ -969,7 +969,7 @@ int __init nvram_remove_partition(const char *name, int sig,
|
|||
|
||||
/* Make partition a free partition */
|
||||
part->header.signature = NVRAM_SIG_FREE;
|
||||
strncpy(part->header.name, "wwwwwwwwwwww", 12);
|
||||
memset(part->header.name, 'w', 12);
|
||||
part->header.checksum = nvram_checksum(&part->header);
|
||||
rc = nvram_write_header(part);
|
||||
if (rc <= 0) {
|
||||
|
|
@ -987,8 +987,8 @@ int __init nvram_remove_partition(const char *name, int sig,
|
|||
}
|
||||
if (prev) {
|
||||
prev->header.length += part->header.length;
|
||||
prev->header.checksum = nvram_checksum(&part->header);
|
||||
rc = nvram_write_header(part);
|
||||
prev->header.checksum = nvram_checksum(&prev->header);
|
||||
rc = nvram_write_header(prev);
|
||||
if (rc <= 0) {
|
||||
printk(KERN_ERR "nvram_remove_partition: nvram_write failed (%d)\n", rc);
|
||||
return rc;
|
||||
|
|
|
|||
|
|
@ -956,6 +956,11 @@ static int pnv_eeh_reset(struct eeh_pe *pe, int option)
|
|||
}
|
||||
|
||||
bus = eeh_pe_bus_get(pe);
|
||||
if (!bus) {
|
||||
pr_err("%s: Cannot find PCI bus for PHB#%d-PE#%x\n",
|
||||
__func__, pe->phb->global_number, pe->addr);
|
||||
return -EIO;
|
||||
}
|
||||
if (pci_is_root_bus(bus) ||
|
||||
pci_is_root_bus(bus->parent))
|
||||
ret = pnv_eeh_root_reset(hose, option);
|
||||
|
|
|
|||
|
|
@ -405,11 +405,7 @@ do { \
|
|||
#define __get_user_asm_ex(x, addr, itype, rtype, ltype) \
|
||||
asm volatile("1: mov"itype" %1,%"rtype"0\n" \
|
||||
"2:\n" \
|
||||
".section .fixup,\"ax\"\n" \
|
||||
"3:xor"itype" %"rtype"0,%"rtype"0\n" \
|
||||
" jmp 2b\n" \
|
||||
".previous\n" \
|
||||
_ASM_EXTABLE_EX(1b, 3b) \
|
||||
_ASM_EXTABLE_EX(1b, 2b) \
|
||||
: ltype(x) : "m" (__m(addr)))
|
||||
|
||||
#define __put_user_nocheck(x, ptr, size) \
|
||||
|
|
|
|||
|
|
@ -331,12 +331,11 @@ static u32 __init i85x_stolen_base(int num, int slot, int func, size_t stolen_si
|
|||
|
||||
static u32 __init i865_stolen_base(int num, int slot, int func, size_t stolen_size)
|
||||
{
|
||||
/*
|
||||
* FIXME is the graphics stolen memory region
|
||||
* always at TOUD? Ie. is it always the last
|
||||
* one to be allocated by the BIOS?
|
||||
*/
|
||||
return read_pci_config_16(0, 0, 0, I865_TOUD) << 16;
|
||||
u16 toud = 0;
|
||||
|
||||
toud = read_pci_config_16(0, 0, 0, I865_TOUD);
|
||||
|
||||
return (phys_addr_t)(toud << 16) + i845_tseg_size();
|
||||
}
|
||||
|
||||
static size_t __init i830_stolen_size(int num, int slot, int func)
|
||||
|
|
|
|||
|
|
@ -117,7 +117,7 @@ static int crypto_gcm_setkey(struct crypto_aead *aead, const u8 *key,
|
|||
struct crypto_ablkcipher *ctr = ctx->ctr;
|
||||
struct {
|
||||
be128 hash;
|
||||
u8 iv[8];
|
||||
u8 iv[16];
|
||||
|
||||
struct crypto_gcm_setkey_result result;
|
||||
|
||||
|
|
|
|||
|
|
@ -385,7 +385,7 @@ static int omap_rng_probe(struct platform_device *pdev)
|
|||
|
||||
pm_runtime_enable(&pdev->dev);
|
||||
ret = pm_runtime_get_sync(&pdev->dev);
|
||||
if (ret) {
|
||||
if (ret < 0) {
|
||||
dev_err(&pdev->dev, "Failed to runtime_get device: %d\n", ret);
|
||||
pm_runtime_put_noidle(&pdev->dev);
|
||||
goto err_ioremap;
|
||||
|
|
@ -443,7 +443,7 @@ static int __maybe_unused omap_rng_resume(struct device *dev)
|
|||
int ret;
|
||||
|
||||
ret = pm_runtime_get_sync(dev);
|
||||
if (ret) {
|
||||
if (ret < 0) {
|
||||
dev_err(dev, "Failed to runtime_get device: %d\n", ret);
|
||||
pm_runtime_put_noidle(dev);
|
||||
return ret;
|
||||
|
|
|
|||
|
|
@ -354,7 +354,7 @@ static long clk_divider_round_rate(struct clk_hw *hw, unsigned long rate,
|
|||
|
||||
/* if read only, just return current value */
|
||||
if (divider->flags & CLK_DIVIDER_READ_ONLY) {
|
||||
bestdiv = readl(divider->reg) >> divider->shift;
|
||||
bestdiv = clk_readl(divider->reg) >> divider->shift;
|
||||
bestdiv &= div_mask(divider->width);
|
||||
bestdiv = _get_div(divider->table, bestdiv, divider->flags,
|
||||
divider->width);
|
||||
|
|
|
|||
|
|
@ -766,7 +766,11 @@ static struct clk * __init create_one_cmux(struct clockgen *cg, int idx)
|
|||
if (!hwc)
|
||||
return NULL;
|
||||
|
||||
hwc->reg = cg->regs + 0x20 * idx;
|
||||
if (cg->info.flags & CG_VER3)
|
||||
hwc->reg = cg->regs + 0x70000 + 0x20 * idx;
|
||||
else
|
||||
hwc->reg = cg->regs + 0x20 * idx;
|
||||
|
||||
hwc->info = cg->info.cmux_groups[cg->info.cmux_to_group[idx]];
|
||||
|
||||
/*
|
||||
|
|
|
|||
|
|
@ -115,7 +115,7 @@ static void __init _mx35_clocks_init(void)
|
|||
}
|
||||
|
||||
clk[ckih] = imx_clk_fixed("ckih", 24000000);
|
||||
clk[ckil] = imx_clk_fixed("ckih", 32768);
|
||||
clk[ckil] = imx_clk_fixed("ckil", 32768);
|
||||
clk[mpll] = imx_clk_pllv1(IMX_PLLV1_IMX35, "mpll", "ckih", base + MX35_CCM_MPCTL);
|
||||
clk[ppll] = imx_clk_pllv1(IMX_PLLV1_IMX35, "ppll", "ckih", base + MX35_CCM_PPCTL);
|
||||
|
||||
|
|
|
|||
|
|
@ -286,22 +286,21 @@ static void ipu_irq_handler(struct irq_desc *desc)
|
|||
raw_spin_unlock(&bank_lock);
|
||||
while ((line = ffs(status))) {
|
||||
struct ipu_irq_map *map;
|
||||
unsigned int irq = NO_IRQ;
|
||||
unsigned int irq;
|
||||
|
||||
line--;
|
||||
status &= ~(1UL << line);
|
||||
|
||||
raw_spin_lock(&bank_lock);
|
||||
map = src2map(32 * i + line);
|
||||
if (map)
|
||||
irq = map->irq;
|
||||
raw_spin_unlock(&bank_lock);
|
||||
|
||||
if (!map) {
|
||||
raw_spin_unlock(&bank_lock);
|
||||
pr_err("IPU: Interrupt on unmapped source %u bank %d\n",
|
||||
line, i);
|
||||
continue;
|
||||
}
|
||||
irq = map->irq;
|
||||
raw_spin_unlock(&bank_lock);
|
||||
generic_handle_irq(irq);
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -113,24 +113,26 @@ void amdgpu_dpm_print_ps_status(struct amdgpu_device *adev,
|
|||
printk("\n");
|
||||
}
|
||||
|
||||
|
||||
u32 amdgpu_dpm_get_vblank_time(struct amdgpu_device *adev)
|
||||
{
|
||||
struct drm_device *dev = adev->ddev;
|
||||
struct drm_crtc *crtc;
|
||||
struct amdgpu_crtc *amdgpu_crtc;
|
||||
u32 line_time_us, vblank_lines;
|
||||
u32 vblank_in_pixels;
|
||||
u32 vblank_time_us = 0xffffffff; /* if the displays are off, vblank time is max */
|
||||
|
||||
if (adev->mode_info.num_crtc && adev->mode_info.mode_config_initialized) {
|
||||
list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
|
||||
amdgpu_crtc = to_amdgpu_crtc(crtc);
|
||||
if (crtc->enabled && amdgpu_crtc->enabled && amdgpu_crtc->hw_mode.clock) {
|
||||
line_time_us = (amdgpu_crtc->hw_mode.crtc_htotal * 1000) /
|
||||
amdgpu_crtc->hw_mode.clock;
|
||||
vblank_lines = amdgpu_crtc->hw_mode.crtc_vblank_end -
|
||||
vblank_in_pixels =
|
||||
amdgpu_crtc->hw_mode.crtc_htotal *
|
||||
(amdgpu_crtc->hw_mode.crtc_vblank_end -
|
||||
amdgpu_crtc->hw_mode.crtc_vdisplay +
|
||||
(amdgpu_crtc->v_border * 2);
|
||||
vblank_time_us = vblank_lines * line_time_us;
|
||||
(amdgpu_crtc->v_border * 2));
|
||||
|
||||
vblank_time_us = vblank_in_pixels * 1000 / amdgpu_crtc->hw_mode.clock;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -227,7 +227,7 @@ static int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file
|
|||
type = AMD_IP_BLOCK_TYPE_UVD;
|
||||
ring_mask = adev->uvd.ring.ready ? 1 : 0;
|
||||
ib_start_alignment = AMDGPU_GPU_PAGE_SIZE;
|
||||
ib_size_alignment = 8;
|
||||
ib_size_alignment = 16;
|
||||
break;
|
||||
case AMDGPU_HW_IP_VCE:
|
||||
type = AMD_IP_BLOCK_TYPE_VCE;
|
||||
|
|
|
|||
|
|
@ -419,16 +419,6 @@ static void dce_v10_0_hpd_init(struct amdgpu_device *adev)
|
|||
list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
|
||||
struct amdgpu_connector *amdgpu_connector = to_amdgpu_connector(connector);
|
||||
|
||||
if (connector->connector_type == DRM_MODE_CONNECTOR_eDP ||
|
||||
connector->connector_type == DRM_MODE_CONNECTOR_LVDS) {
|
||||
/* don't try to enable hpd on eDP or LVDS avoid breaking the
|
||||
* aux dp channel on imac and help (but not completely fix)
|
||||
* https://bugzilla.redhat.com/show_bug.cgi?id=726143
|
||||
* also avoid interrupt storms during dpms.
|
||||
*/
|
||||
continue;
|
||||
}
|
||||
|
||||
switch (amdgpu_connector->hpd.hpd) {
|
||||
case AMDGPU_HPD_1:
|
||||
idx = 0;
|
||||
|
|
@ -452,6 +442,19 @@ static void dce_v10_0_hpd_init(struct amdgpu_device *adev)
|
|||
continue;
|
||||
}
|
||||
|
||||
if (connector->connector_type == DRM_MODE_CONNECTOR_eDP ||
|
||||
connector->connector_type == DRM_MODE_CONNECTOR_LVDS) {
|
||||
/* don't try to enable hpd on eDP or LVDS avoid breaking the
|
||||
* aux dp channel on imac and help (but not completely fix)
|
||||
* https://bugzilla.redhat.com/show_bug.cgi?id=726143
|
||||
* also avoid interrupt storms during dpms.
|
||||
*/
|
||||
tmp = RREG32(mmDC_HPD_INT_CONTROL + hpd_offsets[idx]);
|
||||
tmp = REG_SET_FIELD(tmp, DC_HPD_INT_CONTROL, DC_HPD_INT_EN, 0);
|
||||
WREG32(mmDC_HPD_INT_CONTROL + hpd_offsets[idx], tmp);
|
||||
continue;
|
||||
}
|
||||
|
||||
tmp = RREG32(mmDC_HPD_CONTROL + hpd_offsets[idx]);
|
||||
tmp = REG_SET_FIELD(tmp, DC_HPD_CONTROL, DC_HPD_EN, 1);
|
||||
WREG32(mmDC_HPD_CONTROL + hpd_offsets[idx], tmp);
|
||||
|
|
|
|||
|
|
@ -409,16 +409,6 @@ static void dce_v11_0_hpd_init(struct amdgpu_device *adev)
|
|||
list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
|
||||
struct amdgpu_connector *amdgpu_connector = to_amdgpu_connector(connector);
|
||||
|
||||
if (connector->connector_type == DRM_MODE_CONNECTOR_eDP ||
|
||||
connector->connector_type == DRM_MODE_CONNECTOR_LVDS) {
|
||||
/* don't try to enable hpd on eDP or LVDS avoid breaking the
|
||||
* aux dp channel on imac and help (but not completely fix)
|
||||
* https://bugzilla.redhat.com/show_bug.cgi?id=726143
|
||||
* also avoid interrupt storms during dpms.
|
||||
*/
|
||||
continue;
|
||||
}
|
||||
|
||||
switch (amdgpu_connector->hpd.hpd) {
|
||||
case AMDGPU_HPD_1:
|
||||
idx = 0;
|
||||
|
|
@ -442,6 +432,19 @@ static void dce_v11_0_hpd_init(struct amdgpu_device *adev)
|
|||
continue;
|
||||
}
|
||||
|
||||
if (connector->connector_type == DRM_MODE_CONNECTOR_eDP ||
|
||||
connector->connector_type == DRM_MODE_CONNECTOR_LVDS) {
|
||||
/* don't try to enable hpd on eDP or LVDS avoid breaking the
|
||||
* aux dp channel on imac and help (but not completely fix)
|
||||
* https://bugzilla.redhat.com/show_bug.cgi?id=726143
|
||||
* also avoid interrupt storms during dpms.
|
||||
*/
|
||||
tmp = RREG32(mmDC_HPD_INT_CONTROL + hpd_offsets[idx]);
|
||||
tmp = REG_SET_FIELD(tmp, DC_HPD_INT_CONTROL, DC_HPD_INT_EN, 0);
|
||||
WREG32(mmDC_HPD_INT_CONTROL + hpd_offsets[idx], tmp);
|
||||
continue;
|
||||
}
|
||||
|
||||
tmp = RREG32(mmDC_HPD_CONTROL + hpd_offsets[idx]);
|
||||
tmp = REG_SET_FIELD(tmp, DC_HPD_CONTROL, DC_HPD_EN, 1);
|
||||
WREG32(mmDC_HPD_CONTROL + hpd_offsets[idx], tmp);
|
||||
|
|
@ -3030,6 +3033,7 @@ static int dce_v11_0_sw_fini(void *handle)
|
|||
|
||||
dce_v11_0_afmt_fini(adev);
|
||||
|
||||
drm_mode_config_cleanup(adev->ddev);
|
||||
adev->mode_info.mode_config_initialized = false;
|
||||
|
||||
return 0;
|
||||
|
|
|
|||
|
|
@ -392,15 +392,6 @@ static void dce_v8_0_hpd_init(struct amdgpu_device *adev)
|
|||
list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
|
||||
struct amdgpu_connector *amdgpu_connector = to_amdgpu_connector(connector);
|
||||
|
||||
if (connector->connector_type == DRM_MODE_CONNECTOR_eDP ||
|
||||
connector->connector_type == DRM_MODE_CONNECTOR_LVDS) {
|
||||
/* don't try to enable hpd on eDP or LVDS avoid breaking the
|
||||
* aux dp channel on imac and help (but not completely fix)
|
||||
* https://bugzilla.redhat.com/show_bug.cgi?id=726143
|
||||
* also avoid interrupt storms during dpms.
|
||||
*/
|
||||
continue;
|
||||
}
|
||||
switch (amdgpu_connector->hpd.hpd) {
|
||||
case AMDGPU_HPD_1:
|
||||
WREG32(mmDC_HPD1_CONTROL, tmp);
|
||||
|
|
@ -423,6 +414,45 @@ static void dce_v8_0_hpd_init(struct amdgpu_device *adev)
|
|||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
if (connector->connector_type == DRM_MODE_CONNECTOR_eDP ||
|
||||
connector->connector_type == DRM_MODE_CONNECTOR_LVDS) {
|
||||
/* don't try to enable hpd on eDP or LVDS avoid breaking the
|
||||
* aux dp channel on imac and help (but not completely fix)
|
||||
* https://bugzilla.redhat.com/show_bug.cgi?id=726143
|
||||
* also avoid interrupt storms during dpms.
|
||||
*/
|
||||
u32 dc_hpd_int_cntl_reg, dc_hpd_int_cntl;
|
||||
|
||||
switch (amdgpu_connector->hpd.hpd) {
|
||||
case AMDGPU_HPD_1:
|
||||
dc_hpd_int_cntl_reg = mmDC_HPD1_INT_CONTROL;
|
||||
break;
|
||||
case AMDGPU_HPD_2:
|
||||
dc_hpd_int_cntl_reg = mmDC_HPD2_INT_CONTROL;
|
||||
break;
|
||||
case AMDGPU_HPD_3:
|
||||
dc_hpd_int_cntl_reg = mmDC_HPD3_INT_CONTROL;
|
||||
break;
|
||||
case AMDGPU_HPD_4:
|
||||
dc_hpd_int_cntl_reg = mmDC_HPD4_INT_CONTROL;
|
||||
break;
|
||||
case AMDGPU_HPD_5:
|
||||
dc_hpd_int_cntl_reg = mmDC_HPD5_INT_CONTROL;
|
||||
break;
|
||||
case AMDGPU_HPD_6:
|
||||
dc_hpd_int_cntl_reg = mmDC_HPD6_INT_CONTROL;
|
||||
break;
|
||||
default:
|
||||
continue;
|
||||
}
|
||||
|
||||
dc_hpd_int_cntl = RREG32(dc_hpd_int_cntl_reg);
|
||||
dc_hpd_int_cntl &= ~DC_HPD1_INT_CONTROL__DC_HPD1_INT_EN_MASK;
|
||||
WREG32(dc_hpd_int_cntl_reg, dc_hpd_int_cntl);
|
||||
continue;
|
||||
}
|
||||
|
||||
dce_v8_0_hpd_set_polarity(adev, amdgpu_connector->hpd.hpd);
|
||||
amdgpu_irq_get(adev, &adev->hpd_irq, amdgpu_connector->hpd.hpd);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -339,14 +339,17 @@ static const struct dma_buf_ops drm_gem_prime_dmabuf_ops = {
|
|||
* using the PRIME helpers.
|
||||
*/
|
||||
struct dma_buf *drm_gem_prime_export(struct drm_device *dev,
|
||||
struct drm_gem_object *obj, int flags)
|
||||
struct drm_gem_object *obj,
|
||||
int flags)
|
||||
{
|
||||
DEFINE_DMA_BUF_EXPORT_INFO(exp_info);
|
||||
|
||||
exp_info.ops = &drm_gem_prime_dmabuf_ops;
|
||||
exp_info.size = obj->size;
|
||||
exp_info.flags = flags;
|
||||
exp_info.priv = obj;
|
||||
struct dma_buf_export_info exp_info = {
|
||||
.exp_name = KBUILD_MODNAME, /* white lie for debug */
|
||||
.owner = dev->driver->fops->owner,
|
||||
.ops = &drm_gem_prime_dmabuf_ops,
|
||||
.size = obj->size,
|
||||
.flags = flags,
|
||||
.priv = obj,
|
||||
};
|
||||
|
||||
if (dev->driver->gem_prime_res_obj)
|
||||
exp_info.resv = dev->driver->gem_prime_res_obj(obj);
|
||||
|
|
|
|||
|
|
@ -2150,21 +2150,19 @@ struct drm_i915_gem_object {
|
|||
/** Record of address bit 17 of each page at last unbind. */
|
||||
unsigned long *bit_17;
|
||||
|
||||
union {
|
||||
/** for phy allocated objects */
|
||||
struct drm_dma_handle *phys_handle;
|
||||
|
||||
struct i915_gem_userptr {
|
||||
uintptr_t ptr;
|
||||
unsigned read_only :1;
|
||||
unsigned workers :4;
|
||||
struct i915_gem_userptr {
|
||||
uintptr_t ptr;
|
||||
unsigned read_only :1;
|
||||
unsigned workers :4;
|
||||
#define I915_GEM_USERPTR_MAX_WORKERS 15
|
||||
|
||||
struct i915_mm_struct *mm;
|
||||
struct i915_mmu_object *mmu_object;
|
||||
struct work_struct *work;
|
||||
} userptr;
|
||||
};
|
||||
struct i915_mm_struct *mm;
|
||||
struct i915_mmu_object *mmu_object;
|
||||
struct work_struct *work;
|
||||
} userptr;
|
||||
|
||||
/** for phys allocated objects */
|
||||
struct drm_dma_handle *phys_handle;
|
||||
};
|
||||
#define to_intel_bo(x) container_of(x, struct drm_i915_gem_object, base)
|
||||
|
||||
|
|
|
|||
|
|
@ -108,17 +108,28 @@ static unsigned long i915_stolen_to_physical(struct drm_device *dev)
|
|||
pci_read_config_dword(dev->pdev, 0x5c, &base);
|
||||
base &= ~((1<<20) - 1);
|
||||
} else if (IS_I865G(dev)) {
|
||||
u32 tseg_size = 0;
|
||||
u16 toud = 0;
|
||||
u8 tmp;
|
||||
|
||||
pci_bus_read_config_byte(dev->pdev->bus, PCI_DEVFN(0, 0),
|
||||
I845_ESMRAMC, &tmp);
|
||||
|
||||
if (tmp & TSEG_ENABLE) {
|
||||
switch (tmp & I845_TSEG_SIZE_MASK) {
|
||||
case I845_TSEG_SIZE_512K:
|
||||
tseg_size = KB(512);
|
||||
break;
|
||||
case I845_TSEG_SIZE_1M:
|
||||
tseg_size = MB(1);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* FIXME is the graphics stolen memory region
|
||||
* always at TOUD? Ie. is it always the last
|
||||
* one to be allocated by the BIOS?
|
||||
*/
|
||||
pci_bus_read_config_word(dev->pdev->bus, PCI_DEVFN(0, 0),
|
||||
I865_TOUD, &toud);
|
||||
|
||||
base = toud << 16;
|
||||
base = (toud << 16) + tseg_size;
|
||||
} else if (IS_I85X(dev)) {
|
||||
u32 tseg_size = 0;
|
||||
u32 tom;
|
||||
|
|
|
|||
|
|
@ -4648,7 +4648,7 @@ static bool bxt_digital_port_connected(struct drm_i915_private *dev_priv,
|
|||
*
|
||||
* Return %true if @port is connected, %false otherwise.
|
||||
*/
|
||||
bool intel_digital_port_connected(struct drm_i915_private *dev_priv,
|
||||
static bool intel_digital_port_connected(struct drm_i915_private *dev_priv,
|
||||
struct intel_digital_port *port)
|
||||
{
|
||||
if (HAS_PCH_IBX(dev_priv))
|
||||
|
|
|
|||
|
|
@ -1231,8 +1231,6 @@ void intel_edp_drrs_disable(struct intel_dp *intel_dp);
|
|||
void intel_edp_drrs_invalidate(struct drm_device *dev,
|
||||
unsigned frontbuffer_bits);
|
||||
void intel_edp_drrs_flush(struct drm_device *dev, unsigned frontbuffer_bits);
|
||||
bool intel_digital_port_connected(struct drm_i915_private *dev_priv,
|
||||
struct intel_digital_port *port);
|
||||
void hsw_dp_set_ddi_pll_sel(struct intel_crtc_state *pipe_config);
|
||||
|
||||
/* intel_dp_mst.c */
|
||||
|
|
|
|||
|
|
@ -1331,19 +1331,18 @@ intel_hdmi_unset_edid(struct drm_connector *connector)
|
|||
}
|
||||
|
||||
static bool
|
||||
intel_hdmi_set_edid(struct drm_connector *connector, bool force)
|
||||
intel_hdmi_set_edid(struct drm_connector *connector)
|
||||
{
|
||||
struct drm_i915_private *dev_priv = to_i915(connector->dev);
|
||||
struct intel_hdmi *intel_hdmi = intel_attached_hdmi(connector);
|
||||
struct edid *edid = NULL;
|
||||
struct edid *edid;
|
||||
bool connected = false;
|
||||
|
||||
intel_display_power_get(dev_priv, POWER_DOMAIN_GMBUS);
|
||||
|
||||
if (force)
|
||||
edid = drm_get_edid(connector,
|
||||
intel_gmbus_get_adapter(dev_priv,
|
||||
intel_hdmi->ddc_bus));
|
||||
edid = drm_get_edid(connector,
|
||||
intel_gmbus_get_adapter(dev_priv,
|
||||
intel_hdmi->ddc_bus));
|
||||
|
||||
intel_display_power_put(dev_priv, POWER_DOMAIN_GMBUS);
|
||||
|
||||
|
|
@ -1371,37 +1370,16 @@ static enum drm_connector_status
|
|||
intel_hdmi_detect(struct drm_connector *connector, bool force)
|
||||
{
|
||||
enum drm_connector_status status;
|
||||
struct intel_hdmi *intel_hdmi = intel_attached_hdmi(connector);
|
||||
struct drm_i915_private *dev_priv = to_i915(connector->dev);
|
||||
bool live_status = false;
|
||||
unsigned int try;
|
||||
|
||||
DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
|
||||
connector->base.id, connector->name);
|
||||
|
||||
intel_display_power_get(dev_priv, POWER_DOMAIN_GMBUS);
|
||||
|
||||
for (try = 0; !live_status && try < 9; try++) {
|
||||
if (try)
|
||||
msleep(10);
|
||||
live_status = intel_digital_port_connected(dev_priv,
|
||||
hdmi_to_dig_port(intel_hdmi));
|
||||
}
|
||||
|
||||
if (!live_status) {
|
||||
DRM_DEBUG_KMS("HDMI live status down\n");
|
||||
/*
|
||||
* Live status register is not reliable on all intel platforms.
|
||||
* So consider live_status only for certain platforms, for
|
||||
* others, read EDID to determine presence of sink.
|
||||
*/
|
||||
if (INTEL_INFO(dev_priv)->gen < 7 || IS_IVYBRIDGE(dev_priv))
|
||||
live_status = true;
|
||||
}
|
||||
|
||||
intel_hdmi_unset_edid(connector);
|
||||
|
||||
if (intel_hdmi_set_edid(connector, live_status)) {
|
||||
if (intel_hdmi_set_edid(connector)) {
|
||||
struct intel_hdmi *intel_hdmi = intel_attached_hdmi(connector);
|
||||
|
||||
hdmi_to_dig_port(intel_hdmi)->base.type = INTEL_OUTPUT_HDMI;
|
||||
|
|
@ -1427,7 +1405,7 @@ intel_hdmi_force(struct drm_connector *connector)
|
|||
if (connector->status != connector_status_connected)
|
||||
return;
|
||||
|
||||
intel_hdmi_set_edid(connector, true);
|
||||
intel_hdmi_set_edid(connector);
|
||||
hdmi_to_dig_port(intel_hdmi)->base.type = INTEL_OUTPUT_HDMI;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -2096,33 +2096,35 @@ static void intel_read_wm_latency(struct drm_device *dev, uint16_t wm[8])
|
|||
wm[7] = (val >> GEN9_MEM_LATENCY_LEVEL_3_7_SHIFT) &
|
||||
GEN9_MEM_LATENCY_LEVEL_MASK;
|
||||
|
||||
/*
|
||||
* If a level n (n > 1) has a 0us latency, all levels m (m >= n)
|
||||
* need to be disabled. We make sure to sanitize the values out
|
||||
* of the punit to satisfy this requirement.
|
||||
*/
|
||||
for (level = 1; level <= max_level; level++) {
|
||||
if (wm[level] == 0) {
|
||||
for (i = level + 1; i <= max_level; i++)
|
||||
wm[i] = 0;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* WaWmMemoryReadLatency:skl
|
||||
*
|
||||
* punit doesn't take into account the read latency so we need
|
||||
* to add 2us to the various latency levels we retrieve from
|
||||
* the punit.
|
||||
* - W0 is a bit special in that it's the only level that
|
||||
* can't be disabled if we want to have display working, so
|
||||
* we always add 2us there.
|
||||
* - For levels >=1, punit returns 0us latency when they are
|
||||
* disabled, so we respect that and don't add 2us then
|
||||
*
|
||||
* Additionally, if a level n (n > 1) has a 0us latency, all
|
||||
* levels m (m >= n) need to be disabled. We make sure to
|
||||
* sanitize the values out of the punit to satisfy this
|
||||
* requirement.
|
||||
* to add 2us to the various latency levels we retrieve from the
|
||||
* punit when level 0 response data us 0us.
|
||||
*/
|
||||
wm[0] += 2;
|
||||
for (level = 1; level <= max_level; level++)
|
||||
if (wm[level] != 0)
|
||||
if (wm[0] == 0) {
|
||||
wm[0] += 2;
|
||||
for (level = 1; level <= max_level; level++) {
|
||||
if (wm[level] == 0)
|
||||
break;
|
||||
wm[level] += 2;
|
||||
else {
|
||||
for (i = level + 1; i <= max_level; i++)
|
||||
wm[i] = 0;
|
||||
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
} else if (IS_HASWELL(dev) || IS_BROADWELL(dev)) {
|
||||
uint64_t sskpd = I915_READ64(MCH_SSKPD);
|
||||
|
||||
|
|
|
|||
|
|
@ -156,19 +156,20 @@ u32 r600_dpm_get_vblank_time(struct radeon_device *rdev)
|
|||
struct drm_device *dev = rdev->ddev;
|
||||
struct drm_crtc *crtc;
|
||||
struct radeon_crtc *radeon_crtc;
|
||||
u32 line_time_us, vblank_lines;
|
||||
u32 vblank_in_pixels;
|
||||
u32 vblank_time_us = 0xffffffff; /* if the displays are off, vblank time is max */
|
||||
|
||||
if (rdev->num_crtc && rdev->mode_info.mode_config_initialized) {
|
||||
list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
|
||||
radeon_crtc = to_radeon_crtc(crtc);
|
||||
if (crtc->enabled && radeon_crtc->enabled && radeon_crtc->hw_mode.clock) {
|
||||
line_time_us = (radeon_crtc->hw_mode.crtc_htotal * 1000) /
|
||||
radeon_crtc->hw_mode.clock;
|
||||
vblank_lines = radeon_crtc->hw_mode.crtc_vblank_end -
|
||||
radeon_crtc->hw_mode.crtc_vdisplay +
|
||||
(radeon_crtc->v_border * 2);
|
||||
vblank_time_us = vblank_lines * line_time_us;
|
||||
vblank_in_pixels =
|
||||
radeon_crtc->hw_mode.crtc_htotal *
|
||||
(radeon_crtc->hw_mode.crtc_vblank_end -
|
||||
radeon_crtc->hw_mode.crtc_vdisplay +
|
||||
(radeon_crtc->v_border * 2));
|
||||
|
||||
vblank_time_us = vblank_in_pixels * 1000 / radeon_crtc->hw_mode.clock;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -660,8 +660,9 @@ bool radeon_card_posted(struct radeon_device *rdev)
|
|||
{
|
||||
uint32_t reg;
|
||||
|
||||
/* for pass through, always force asic_init */
|
||||
if (radeon_device_is_virtual())
|
||||
/* for pass through, always force asic_init for CI */
|
||||
if (rdev->family >= CHIP_BONAIRE &&
|
||||
radeon_device_is_virtual())
|
||||
return false;
|
||||
|
||||
/* required for EFI mode on macbook2,1 which uses an r5xx asic */
|
||||
|
|
|
|||
|
|
@ -4112,7 +4112,7 @@ static int si_populate_smc_voltage_tables(struct radeon_device *rdev,
|
|||
&rdev->pm.dpm.dyn_state.phase_shedding_limits_table)) {
|
||||
si_populate_smc_voltage_table(rdev, &si_pi->vddc_phase_shed_table, table);
|
||||
|
||||
table->phaseMaskTable.lowMask[SISLANDS_SMC_VOLTAGEMASK_VDDC] =
|
||||
table->phaseMaskTable.lowMask[SISLANDS_SMC_VOLTAGEMASK_VDDC_PHASE_SHEDDING] =
|
||||
cpu_to_be32(si_pi->vddc_phase_shed_table.mask_low);
|
||||
|
||||
si_write_smc_soft_register(rdev, SI_SMC_SOFT_REGISTER_phase_shedding_delay,
|
||||
|
|
|
|||
|
|
@ -194,6 +194,7 @@ typedef struct SISLANDS_SMC_SWSTATE SISLANDS_SMC_SWSTATE;
|
|||
#define SISLANDS_SMC_VOLTAGEMASK_VDDC 0
|
||||
#define SISLANDS_SMC_VOLTAGEMASK_MVDD 1
|
||||
#define SISLANDS_SMC_VOLTAGEMASK_VDDCI 2
|
||||
#define SISLANDS_SMC_VOLTAGEMASK_VDDC_PHASE_SHEDDING 3
|
||||
#define SISLANDS_SMC_VOLTAGEMASK_MAX 4
|
||||
|
||||
struct SISLANDS_SMC_VOLTAGEMASKTABLE
|
||||
|
|
|
|||
|
|
@ -3830,14 +3830,14 @@ static void *vmw_execbuf_cmdbuf(struct vmw_private *dev_priv,
|
|||
int ret;
|
||||
|
||||
*header = NULL;
|
||||
if (!dev_priv->cman || kernel_commands)
|
||||
return kernel_commands;
|
||||
|
||||
if (command_size > SVGA_CB_MAX_SIZE) {
|
||||
DRM_ERROR("Command buffer is too large.\n");
|
||||
return ERR_PTR(-EINVAL);
|
||||
}
|
||||
|
||||
if (!dev_priv->cman || kernel_commands)
|
||||
return kernel_commands;
|
||||
|
||||
/* If possible, add a little space for fencing. */
|
||||
cmdbuf_size = command_size + 512;
|
||||
cmdbuf_size = min_t(size_t, cmdbuf_size, SVGA_CB_MAX_SIZE);
|
||||
|
|
|
|||
|
|
@ -661,9 +661,8 @@ int mwifiex_ret_802_11_associate(struct mwifiex_private *priv,
|
|||
priv->assoc_rsp_size = min(le16_to_cpu(resp->size) - S_DS_GEN,
|
||||
sizeof(priv->assoc_rsp_buf));
|
||||
|
||||
memcpy(priv->assoc_rsp_buf, &resp->params, priv->assoc_rsp_size);
|
||||
|
||||
assoc_rsp->a_id = cpu_to_le16(aid);
|
||||
memcpy(priv->assoc_rsp_buf, &resp->params, priv->assoc_rsp_size);
|
||||
|
||||
if (status_code) {
|
||||
priv->adapter->dbg.num_cmd_assoc_failure++;
|
||||
|
|
|
|||
|
|
@ -1068,6 +1068,12 @@ static int bq24257_probe(struct i2c_client *client,
|
|||
return ret;
|
||||
}
|
||||
|
||||
ret = bq24257_power_supply_init(bq);
|
||||
if (ret < 0) {
|
||||
dev_err(dev, "Failed to register power supply\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
ret = devm_request_threaded_irq(dev, client->irq, NULL,
|
||||
bq24257_irq_handler_thread,
|
||||
IRQF_TRIGGER_FALLING |
|
||||
|
|
@ -1078,12 +1084,6 @@ static int bq24257_probe(struct i2c_client *client,
|
|||
return ret;
|
||||
}
|
||||
|
||||
ret = bq24257_power_supply_init(bq);
|
||||
if (ret < 0) {
|
||||
dev_err(dev, "Failed to register power supply\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
ret = sysfs_create_group(&bq->charger->dev.kobj, &bq24257_attr_group);
|
||||
if (ret < 0) {
|
||||
dev_err(dev, "Can't create sysfs entries\n");
|
||||
|
|
|
|||
|
|
@ -124,7 +124,12 @@ con3270_create_status(struct con3270 *cp)
|
|||
static void
|
||||
con3270_update_string(struct con3270 *cp, struct string *s, int nr)
|
||||
{
|
||||
if (s->len >= cp->view.cols - 5)
|
||||
if (s->len < 4) {
|
||||
/* This indicates a bug, but printing a warning would
|
||||
* cause a deadlock. */
|
||||
return;
|
||||
}
|
||||
if (s->string[s->len - 4] != TO_RA)
|
||||
return;
|
||||
raw3270_buffer_address(cp->view.dev, s->string + s->len - 3,
|
||||
cp->view.cols * (nr + 1));
|
||||
|
|
@ -461,11 +466,11 @@ con3270_cline_end(struct con3270 *cp)
|
|||
cp->cline->len + 4 : cp->view.cols;
|
||||
s = con3270_alloc_string(cp, size);
|
||||
memcpy(s->string, cp->cline->string, cp->cline->len);
|
||||
if (s->len < cp->view.cols - 5) {
|
||||
if (cp->cline->len < cp->view.cols - 5) {
|
||||
s->string[s->len - 4] = TO_RA;
|
||||
s->string[s->len - 1] = 0;
|
||||
} else {
|
||||
while (--size > cp->cline->len)
|
||||
while (--size >= cp->cline->len)
|
||||
s->string[size] = cp->view.ascebc[' '];
|
||||
}
|
||||
/* Replace cline with allocated line s and reset cline. */
|
||||
|
|
|
|||
|
|
@ -95,12 +95,13 @@ struct chsc_ssd_area {
|
|||
int chsc_get_ssd_info(struct subchannel_id schid, struct chsc_ssd_info *ssd)
|
||||
{
|
||||
struct chsc_ssd_area *ssd_area;
|
||||
unsigned long flags;
|
||||
int ccode;
|
||||
int ret;
|
||||
int i;
|
||||
int mask;
|
||||
|
||||
spin_lock_irq(&chsc_page_lock);
|
||||
spin_lock_irqsave(&chsc_page_lock, flags);
|
||||
memset(chsc_page, 0, PAGE_SIZE);
|
||||
ssd_area = chsc_page;
|
||||
ssd_area->request.length = 0x0010;
|
||||
|
|
@ -144,7 +145,7 @@ int chsc_get_ssd_info(struct subchannel_id schid, struct chsc_ssd_info *ssd)
|
|||
ssd->fla[i] = ssd_area->fla[i];
|
||||
}
|
||||
out:
|
||||
spin_unlock_irq(&chsc_page_lock);
|
||||
spin_unlock_irqrestore(&chsc_page_lock, flags);
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
|
@ -832,9 +833,10 @@ int __chsc_do_secm(struct channel_subsystem *css, int enable)
|
|||
u32 fmt : 4;
|
||||
u32 : 16;
|
||||
} __attribute__ ((packed)) *secm_area;
|
||||
unsigned long flags;
|
||||
int ret, ccode;
|
||||
|
||||
spin_lock_irq(&chsc_page_lock);
|
||||
spin_lock_irqsave(&chsc_page_lock, flags);
|
||||
memset(chsc_page, 0, PAGE_SIZE);
|
||||
secm_area = chsc_page;
|
||||
secm_area->request.length = 0x0050;
|
||||
|
|
@ -864,7 +866,7 @@ int __chsc_do_secm(struct channel_subsystem *css, int enable)
|
|||
CIO_CRW_EVENT(2, "chsc: secm failed (rc=%04x)\n",
|
||||
secm_area->response.code);
|
||||
out:
|
||||
spin_unlock_irq(&chsc_page_lock);
|
||||
spin_unlock_irqrestore(&chsc_page_lock, flags);
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
|
@ -993,6 +995,7 @@ chsc_initialize_cmg_chars(struct channel_path *chp, u8 cmcv,
|
|||
|
||||
int chsc_get_channel_measurement_chars(struct channel_path *chp)
|
||||
{
|
||||
unsigned long flags;
|
||||
int ccode, ret;
|
||||
|
||||
struct {
|
||||
|
|
@ -1022,7 +1025,7 @@ int chsc_get_channel_measurement_chars(struct channel_path *chp)
|
|||
if (!css_chsc_characteristics.scmc || !css_chsc_characteristics.secm)
|
||||
return 0;
|
||||
|
||||
spin_lock_irq(&chsc_page_lock);
|
||||
spin_lock_irqsave(&chsc_page_lock, flags);
|
||||
memset(chsc_page, 0, PAGE_SIZE);
|
||||
scmc_area = chsc_page;
|
||||
scmc_area->request.length = 0x0010;
|
||||
|
|
@ -1054,7 +1057,7 @@ int chsc_get_channel_measurement_chars(struct channel_path *chp)
|
|||
chsc_initialize_cmg_chars(chp, scmc_area->cmcv,
|
||||
(struct cmg_chars *) &scmc_area->data);
|
||||
out:
|
||||
spin_unlock_irq(&chsc_page_lock);
|
||||
spin_unlock_irqrestore(&chsc_page_lock, flags);
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
|
@ -1135,6 +1138,7 @@ struct css_chsc_char css_chsc_characteristics;
|
|||
int __init
|
||||
chsc_determine_css_characteristics(void)
|
||||
{
|
||||
unsigned long flags;
|
||||
int result;
|
||||
struct {
|
||||
struct chsc_header request;
|
||||
|
|
@ -1147,7 +1151,7 @@ chsc_determine_css_characteristics(void)
|
|||
u32 chsc_char[508];
|
||||
} __attribute__ ((packed)) *scsc_area;
|
||||
|
||||
spin_lock_irq(&chsc_page_lock);
|
||||
spin_lock_irqsave(&chsc_page_lock, flags);
|
||||
memset(chsc_page, 0, PAGE_SIZE);
|
||||
scsc_area = chsc_page;
|
||||
scsc_area->request.length = 0x0010;
|
||||
|
|
@ -1169,7 +1173,7 @@ chsc_determine_css_characteristics(void)
|
|||
CIO_CRW_EVENT(2, "chsc: scsc failed (rc=%04x)\n",
|
||||
scsc_area->response.code);
|
||||
exit:
|
||||
spin_unlock_irq(&chsc_page_lock);
|
||||
spin_unlock_irqrestore(&chsc_page_lock, flags);
|
||||
return result;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -4510,7 +4510,7 @@ _scsih_io_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index, u32 reply)
|
|||
le16_to_cpu(mpi_reply->DevHandle));
|
||||
mpt3sas_trigger_scsi(ioc, data.skey, data.asc, data.ascq);
|
||||
|
||||
if (!(ioc->logging_level & MPT_DEBUG_REPLY) &&
|
||||
if ((ioc->logging_level & MPT_DEBUG_REPLY) &&
|
||||
((scmd->sense_buffer[2] == UNIT_ATTENTION) ||
|
||||
(scmd->sense_buffer[2] == MEDIUM_ERROR) ||
|
||||
(scmd->sense_buffer[2] == HARDWARE_ERROR)))
|
||||
|
|
|
|||
|
|
@ -753,7 +753,6 @@ static int dspi_remove(struct platform_device *pdev)
|
|||
/* Disconnect from the SPI framework */
|
||||
clk_disable_unprepare(dspi->clk);
|
||||
spi_unregister_master(dspi->master);
|
||||
spi_master_put(dspi->master);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -718,13 +718,13 @@ u8 rtw_addbareq_cmd(struct adapter *padapter, u8 tid, u8 *addr)
|
|||
u8 res = _SUCCESS;
|
||||
|
||||
|
||||
ph2c = kzalloc(sizeof(struct cmd_obj), GFP_KERNEL);
|
||||
ph2c = kzalloc(sizeof(struct cmd_obj), GFP_ATOMIC);
|
||||
if (ph2c == NULL) {
|
||||
res = _FAIL;
|
||||
goto exit;
|
||||
}
|
||||
|
||||
paddbareq_parm = kzalloc(sizeof(struct addBaReq_parm), GFP_KERNEL);
|
||||
paddbareq_parm = kzalloc(sizeof(struct addBaReq_parm), GFP_ATOMIC);
|
||||
if (paddbareq_parm == NULL) {
|
||||
kfree(ph2c);
|
||||
res = _FAIL;
|
||||
|
|
|
|||
|
|
@ -229,7 +229,7 @@ static int uio_dmem_genirq_probe(struct platform_device *pdev)
|
|||
++uiomem;
|
||||
}
|
||||
|
||||
priv->dmem_region_start = i;
|
||||
priv->dmem_region_start = uiomem - &uioinfo->mem[0];
|
||||
priv->num_dmem_regions = pdata->num_dynamic_regions;
|
||||
|
||||
for (i = 0; i < pdata->num_dynamic_regions; ++i) {
|
||||
|
|
|
|||
|
|
@ -316,7 +316,7 @@ static int xenbus_write_transaction(unsigned msg_type,
|
|||
rc = -ENOMEM;
|
||||
goto out;
|
||||
}
|
||||
} else {
|
||||
} else if (msg_type == XS_TRANSACTION_END) {
|
||||
list_for_each_entry(trans, &u->transactions, list)
|
||||
if (trans->handle.id == u->u.msg.tx_id)
|
||||
break;
|
||||
|
|
|
|||
40
fs/9p/acl.c
40
fs/9p/acl.c
|
|
@ -282,32 +282,26 @@ static int v9fs_xattr_set_acl(const struct xattr_handler *handler,
|
|||
switch (handler->flags) {
|
||||
case ACL_TYPE_ACCESS:
|
||||
if (acl) {
|
||||
umode_t mode = inode->i_mode;
|
||||
retval = posix_acl_equiv_mode(acl, &mode);
|
||||
if (retval < 0)
|
||||
struct iattr iattr;
|
||||
|
||||
retval = posix_acl_update_mode(inode, &iattr.ia_mode, &acl);
|
||||
if (retval)
|
||||
goto err_out;
|
||||
else {
|
||||
struct iattr iattr;
|
||||
if (retval == 0) {
|
||||
/*
|
||||
* ACL can be represented
|
||||
* by the mode bits. So don't
|
||||
* update ACL.
|
||||
*/
|
||||
acl = NULL;
|
||||
value = NULL;
|
||||
size = 0;
|
||||
}
|
||||
/* Updte the mode bits */
|
||||
iattr.ia_mode = ((mode & S_IALLUGO) |
|
||||
(inode->i_mode & ~S_IALLUGO));
|
||||
iattr.ia_valid = ATTR_MODE;
|
||||
/* FIXME should we update ctime ?
|
||||
* What is the following setxattr update the
|
||||
* mode ?
|
||||
if (!acl) {
|
||||
/*
|
||||
* ACL can be represented
|
||||
* by the mode bits. So don't
|
||||
* update ACL.
|
||||
*/
|
||||
v9fs_vfs_setattr_dotl(dentry, &iattr);
|
||||
value = NULL;
|
||||
size = 0;
|
||||
}
|
||||
iattr.ia_valid = ATTR_MODE;
|
||||
/* FIXME should we update ctime ?
|
||||
* What is the following setxattr update the
|
||||
* mode ?
|
||||
*/
|
||||
v9fs_vfs_setattr_dotl(dentry, &iattr);
|
||||
}
|
||||
break;
|
||||
case ACL_TYPE_DEFAULT:
|
||||
|
|
|
|||
|
|
@ -83,11 +83,9 @@ static int __btrfs_set_acl(struct btrfs_trans_handle *trans,
|
|||
case ACL_TYPE_ACCESS:
|
||||
name = POSIX_ACL_XATTR_ACCESS;
|
||||
if (acl) {
|
||||
ret = posix_acl_equiv_mode(acl, &inode->i_mode);
|
||||
if (ret < 0)
|
||||
ret = posix_acl_update_mode(inode, &inode->i_mode, &acl);
|
||||
if (ret)
|
||||
return ret;
|
||||
if (ret == 0)
|
||||
acl = NULL;
|
||||
}
|
||||
ret = 0;
|
||||
break;
|
||||
|
|
|
|||
|
|
@ -94,11 +94,9 @@ int ceph_set_acl(struct inode *inode, struct posix_acl *acl, int type)
|
|||
case ACL_TYPE_ACCESS:
|
||||
name = POSIX_ACL_XATTR_ACCESS;
|
||||
if (acl) {
|
||||
ret = posix_acl_equiv_mode(acl, &new_mode);
|
||||
if (ret < 0)
|
||||
ret = posix_acl_update_mode(inode, &new_mode, &acl);
|
||||
if (ret)
|
||||
goto out;
|
||||
if (ret == 0)
|
||||
acl = NULL;
|
||||
}
|
||||
break;
|
||||
case ACL_TYPE_DEFAULT:
|
||||
|
|
|
|||
|
|
@ -193,15 +193,11 @@ ext2_set_acl(struct inode *inode, struct posix_acl *acl, int type)
|
|||
case ACL_TYPE_ACCESS:
|
||||
name_index = EXT2_XATTR_INDEX_POSIX_ACL_ACCESS;
|
||||
if (acl) {
|
||||
error = posix_acl_equiv_mode(acl, &inode->i_mode);
|
||||
if (error < 0)
|
||||
error = posix_acl_update_mode(inode, &inode->i_mode, &acl);
|
||||
if (error)
|
||||
return error;
|
||||
else {
|
||||
inode->i_ctime = CURRENT_TIME_SEC;
|
||||
mark_inode_dirty(inode);
|
||||
if (error == 0)
|
||||
acl = NULL;
|
||||
}
|
||||
inode->i_ctime = CURRENT_TIME_SEC;
|
||||
mark_inode_dirty(inode);
|
||||
}
|
||||
break;
|
||||
|
||||
|
|
|
|||
|
|
@ -196,15 +196,11 @@ __ext4_set_acl(handle_t *handle, struct inode *inode, int type,
|
|||
case ACL_TYPE_ACCESS:
|
||||
name_index = EXT4_XATTR_INDEX_POSIX_ACL_ACCESS;
|
||||
if (acl) {
|
||||
error = posix_acl_equiv_mode(acl, &inode->i_mode);
|
||||
if (error < 0)
|
||||
error = posix_acl_update_mode(inode, &inode->i_mode, &acl);
|
||||
if (error)
|
||||
return error;
|
||||
else {
|
||||
inode->i_ctime = ext4_current_time(inode);
|
||||
ext4_mark_inode_dirty(handle, inode);
|
||||
if (error == 0)
|
||||
acl = NULL;
|
||||
}
|
||||
inode->i_ctime = ext4_current_time(inode);
|
||||
ext4_mark_inode_dirty(handle, inode);
|
||||
}
|
||||
break;
|
||||
|
||||
|
|
|
|||
|
|
@ -214,12 +214,10 @@ static int __f2fs_set_acl(struct inode *inode, int type,
|
|||
case ACL_TYPE_ACCESS:
|
||||
name_index = F2FS_XATTR_INDEX_POSIX_ACL_ACCESS;
|
||||
if (acl) {
|
||||
error = posix_acl_equiv_mode(acl, &inode->i_mode);
|
||||
if (error < 0)
|
||||
error = posix_acl_update_mode(inode, &inode->i_mode, &acl);
|
||||
if (error)
|
||||
return error;
|
||||
set_acl_inode(fi, inode->i_mode);
|
||||
if (error == 0)
|
||||
acl = NULL;
|
||||
}
|
||||
break;
|
||||
|
||||
|
|
|
|||
|
|
@ -79,17 +79,11 @@ int gfs2_set_acl(struct inode *inode, struct posix_acl *acl, int type)
|
|||
if (type == ACL_TYPE_ACCESS) {
|
||||
umode_t mode = inode->i_mode;
|
||||
|
||||
error = posix_acl_equiv_mode(acl, &mode);
|
||||
if (error < 0)
|
||||
error = posix_acl_update_mode(inode, &inode->i_mode, &acl);
|
||||
if (error)
|
||||
return error;
|
||||
|
||||
if (error == 0)
|
||||
acl = NULL;
|
||||
|
||||
if (mode != inode->i_mode) {
|
||||
inode->i_mode = mode;
|
||||
if (mode != inode->i_mode)
|
||||
mark_inode_dirty(inode);
|
||||
}
|
||||
}
|
||||
|
||||
if (acl) {
|
||||
|
|
|
|||
|
|
@ -68,8 +68,8 @@ int hfsplus_set_posix_acl(struct inode *inode, struct posix_acl *acl,
|
|||
case ACL_TYPE_ACCESS:
|
||||
xattr_name = POSIX_ACL_XATTR_ACCESS;
|
||||
if (acl) {
|
||||
err = posix_acl_equiv_mode(acl, &inode->i_mode);
|
||||
if (err < 0)
|
||||
err = posix_acl_update_mode(inode, &inode->i_mode, &acl);
|
||||
if (err)
|
||||
return err;
|
||||
}
|
||||
err = 0;
|
||||
|
|
|
|||
|
|
@ -235,9 +235,10 @@ int jffs2_set_acl(struct inode *inode, struct posix_acl *acl, int type)
|
|||
case ACL_TYPE_ACCESS:
|
||||
xprefix = JFFS2_XPREFIX_ACL_ACCESS;
|
||||
if (acl) {
|
||||
umode_t mode = inode->i_mode;
|
||||
rc = posix_acl_equiv_mode(acl, &mode);
|
||||
if (rc < 0)
|
||||
umode_t mode;
|
||||
|
||||
rc = posix_acl_update_mode(inode, &mode, &acl);
|
||||
if (rc)
|
||||
return rc;
|
||||
if (inode->i_mode != mode) {
|
||||
struct iattr attr;
|
||||
|
|
@ -249,8 +250,6 @@ int jffs2_set_acl(struct inode *inode, struct posix_acl *acl, int type)
|
|||
if (rc < 0)
|
||||
return rc;
|
||||
}
|
||||
if (rc == 0)
|
||||
acl = NULL;
|
||||
}
|
||||
break;
|
||||
case ACL_TYPE_DEFAULT:
|
||||
|
|
|
|||
|
|
@ -84,13 +84,11 @@ static int __jfs_set_acl(tid_t tid, struct inode *inode, int type,
|
|||
case ACL_TYPE_ACCESS:
|
||||
ea_name = POSIX_ACL_XATTR_ACCESS;
|
||||
if (acl) {
|
||||
rc = posix_acl_equiv_mode(acl, &inode->i_mode);
|
||||
if (rc < 0)
|
||||
rc = posix_acl_update_mode(inode, &inode->i_mode, &acl);
|
||||
if (rc)
|
||||
return rc;
|
||||
inode->i_ctime = CURRENT_TIME;
|
||||
mark_inode_dirty(inode);
|
||||
if (rc == 0)
|
||||
acl = NULL;
|
||||
}
|
||||
break;
|
||||
case ACL_TYPE_DEFAULT:
|
||||
|
|
|
|||
|
|
@ -241,13 +241,11 @@ int ocfs2_set_acl(handle_t *handle,
|
|||
case ACL_TYPE_ACCESS:
|
||||
name_index = OCFS2_XATTR_INDEX_POSIX_ACL_ACCESS;
|
||||
if (acl) {
|
||||
umode_t mode = inode->i_mode;
|
||||
ret = posix_acl_equiv_mode(acl, &mode);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
umode_t mode;
|
||||
|
||||
if (ret == 0)
|
||||
acl = NULL;
|
||||
ret = posix_acl_update_mode(inode, &mode, &acl);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
ret = ocfs2_acl_set_mode(inode, di_bh,
|
||||
handle, mode);
|
||||
|
|
|
|||
|
|
@ -592,6 +592,37 @@ posix_acl_create(struct inode *dir, umode_t *mode,
|
|||
}
|
||||
EXPORT_SYMBOL_GPL(posix_acl_create);
|
||||
|
||||
/**
|
||||
* posix_acl_update_mode - update mode in set_acl
|
||||
*
|
||||
* Update the file mode when setting an ACL: compute the new file permission
|
||||
* bits based on the ACL. In addition, if the ACL is equivalent to the new
|
||||
* file mode, set *acl to NULL to indicate that no ACL should be set.
|
||||
*
|
||||
* As with chmod, clear the setgit bit if the caller is not in the owning group
|
||||
* or capable of CAP_FSETID (see inode_change_ok).
|
||||
*
|
||||
* Called from set_acl inode operations.
|
||||
*/
|
||||
int posix_acl_update_mode(struct inode *inode, umode_t *mode_p,
|
||||
struct posix_acl **acl)
|
||||
{
|
||||
umode_t mode = inode->i_mode;
|
||||
int error;
|
||||
|
||||
error = posix_acl_equiv_mode(*acl, &mode);
|
||||
if (error < 0)
|
||||
return error;
|
||||
if (error == 0)
|
||||
*acl = NULL;
|
||||
if (!in_group_p(inode->i_gid) &&
|
||||
!capable_wrt_inode_uidgid(inode, CAP_FSETID))
|
||||
mode &= ~S_ISGID;
|
||||
*mode_p = mode;
|
||||
return 0;
|
||||
}
|
||||
EXPORT_SYMBOL(posix_acl_update_mode);
|
||||
|
||||
/*
|
||||
* Fix up the uids and gids in posix acl extended attributes in place.
|
||||
*/
|
||||
|
|
|
|||
|
|
@ -246,13 +246,9 @@ __reiserfs_set_acl(struct reiserfs_transaction_handle *th, struct inode *inode,
|
|||
case ACL_TYPE_ACCESS:
|
||||
name = POSIX_ACL_XATTR_ACCESS;
|
||||
if (acl) {
|
||||
error = posix_acl_equiv_mode(acl, &inode->i_mode);
|
||||
if (error < 0)
|
||||
error = posix_acl_update_mode(inode, &inode->i_mode, &acl);
|
||||
if (error)
|
||||
return error;
|
||||
else {
|
||||
if (error == 0)
|
||||
acl = NULL;
|
||||
}
|
||||
}
|
||||
break;
|
||||
case ACL_TYPE_DEFAULT:
|
||||
|
|
|
|||
|
|
@ -288,16 +288,11 @@ xfs_set_acl(struct inode *inode, struct posix_acl *acl, int type)
|
|||
return error;
|
||||
|
||||
if (type == ACL_TYPE_ACCESS) {
|
||||
umode_t mode = inode->i_mode;
|
||||
error = posix_acl_equiv_mode(acl, &mode);
|
||||
|
||||
if (error <= 0) {
|
||||
acl = NULL;
|
||||
|
||||
if (error < 0)
|
||||
return error;
|
||||
}
|
||||
umode_t mode;
|
||||
|
||||
error = posix_acl_update_mode(inode, &mode, &acl);
|
||||
if (error)
|
||||
return error;
|
||||
error = xfs_set_mode(inode, mode);
|
||||
if (error)
|
||||
return error;
|
||||
|
|
|
|||
|
|
@ -1029,7 +1029,8 @@ static inline int drm_debugfs_remove_files(const struct drm_info_list *files,
|
|||
#endif
|
||||
|
||||
extern struct dma_buf *drm_gem_prime_export(struct drm_device *dev,
|
||||
struct drm_gem_object *obj, int flags);
|
||||
struct drm_gem_object *obj,
|
||||
int flags);
|
||||
extern int drm_gem_prime_handle_to_fd(struct drm_device *dev,
|
||||
struct drm_file *file_priv, uint32_t handle, uint32_t flags,
|
||||
int *prime_fd);
|
||||
|
|
|
|||
|
|
@ -1986,8 +1986,8 @@ struct napi_gro_cb {
|
|||
/* This is non-zero if the packet may be of the same flow. */
|
||||
u8 same_flow:1;
|
||||
|
||||
/* Used in udp_gro_receive */
|
||||
u8 udp_mark:1;
|
||||
/* Used in tunnel GRO receive */
|
||||
u8 encap_mark:1;
|
||||
|
||||
/* GRO checksum is valid */
|
||||
u8 csum_valid:1;
|
||||
|
|
|
|||
|
|
@ -95,6 +95,7 @@ extern int set_posix_acl(struct inode *, int, struct posix_acl *);
|
|||
extern int posix_acl_chmod(struct inode *, umode_t);
|
||||
extern int posix_acl_create(struct inode *, umode_t *, struct posix_acl **,
|
||||
struct posix_acl **);
|
||||
extern int posix_acl_update_mode(struct inode *, umode_t *, struct posix_acl **);
|
||||
|
||||
extern int simple_set_acl(struct inode *, struct posix_acl *, int);
|
||||
extern int simple_acl_create(struct inode *, struct inode *);
|
||||
|
|
|
|||
|
|
@ -283,6 +283,22 @@ struct metadata_dst *iptunnel_metadata_reply(struct metadata_dst *md,
|
|||
struct sk_buff *iptunnel_handle_offloads(struct sk_buff *skb, bool gre_csum,
|
||||
int gso_type_mask);
|
||||
|
||||
static inline int iptunnel_pull_offloads(struct sk_buff *skb)
|
||||
{
|
||||
if (skb_is_gso(skb)) {
|
||||
int err;
|
||||
|
||||
err = skb_unclone(skb, GFP_ATOMIC);
|
||||
if (unlikely(err))
|
||||
return err;
|
||||
skb_shinfo(skb)->gso_type &= ~(NETIF_F_GSO_ENCAP_ALL >>
|
||||
NETIF_F_GSO_SHIFT);
|
||||
}
|
||||
|
||||
skb->encapsulation = 0;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static inline void iptunnel_xmit_stats(int err,
|
||||
struct net_device_stats *err_stats,
|
||||
struct pcpu_sw_netstats __percpu *stats)
|
||||
|
|
|
|||
|
|
@ -411,8 +411,29 @@ int irq_map_generic_chip(struct irq_domain *d, unsigned int virq,
|
|||
}
|
||||
EXPORT_SYMBOL_GPL(irq_map_generic_chip);
|
||||
|
||||
static void irq_unmap_generic_chip(struct irq_domain *d, unsigned int virq)
|
||||
{
|
||||
struct irq_data *data = irq_domain_get_irq_data(d, virq);
|
||||
struct irq_domain_chip_generic *dgc = d->gc;
|
||||
unsigned int hw_irq = data->hwirq;
|
||||
struct irq_chip_generic *gc;
|
||||
int irq_idx;
|
||||
|
||||
gc = irq_get_domain_generic_chip(d, hw_irq);
|
||||
if (!gc)
|
||||
return;
|
||||
|
||||
irq_idx = hw_irq % dgc->irqs_per_chip;
|
||||
|
||||
clear_bit(irq_idx, &gc->installed);
|
||||
irq_domain_set_info(d, virq, hw_irq, &no_irq_chip, NULL, NULL, NULL,
|
||||
NULL);
|
||||
|
||||
}
|
||||
|
||||
struct irq_domain_ops irq_generic_chip_ops = {
|
||||
.map = irq_map_generic_chip,
|
||||
.unmap = irq_unmap_generic_chip,
|
||||
.xlate = irq_domain_xlate_onetwocell,
|
||||
};
|
||||
EXPORT_SYMBOL_GPL(irq_generic_chip_ops);
|
||||
|
|
|
|||
13
mm/hugetlb.c
13
mm/hugetlb.c
|
|
@ -1416,12 +1416,13 @@ static void dissolve_free_huge_page(struct page *page)
|
|||
{
|
||||
spin_lock(&hugetlb_lock);
|
||||
if (PageHuge(page) && !page_count(page)) {
|
||||
struct hstate *h = page_hstate(page);
|
||||
int nid = page_to_nid(page);
|
||||
list_del(&page->lru);
|
||||
struct page *head = compound_head(page);
|
||||
struct hstate *h = page_hstate(head);
|
||||
int nid = page_to_nid(head);
|
||||
list_del(&head->lru);
|
||||
h->free_huge_pages--;
|
||||
h->free_huge_pages_node[nid]--;
|
||||
update_and_free_page(h, page);
|
||||
update_and_free_page(h, head);
|
||||
}
|
||||
spin_unlock(&hugetlb_lock);
|
||||
}
|
||||
|
|
@ -1429,7 +1430,8 @@ static void dissolve_free_huge_page(struct page *page)
|
|||
/*
|
||||
* Dissolve free hugepages in a given pfn range. Used by memory hotplug to
|
||||
* make specified memory blocks removable from the system.
|
||||
* Note that start_pfn should aligned with (minimum) hugepage size.
|
||||
* Note that this will dissolve a free gigantic hugepage completely, if any
|
||||
* part of it lies within the given range.
|
||||
*/
|
||||
void dissolve_free_huge_pages(unsigned long start_pfn, unsigned long end_pfn)
|
||||
{
|
||||
|
|
@ -1438,7 +1440,6 @@ void dissolve_free_huge_pages(unsigned long start_pfn, unsigned long end_pfn)
|
|||
if (!hugepages_supported())
|
||||
return;
|
||||
|
||||
VM_BUG_ON(!IS_ALIGNED(start_pfn, 1 << minimum_order));
|
||||
for (pfn = start_pfn; pfn < end_pfn; pfn += 1 << minimum_order)
|
||||
dissolve_free_huge_page(pfn_to_page(pfn));
|
||||
}
|
||||
|
|
|
|||
|
|
@ -4239,7 +4239,7 @@ static enum gro_result dev_gro_receive(struct napi_struct *napi, struct sk_buff
|
|||
NAPI_GRO_CB(skb)->same_flow = 0;
|
||||
NAPI_GRO_CB(skb)->flush = 0;
|
||||
NAPI_GRO_CB(skb)->free = 0;
|
||||
NAPI_GRO_CB(skb)->udp_mark = 0;
|
||||
NAPI_GRO_CB(skb)->encap_mark = 0;
|
||||
NAPI_GRO_CB(skb)->gro_remcsum_start = 0;
|
||||
|
||||
/* Setup for GRO checksum validation */
|
||||
|
|
|
|||
|
|
@ -1398,6 +1398,19 @@ static struct sk_buff **inet_gro_receive(struct sk_buff **head,
|
|||
return pp;
|
||||
}
|
||||
|
||||
static struct sk_buff **ipip_gro_receive(struct sk_buff **head,
|
||||
struct sk_buff *skb)
|
||||
{
|
||||
if (NAPI_GRO_CB(skb)->encap_mark) {
|
||||
NAPI_GRO_CB(skb)->flush = 1;
|
||||
return NULL;
|
||||
}
|
||||
|
||||
NAPI_GRO_CB(skb)->encap_mark = 1;
|
||||
|
||||
return inet_gro_receive(head, skb);
|
||||
}
|
||||
|
||||
int inet_recv_error(struct sock *sk, struct msghdr *msg, int len, int *addr_len)
|
||||
{
|
||||
if (sk->sk_family == AF_INET)
|
||||
|
|
@ -1440,6 +1453,13 @@ static int inet_gro_complete(struct sk_buff *skb, int nhoff)
|
|||
return err;
|
||||
}
|
||||
|
||||
static int ipip_gro_complete(struct sk_buff *skb, int nhoff)
|
||||
{
|
||||
skb->encapsulation = 1;
|
||||
skb_shinfo(skb)->gso_type |= SKB_GSO_IPIP;
|
||||
return inet_gro_complete(skb, nhoff);
|
||||
}
|
||||
|
||||
int inet_ctl_sock_create(struct sock **sk, unsigned short family,
|
||||
unsigned short type, unsigned char protocol,
|
||||
struct net *net)
|
||||
|
|
@ -1667,8 +1687,8 @@ static struct packet_offload ip_packet_offload __read_mostly = {
|
|||
static const struct net_offload ipip_offload = {
|
||||
.callbacks = {
|
||||
.gso_segment = inet_gso_segment,
|
||||
.gro_receive = inet_gro_receive,
|
||||
.gro_complete = inet_gro_complete,
|
||||
.gro_receive = ipip_gro_receive,
|
||||
.gro_complete = ipip_gro_complete,
|
||||
},
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -48,7 +48,7 @@ static inline struct fou *fou_from_sock(struct sock *sk)
|
|||
return sk->sk_user_data;
|
||||
}
|
||||
|
||||
static void fou_recv_pull(struct sk_buff *skb, size_t len)
|
||||
static int fou_recv_pull(struct sk_buff *skb, size_t len)
|
||||
{
|
||||
struct iphdr *iph = ip_hdr(skb);
|
||||
|
||||
|
|
@ -59,6 +59,7 @@ static void fou_recv_pull(struct sk_buff *skb, size_t len)
|
|||
__skb_pull(skb, len);
|
||||
skb_postpull_rcsum(skb, udp_hdr(skb), len);
|
||||
skb_reset_transport_header(skb);
|
||||
return iptunnel_pull_offloads(skb);
|
||||
}
|
||||
|
||||
static int fou_udp_recv(struct sock *sk, struct sk_buff *skb)
|
||||
|
|
@ -68,9 +69,14 @@ static int fou_udp_recv(struct sock *sk, struct sk_buff *skb)
|
|||
if (!fou)
|
||||
return 1;
|
||||
|
||||
fou_recv_pull(skb, sizeof(struct udphdr));
|
||||
if (fou_recv_pull(skb, sizeof(struct udphdr)))
|
||||
goto drop;
|
||||
|
||||
return -fou->protocol;
|
||||
|
||||
drop:
|
||||
kfree_skb(skb);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct guehdr *gue_remcsum(struct sk_buff *skb, struct guehdr *guehdr,
|
||||
|
|
@ -170,6 +176,9 @@ static int gue_udp_recv(struct sock *sk, struct sk_buff *skb)
|
|||
__skb_pull(skb, sizeof(struct udphdr) + hdrlen);
|
||||
skb_reset_transport_header(skb);
|
||||
|
||||
if (iptunnel_pull_offloads(skb))
|
||||
goto drop;
|
||||
|
||||
return -guehdr->proto_ctype;
|
||||
|
||||
drop:
|
||||
|
|
|
|||
|
|
@ -128,6 +128,11 @@ static struct sk_buff **gre_gro_receive(struct sk_buff **head,
|
|||
struct packet_offload *ptype;
|
||||
__be16 type;
|
||||
|
||||
if (NAPI_GRO_CB(skb)->encap_mark)
|
||||
goto out;
|
||||
|
||||
NAPI_GRO_CB(skb)->encap_mark = 1;
|
||||
|
||||
off = skb_gro_offset(skb);
|
||||
hlen = off + sizeof(*greh);
|
||||
greh = skb_gro_header_fast(skb, off);
|
||||
|
|
|
|||
|
|
@ -116,7 +116,8 @@ int iptunnel_pull_header(struct sk_buff *skb, int hdr_len, __be16 inner_proto)
|
|||
skb->vlan_tci = 0;
|
||||
skb_set_queue_mapping(skb, 0);
|
||||
skb->pkt_type = PACKET_HOST;
|
||||
return 0;
|
||||
|
||||
return iptunnel_pull_offloads(skb);
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(iptunnel_pull_header);
|
||||
|
||||
|
|
|
|||
|
|
@ -299,14 +299,14 @@ struct sk_buff **udp_gro_receive(struct sk_buff **head, struct sk_buff *skb,
|
|||
unsigned int off = skb_gro_offset(skb);
|
||||
int flush = 1;
|
||||
|
||||
if (NAPI_GRO_CB(skb)->udp_mark ||
|
||||
if (NAPI_GRO_CB(skb)->encap_mark ||
|
||||
(skb->ip_summed != CHECKSUM_PARTIAL &&
|
||||
NAPI_GRO_CB(skb)->csum_cnt == 0 &&
|
||||
!NAPI_GRO_CB(skb)->csum_valid))
|
||||
goto out;
|
||||
|
||||
/* mark that this skb passed once through the udp gro layer */
|
||||
NAPI_GRO_CB(skb)->udp_mark = 1;
|
||||
/* mark that this skb passed once through the tunnel gro layer */
|
||||
NAPI_GRO_CB(skb)->encap_mark = 1;
|
||||
|
||||
rcu_read_lock();
|
||||
uo_priv = rcu_dereference(udp_offload_base);
|
||||
|
|
|
|||
|
|
@ -258,6 +258,19 @@ static struct sk_buff **ipv6_gro_receive(struct sk_buff **head,
|
|||
return pp;
|
||||
}
|
||||
|
||||
static struct sk_buff **sit_gro_receive(struct sk_buff **head,
|
||||
struct sk_buff *skb)
|
||||
{
|
||||
if (NAPI_GRO_CB(skb)->encap_mark) {
|
||||
NAPI_GRO_CB(skb)->flush = 1;
|
||||
return NULL;
|
||||
}
|
||||
|
||||
NAPI_GRO_CB(skb)->encap_mark = 1;
|
||||
|
||||
return ipv6_gro_receive(head, skb);
|
||||
}
|
||||
|
||||
static int ipv6_gro_complete(struct sk_buff *skb, int nhoff)
|
||||
{
|
||||
const struct net_offload *ops;
|
||||
|
|
@ -302,7 +315,7 @@ static struct packet_offload ipv6_packet_offload __read_mostly = {
|
|||
static const struct net_offload sit_offload = {
|
||||
.callbacks = {
|
||||
.gso_segment = ipv6_gso_segment,
|
||||
.gro_receive = ipv6_gro_receive,
|
||||
.gro_receive = sit_gro_receive,
|
||||
.gro_complete = sit_gro_complete,
|
||||
},
|
||||
};
|
||||
|
|
|
|||
|
|
@ -681,14 +681,15 @@ static int ipip6_rcv(struct sk_buff *skb)
|
|||
skb->mac_header = skb->network_header;
|
||||
skb_reset_network_header(skb);
|
||||
IPCB(skb)->flags = 0;
|
||||
skb->protocol = htons(ETH_P_IPV6);
|
||||
skb->dev = tunnel->dev;
|
||||
|
||||
if (packet_is_spoofed(skb, iph, tunnel)) {
|
||||
tunnel->dev->stats.rx_errors++;
|
||||
goto out;
|
||||
}
|
||||
|
||||
__skb_tunnel_rx(skb, tunnel->dev, tunnel->net);
|
||||
if (iptunnel_pull_header(skb, 0, htons(ETH_P_IPV6)))
|
||||
goto out;
|
||||
|
||||
err = IP_ECN_decapsulate(iph, skb);
|
||||
if (unlikely(err)) {
|
||||
|
|
|
|||
|
|
@ -823,6 +823,7 @@ static int dapm_create_or_share_kcontrol(struct snd_soc_dapm_widget *w,
|
|||
case snd_soc_dapm_switch:
|
||||
case snd_soc_dapm_mixer:
|
||||
case snd_soc_dapm_pga:
|
||||
case snd_soc_dapm_out_drv:
|
||||
wname_in_long_name = true;
|
||||
kcname_in_long_name = true;
|
||||
break;
|
||||
|
|
@ -3015,6 +3016,9 @@ int snd_soc_dapm_get_volsw(struct snd_kcontrol *kcontrol,
|
|||
}
|
||||
mutex_unlock(&card->dapm_mutex);
|
||||
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
if (invert)
|
||||
ucontrol->value.integer.value[0] = max - val;
|
||||
else
|
||||
|
|
@ -3166,7 +3170,7 @@ int snd_soc_dapm_put_enum_double(struct snd_kcontrol *kcontrol,
|
|||
if (e->shift_l != e->shift_r) {
|
||||
if (item[1] > e->items)
|
||||
return -EINVAL;
|
||||
val |= snd_soc_enum_item_to_val(e, item[1]) << e->shift_l;
|
||||
val |= snd_soc_enum_item_to_val(e, item[1]) << e->shift_r;
|
||||
mask |= e->mask << e->shift_r;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -1484,6 +1484,7 @@ static int soc_tplg_dapm_widget_create(struct soc_tplg *tplg,
|
|||
if (widget == NULL) {
|
||||
dev_err(tplg->dev, "ASoC: failed to create widget %s controls\n",
|
||||
w->name);
|
||||
ret = -ENOMEM;
|
||||
goto hdr_err;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -684,7 +684,6 @@ static int __hpp__slsmg_color_printf(struct perf_hpp *hpp, const char *fmt, ...)
|
|||
ret = scnprintf(hpp->buf, hpp->size, fmt, len, percent);
|
||||
ui_browser__printf(arg->b, "%s", hpp->buf);
|
||||
|
||||
advance_hpp(hpp, ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -311,6 +311,16 @@ int perf_stat_process_counter(struct perf_stat_config *config,
|
|||
|
||||
aggr->val = aggr->ena = aggr->run = 0;
|
||||
|
||||
/*
|
||||
* We calculate counter's data every interval,
|
||||
* and the display code shows ps->res_stats
|
||||
* avg value. We need to zero the stats for
|
||||
* interval mode, otherwise overall avg running
|
||||
* averages will be shown for each interval.
|
||||
*/
|
||||
if (config->interval)
|
||||
init_stats(ps->res_stats);
|
||||
|
||||
if (counter->per_pkg)
|
||||
zero_per_pkg(counter);
|
||||
|
||||
|
|
|
|||
|
|
@ -1091,9 +1091,8 @@ int dso__load_sym(struct dso *dso, struct map *map,
|
|||
* For misannotated, zeroed, ASM function sizes.
|
||||
*/
|
||||
if (nr > 0) {
|
||||
if (!symbol_conf.allow_aliases)
|
||||
symbols__fixup_duplicate(&dso->symbols[map->type]);
|
||||
symbols__fixup_end(&dso->symbols[map->type]);
|
||||
symbols__fixup_duplicate(&dso->symbols[map->type]);
|
||||
if (kmap) {
|
||||
/*
|
||||
* We need to fixup this here too because we create new
|
||||
|
|
|
|||
|
|
@ -151,6 +151,9 @@ void symbols__fixup_duplicate(struct rb_root *symbols)
|
|||
struct rb_node *nd;
|
||||
struct symbol *curr, *next;
|
||||
|
||||
if (symbol_conf.allow_aliases)
|
||||
return;
|
||||
|
||||
nd = rb_first(symbols);
|
||||
|
||||
while (nd) {
|
||||
|
|
@ -1275,8 +1278,8 @@ int dso__load_kallsyms(struct dso *dso, const char *filename,
|
|||
if (kallsyms__delta(map, filename, &delta))
|
||||
return -1;
|
||||
|
||||
symbols__fixup_duplicate(&dso->symbols[map->type]);
|
||||
symbols__fixup_end(&dso->symbols[map->type]);
|
||||
symbols__fixup_duplicate(&dso->symbols[map->type]);
|
||||
|
||||
if (dso->kernel == DSO_TYPE_GUEST_KERNEL)
|
||||
dso->symtab_type = DSO_BINARY_TYPE__GUEST_KALLSYMS;
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user