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drm/i915: Remove the XELPD specific AUX and DDI power domains

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The spec calls the XELPD_D/E ports just D/E, the platform prefix in the
domain names was only needed by the port->domain mapping relying on
matching enum values for the whole port/domain range (and the
corresponding aliasing between the platform specific domain enums).
Since a previous patch we can define the port->domain mapping explicitly
so do this by reusing the already existing D/E power domain names.

Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Jouni Högander <jouni.hogander@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220414210657.1785773-18-imre.deak@intel.com
This commit is contained in:
Imre Deak 2022-04-15 00:06:57 +03:00
parent 2431f38c17
commit 799da9837d
3 changed files with 11 additions and 38 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

18
drivers/gpu/drm/i915/display/intel_display_power.c
View File

@ -92,10 +92,6 @@ intel_display_power_domain_str(enum intel_display_power_domain domain)
return "PORT_DDI_LANES_TC5";
case POWER_DOMAIN_PORT_DDI_LANES_TC6:
return "PORT_DDI_LANES_TC6";
case POWER_DOMAIN_PORT_DDI_LANES_D_XELPD:
return "PORT_DDI_LANES_D_XELPD";
case POWER_DOMAIN_PORT_DDI_LANES_E_XELPD:
return "PORT_DDI_LANES_E_XELPD";
case POWER_DOMAIN_PORT_DDI_IO_A:
return "PORT_DDI_IO_A";
case POWER_DOMAIN_PORT_DDI_IO_B:
@ -120,10 +116,6 @@ intel_display_power_domain_str(enum intel_display_power_domain domain)
return "PORT_DDI_IO_TC5";
case POWER_DOMAIN_PORT_DDI_IO_TC6:
return "PORT_DDI_IO_TC6";
case POWER_DOMAIN_PORT_DDI_IO_D_XELPD:
return "PORT_DDI_IO_D_XELPD";
case POWER_DOMAIN_PORT_DDI_IO_E_XELPD:
return "PORT_DDI_IO_E_XELPD";
case POWER_DOMAIN_PORT_DSI:
return "PORT_DSI";
case POWER_DOMAIN_PORT_CRT:
@ -160,10 +152,6 @@ intel_display_power_domain_str(enum intel_display_power_domain domain)
return "AUX_USBC5";
case POWER_DOMAIN_AUX_USBC6:
return "AUX_USBC6";
case POWER_DOMAIN_AUX_D_XELPD:
return "AUX_D_XELPD";
case POWER_DOMAIN_AUX_E_XELPD:
return "AUX_E_XELPD";
case POWER_DOMAIN_AUX_IO_A:
return "AUX_IO_A";
case POWER_DOMAIN_AUX_TBT1:
@ -2390,9 +2378,9 @@ d13_port_domains[] = {
.aux_ch_start = AUX_CH_D_XELPD,
.aux_ch_end = AUX_CH_E_XELPD,
.ddi_lanes = POWER_DOMAIN_PORT_DDI_LANES_D_XELPD,
.ddi_io = POWER_DOMAIN_PORT_DDI_IO_D_XELPD,
.aux_legacy_usbc = POWER_DOMAIN_AUX_D_XELPD,
.ddi_lanes = POWER_DOMAIN_PORT_DDI_LANES_D,
.ddi_io = POWER_DOMAIN_PORT_DDI_IO_D,
.aux_legacy_usbc = POWER_DOMAIN_AUX_D,
.aux_tbt = POWER_DOMAIN_INVALID,
},
};

9
drivers/gpu/drm/i915/display/intel_display_power.h
View File

@ -56,9 +56,6 @@ enum intel_display_power_domain {
POWER_DOMAIN_PORT_DDI_LANES_TC5,
POWER_DOMAIN_PORT_DDI_LANES_TC6,
POWER_DOMAIN_PORT_DDI_LANES_D_XELPD,
POWER_DOMAIN_PORT_DDI_LANES_E_XELPD,
POWER_DOMAIN_PORT_DDI_IO_A,
POWER_DOMAIN_PORT_DDI_IO_B,
POWER_DOMAIN_PORT_DDI_IO_C,
@ -73,9 +70,6 @@ enum intel_display_power_domain {
POWER_DOMAIN_PORT_DDI_IO_TC5,
POWER_DOMAIN_PORT_DDI_IO_TC6,
POWER_DOMAIN_PORT_DDI_IO_D_XELPD,
POWER_DOMAIN_PORT_DDI_IO_E_XELPD,
POWER_DOMAIN_PORT_DSI,
POWER_DOMAIN_PORT_CRT,
POWER_DOMAIN_PORT_OTHER,
@ -96,9 +90,6 @@ enum intel_display_power_domain {
POWER_DOMAIN_AUX_USBC5,
POWER_DOMAIN_AUX_USBC6,
POWER_DOMAIN_AUX_D_XELPD,
POWER_DOMAIN_AUX_E_XELPD,
POWER_DOMAIN_AUX_IO_A,
POWER_DOMAIN_AUX_TBT1,

22
drivers/gpu/drm/i915/display/intel_display_power_map.c
View File

@ -1207,8 +1207,8 @@ I915_DECL_PW_DOMAINS(xelpd_pwdoms_pw_a,
XELPD_PW_C_POWER_DOMAINS, \
XELPD_PW_D_POWER_DOMAINS, \
POWER_DOMAIN_PORT_DDI_LANES_C, \
POWER_DOMAIN_PORT_DDI_LANES_D_XELPD, \
POWER_DOMAIN_PORT_DDI_LANES_E_XELPD, \
POWER_DOMAIN_PORT_DDI_LANES_D, \
POWER_DOMAIN_PORT_DDI_LANES_E, \
POWER_DOMAIN_PORT_DDI_LANES_TC1, \
POWER_DOMAIN_PORT_DDI_LANES_TC2, \
POWER_DOMAIN_PORT_DDI_LANES_TC3, \
@ -1216,8 +1216,8 @@ I915_DECL_PW_DOMAINS(xelpd_pwdoms_pw_a,
POWER_DOMAIN_VGA, \
POWER_DOMAIN_AUDIO_PLAYBACK, \
POWER_DOMAIN_AUX_C, \
POWER_DOMAIN_AUX_D_XELPD, \
POWER_DOMAIN_AUX_E_XELPD, \
POWER_DOMAIN_AUX_D, \
POWER_DOMAIN_AUX_E, \
POWER_DOMAIN_AUX_USBC1, \
POWER_DOMAIN_AUX_USBC2, \
POWER_DOMAIN_AUX_USBC3, \
@ -1257,12 +1257,6 @@ I915_DECL_PW_DOMAINS(xelpd_pwdoms_dc_off,
POWER_DOMAIN_MODESET,
POWER_DOMAIN_INIT);
I915_DECL_PW_DOMAINS(xelpd_pwdoms_aux_d_xelpd, POWER_DOMAIN_AUX_D_XELPD);
I915_DECL_PW_DOMAINS(xelpd_pwdoms_aux_e_xelpd, POWER_DOMAIN_AUX_E_XELPD);
I915_DECL_PW_DOMAINS(xelpd_pwdoms_ddi_io_d_xelpd, POWER_DOMAIN_PORT_DDI_IO_D_XELPD);
I915_DECL_PW_DOMAINS(xelpd_pwdoms_ddi_io_e_xelpd, POWER_DOMAIN_PORT_DDI_IO_E_XELPD);
static const struct i915_power_well_desc xelpd_power_wells_main[] = {
{
.instances = &I915_PW_INSTANCES(
@ -1316,8 +1310,8 @@ static const struct i915_power_well_desc xelpd_power_wells_main[] = {
I915_PW("DDI_IO_A", &glk_pwdoms_ddi_io_a, .hsw.idx = ICL_PW_CTL_IDX_DDI_A),
I915_PW("DDI_IO_B", &glk_pwdoms_ddi_io_b, .hsw.idx = ICL_PW_CTL_IDX_DDI_B),
I915_PW("DDI_IO_C", &glk_pwdoms_ddi_io_c, .hsw.idx = ICL_PW_CTL_IDX_DDI_C),
I915_PW("DDI_IO_D_XELPD", &xelpd_pwdoms_ddi_io_d_xelpd, .hsw.idx = XELPD_PW_CTL_IDX_DDI_D),
I915_PW("DDI_IO_E_XELPD", &xelpd_pwdoms_ddi_io_e_xelpd, .hsw.idx = XELPD_PW_CTL_IDX_DDI_E),
I915_PW("DDI_IO_D", &icl_pwdoms_ddi_io_d, .hsw.idx = XELPD_PW_CTL_IDX_DDI_D),
I915_PW("DDI_IO_E", &icl_pwdoms_ddi_io_e, .hsw.idx = XELPD_PW_CTL_IDX_DDI_E),
I915_PW("DDI_IO_TC1", &tgl_pwdoms_ddi_io_tc1, .hsw.idx = TGL_PW_CTL_IDX_DDI_TC1),
I915_PW("DDI_IO_TC2", &tgl_pwdoms_ddi_io_tc2, .hsw.idx = TGL_PW_CTL_IDX_DDI_TC2),
I915_PW("DDI_IO_TC3", &tgl_pwdoms_ddi_io_tc3, .hsw.idx = TGL_PW_CTL_IDX_DDI_TC3),
@ -1329,8 +1323,8 @@ static const struct i915_power_well_desc xelpd_power_wells_main[] = {
I915_PW("AUX_A", &icl_pwdoms_aux_a, .hsw.idx = ICL_PW_CTL_IDX_AUX_A),
I915_PW("AUX_B", &icl_pwdoms_aux_b, .hsw.idx = ICL_PW_CTL_IDX_AUX_B),
I915_PW("AUX_C", &icl_pwdoms_aux_c, .hsw.idx = ICL_PW_CTL_IDX_AUX_C),
I915_PW("AUX_D_XELPD", &xelpd_pwdoms_aux_d_xelpd, .hsw.idx = XELPD_PW_CTL_IDX_AUX_D),
I915_PW("AUX_E_XELPD", &xelpd_pwdoms_aux_e_xelpd, .hsw.idx = XELPD_PW_CTL_IDX_AUX_E),
I915_PW("AUX_D", &icl_pwdoms_aux_d, .hsw.idx = XELPD_PW_CTL_IDX_AUX_D),
I915_PW("AUX_E", &icl_pwdoms_aux_e, .hsw.idx = XELPD_PW_CTL_IDX_AUX_E),
I915_PW("AUX_USBC1", &tgl_pwdoms_aux_usbc1, .hsw.idx = TGL_PW_CTL_IDX_AUX_TC1),
I915_PW("AUX_USBC2", &tgl_pwdoms_aux_usbc2, .hsw.idx = TGL_PW_CTL_IDX_AUX_TC2),
I915_PW("AUX_USBC3", &tgl_pwdoms_aux_usbc3, .hsw.idx = TGL_PW_CTL_IDX_AUX_TC3),