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scsi: ufs: host: mediatek: Add more UFSCHI hardware versions

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Introduce a function for version control to distinguish between new and
old platforms. Update the handling of hardware IP versions, ensuring
correct version comparisons by adjusting the version format for specific
projects.

Signed-off-by: Alice Chao <alice.chao@mediatek.com>
Link: https://lore.kernel.org/r/20250722030841.1998783-7-peter.wang@mediatek.com
Reviewed-by: Peter Wang <peter.wang@mediatek.com>
Reviewed-by: Chun-Hung Wu <chun-hung.wu@mediatek.com>
Signed-off-by: Peter Wang <peter.wang@mediatek.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
This commit is contained in:
Alice Chao 2025-07-22 11:07:21 +08:00 committed by Martin K. Petersen
parent 66e26a4b8a
commit 7996746394
2 changed files with 58 additions and 1 deletions
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47
drivers/ufs/host/ufs-mediatek.c
View File

@ -838,6 +838,51 @@ static void ufs_mtk_mcq_set_irq_affinity(struct ufs_hba *hba, unsigned int cpu)
dev_info(hba->dev, "set irq %d affinity to CPU: %d\n", irq, _cpu);
}
static bool ufs_mtk_is_legacy_chipset(struct ufs_hba *hba, u32 hw_ip_ver)
{
bool is_legacy = false;
switch (hw_ip_ver) {
case IP_LEGACY_VER_MT6893:
case IP_LEGACY_VER_MT6781:
/* can add other legacy chipset ID here accordingly */
is_legacy = true;
break;
default:
break;
}
dev_info(hba->dev, "legacy IP version - 0x%x, is legacy : %d", hw_ip_ver, is_legacy);
return is_legacy;
}
/*
* HW version format has been changed from 01MMmmmm to 1MMMmmmm, since
* project MT6878. In order to perform correct version comparison,
* version number is changed by SW for the following projects.
* IP_VER_MT6983 0x00360000 to 0x10360000
* IP_VER_MT6897 0x01440000 to 0x10440000
* IP_VER_MT6989 0x01450000 to 0x10450000
* IP_VER_MT6991 0x01460000 to 0x10460000
*/
static void ufs_mtk_get_hw_ip_version(struct ufs_hba *hba)
{
struct ufs_mtk_host *host = ufshcd_get_variant(hba);
u32 hw_ip_ver;
hw_ip_ver = ufshcd_readl(hba, REG_UFS_MTK_IP_VER);
if (((hw_ip_ver & (0xFF << 24)) == (0x1 << 24)) ||
((hw_ip_ver & (0xFF << 24)) == 0)) {
hw_ip_ver &= ~(0xFF << 24);
hw_ip_ver |= (0x1 << 28);
}
host->ip_ver = hw_ip_ver;
host->legacy_ip_ver = ufs_mtk_is_legacy_chipset(hba, hw_ip_ver);
}
static void ufs_mtk_get_controller_version(struct ufs_hba *hba)
{
struct ufs_mtk_host *host = ufshcd_get_variant(hba);
@ -1112,7 +1157,7 @@ static int ufs_mtk_init(struct ufs_hba *hba)
ufs_mtk_setup_clocks(hba, true, POST_CHANGE);
host->ip_ver = ufshcd_readl(hba, REG_UFS_MTK_IP_VER);
ufs_mtk_get_hw_ip_version(hba);
goto out;

12
drivers/ufs/host/ufs-mediatek.h
View File

@ -181,6 +181,7 @@ struct ufs_mtk_host {
u16 ref_clk_ungating_wait_us;
u16 ref_clk_gating_wait_us;
u32 ip_ver;
bool legacy_ip_ver;
bool mcq_set_intr;
bool is_mcq_intr_enabled;
@ -197,13 +198,24 @@ struct ufs_mtk_host {
/* UFSHCI MTK ip version value */
enum {
/* UFSHCI 3.1 */
IP_VER_MT6983 = 0x10360000,
IP_VER_MT6878 = 0x10420200,
/* UFSHCI 4.0 */
IP_VER_MT6897 = 0x10440000,
IP_VER_MT6989 = 0x10450000,
IP_VER_MT6899 = 0x10450100,
IP_VER_MT6991_A0 = 0x10460000,
IP_VER_MT6991_B0 = 0x10470000,
IP_VER_MT6993 = 0x10480000,
IP_VER_NONE = 0xFFFFFFFF
};
enum ip_ver_legacy {
IP_LEGACY_VER_MT6781 = 0x10380000,
IP_LEGACY_VER_MT6879 = 0x10360000,
IP_LEGACY_VER_MT6893 = 0x20160706
};
#endif /* !_UFS_MEDIATEK_H */