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drm/i915/dsb: add intel_dsb_gosub_finish()

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A DSB buffer which will be used for GOSUB execution does not need
the DEWAKE mechanism but still need to be 64 bit aligned. Add helper
to finish preparation of a dsb buffer to be executed with GOSUB
instruction.

v2: Add a cacheline of noops at the end of GOSUB buffer (Ville)

Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
Signed-off-by: Animesh Manna <animesh.manna@intel.com>
Link: https://lore.kernel.org/r/20250523062041.166468-6-chaitanya.kumar.borah@intel.com
This commit is contained in:
Chaitanya Kumar Borah 2025-05-23 11:50:35 +05:30 committed by Animesh Manna
parent 2c41d62f6f
commit 796b6df0f8
2 changed files with 14 additions and 0 deletions
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13
drivers/gpu/drm/i915/display/intel_dsb.c
View File

@ -606,6 +606,19 @@ void intel_dsb_gosub(struct intel_dsb *dsb,
intel_dsb_align_tail(dsb);
}
void intel_dsb_gosub_finish(struct intel_dsb *dsb)
{
intel_dsb_align_tail(dsb);
/*
* "All subroutines called by the GOSUB instruction
* must end with a cacheline of NOPs"
*/
intel_dsb_noop(dsb, 8);
intel_dsb_buffer_flush_map(&dsb->dsb_buf);
}
void intel_dsb_finish(struct intel_dsb *dsb)
{
struct intel_crtc *crtc = dsb->crtc;

1
drivers/gpu/drm/i915/display/intel_dsb.h
View File

@ -31,6 +31,7 @@ struct intel_dsb *intel_dsb_prepare(struct intel_atomic_state *state,
enum intel_dsb_id dsb_id,
unsigned int max_cmds);
void intel_dsb_finish(struct intel_dsb *dsb);
void intel_dsb_gosub_finish(struct intel_dsb *dsb);
void intel_dsb_cleanup(struct intel_dsb *dsb);
void intel_dsb_reg_write(struct intel_dsb *dsb,
i915_reg_t reg, u32 val);