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Fix the display-port-sound on Gru devices, DDR voltage on the Quartz-A

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board, fix emmc signal-integrity and usb OTG mode on rk3399-puma as well
 as a number of dtschema fixes to make the reduce the number of errors.
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Merge tag 'v5.17-rockchip-dtsfixes1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/fixes

Fix the display-port-sound on Gru devices, DDR voltage on the Quartz-A
board, fix emmc signal-integrity and usb OTG mode on rk3399-puma as well
as a number of dtschema fixes to make the reduce the number of errors.

* tag 'v5.17-rockchip-dtsfixes1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  ARM: dts: rockchip: fix a typo on rk3288 crypto-controller
  ARM: dts: rockchip: reorder rk322x hmdi clocks
  arm64: dts: rockchip: reorder rk3399 hdmi clocks
  arm64: dts: rockchip: align pl330 node name with dtschema
  arm64: dts: rockchip: fix rk3399-puma eMMC HS400 signal integrity
  arm64: dts: rockchip: fix Quartz64-A ddr regulator voltage
  arm64: dts: rockchip: Switch RK3399-Gru DP to SPDIF output
  arm64: dts: rockchip: fix rk3399-puma-haikou USB OTG mode
  arm64: dts: rockchip: drop pclk_xpcs from gmac0 on rk3568
  arm64: dts: rockchip: fix dma-controller node names on rk356x

Link: https://lore.kernel.org/r/1973741.CViHJPHrxy@phil
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2022-02-24 22:46:59 +01:00
commit 795a2ab1da
11 changed files with 45 additions and 21 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
arch/arm/boot/dts/rk322x.dtsi
View File

@ -718,8 +718,8 @@ hdmi: hdmi@200a0000 {
interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
assigned-clocks = <&cru SCLK_HDMI_PHY>;
assigned-clock-parents = <&hdmi_phy>;
clocks = <&cru SCLK_HDMI_HDCP>, <&cru PCLK_HDMI_CTRL>, <&cru SCLK_HDMI_CEC>;
clock-names = "isfr", "iahb", "cec";
clocks = <&cru PCLK_HDMI_CTRL>, <&cru SCLK_HDMI_HDCP>, <&cru SCLK_HDMI_CEC>;
clock-names = "iahb", "isfr", "cec";
pinctrl-names = "default";
pinctrl-0 = <&hdmii2c_xfer &hdmi_hpd &hdmi_cec>;
resets = <&cru SRST_HDMI_P>;

2
arch/arm/boot/dts/rk3288.dtsi
View File

@ -971,7 +971,7 @@ i2s: i2s@ff890000 {
status = "disabled";
};
crypto: cypto-controller@ff8a0000 {
crypto: crypto@ff8a0000 {
compatible = "rockchip,rk3288-crypto";
reg = <0x0 0xff8a0000 0x0 0x4000>;
interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;

2
arch/arm64/boot/dts/rockchip/px30.dtsi
View File

@ -711,7 +711,7 @@ rktimer: timer@ff210000 {
clock-names = "pclk", "timer";
};
dmac: dmac@ff240000 {
dmac: dma-controller@ff240000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x0 0xff240000 0x0 0x4000>;
interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,

2
arch/arm64/boot/dts/rockchip/rk3328.dtsi
View File

@ -489,7 +489,7 @@ pwm3: pwm@ff1b0030 {
status = "disabled";
};
dmac: dmac@ff1f0000 {
dmac: dma-controller@ff1f0000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x0 0xff1f0000 0x0 0x4000>;
interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,

17
arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi
View File

@ -286,7 +286,7 @@ max98357a: max98357a {
sound: sound {
compatible = "rockchip,rk3399-gru-sound";
rockchip,cpu = <&i2s0 &i2s2>;
rockchip,cpu = <&i2s0 &spdif>;
};
};
@ -437,10 +437,6 @@ &i2s0 {
status = "okay";
};
&i2s2 {
status = "okay";
};
&io_domains {
status = "okay";
@ -537,6 +533,17 @@ &sdmmc {
vqmmc-supply = <&ppvar_sd_card_io>;
};
&spdif {
status = "okay";
/*
* SPDIF is routed internally to DP; we either don't use these pins, or
* mux them to something else.
*/
/delete-property/ pinctrl-0;
/delete-property/ pinctrl-names;
};
&spi1 {
status = "okay";

1
arch/arm64/boot/dts/rockchip/rk3399-puma-haikou.dts
View File

@ -232,6 +232,7 @@ &usbdrd3_0 {
&usbdrd_dwc3_0 {
dr_mode = "otg";
extcon = <&extcon_usb3>;
status = "okay";
};

20
arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi
View File

@ -25,6 +25,13 @@ module_led: led-0 {
};
};
extcon_usb3: extcon-usb3 {
compatible = "linux,extcon-usb-gpio";
id-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&usb3_id>;
};
clkin_gmac: external-gmac-clock {
compatible = "fixed-clock";
clock-frequency = <125000000>;
@ -422,9 +429,22 @@ vcc5v0_host_en: vcc5v0-host-en {
<4 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
usb3 {
usb3_id: usb3-id {
rockchip,pins =
<1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};
&sdhci {
/*
* Signal integrity isn't great at 200MHz but 100MHz has proven stable
* enough.
*/
max-frequency = <100000000>;
bus-width = <8>;
mmc-hs400-1_8v;
mmc-hs400-enhanced-strobe;

6
arch/arm64/boot/dts/rockchip/rk3399.dtsi
View File

@ -1881,10 +1881,10 @@ hdmi: hdmi@ff940000 {
interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&cru PCLK_HDMI_CTRL>,
<&cru SCLK_HDMI_SFR>,
<&cru PLL_VPLL>,
<&cru SCLK_HDMI_CEC>,
<&cru PCLK_VIO_GRF>,
<&cru SCLK_HDMI_CEC>;
clock-names = "iahb", "isfr", "vpll", "grf", "cec";
<&cru PLL_VPLL>;
clock-names = "iahb", "isfr", "cec", "grf", "vpll";
power-domains = <&power RK3399_PD_HDCP>;
reg-io-width = <4>;
rockchip,grf = <&grf>;

2
arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts
View File

@ -285,8 +285,6 @@ regulator-state-mem {
vcc_ddr: DCDC_REG3 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1100000>;
regulator-initial-mode = <0x2>;
regulator-name = "vcc_ddr";
regulator-state-mem {

6
arch/arm64/boot/dts/rockchip/rk3568.dtsi
View File

@ -32,13 +32,11 @@ gmac0: ethernet@fe2a0000 {
clocks = <&cru SCLK_GMAC0>, <&cru SCLK_GMAC0_RX_TX>,
<&cru SCLK_GMAC0_RX_TX>, <&cru CLK_MAC0_REFOUT>,
<&cru ACLK_GMAC0>, <&cru PCLK_GMAC0>,
<&cru SCLK_GMAC0_RX_TX>, <&cru CLK_GMAC0_PTP_REF>,
<&cru PCLK_XPCS>;
<&cru SCLK_GMAC0_RX_TX>, <&cru CLK_GMAC0_PTP_REF>;
clock-names = "stmmaceth", "mac_clk_rx",
"mac_clk_tx", "clk_mac_refout",
"aclk_mac", "pclk_mac",
"clk_mac_speed", "ptp_ref",
"pclk_xpcs";
"clk_mac_speed", "ptp_ref";
resets = <&cru SRST_A_GMAC0>;
reset-names = "stmmaceth";
rockchip,grf = <&grf>;

4
arch/arm64/boot/dts/rockchip/rk356x.dtsi
View File

@ -651,7 +651,7 @@ &i2s1m0_sdo0 &i2s1m0_sdo1
status = "disabled";
};
dmac0: dmac@fe530000 {
dmac0: dma-controller@fe530000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x0 0xfe530000 0x0 0x4000>;
interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
@ -662,7 +662,7 @@ dmac0: dmac@fe530000 {
#dma-cells = <1>;
};
dmac1: dmac@fe550000 {
dmac1: dma-controller@fe550000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x0 0xfe550000 0x0 0x4000>;
interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,