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scsi: mpi3mr: Support Prepare for Reset event

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The IOC sends a Prepare for Reset Event to the host to prepare for a Soft
Reset. This event data has two reason codes:

 1. Start - The host is expected to gracefully quiesce all I/O within
    approximately 1 second.

 2. Abort - The IOC is requesting to abort a previous Prepare for Reset
    Event request. Normal I/O may be resumed.

Link: https://lore.kernel.org/r/20211220141159.16117-20-sreekanth.reddy@broadcom.com
Signed-off-by: Sreekanth Reddy <sreekanth.reddy@broadcom.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
This commit is contained in:
Sreekanth Reddy 2021-12-20 19:41:53 +05:30 committed by Martin K. Petersen
parent c1af985d27
commit 78b76a0768
3 changed files with 97 additions and 34 deletions
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6
drivers/scsi/mpi3mr/mpi3mr.h
View File

@ -114,6 +114,7 @@ extern int prot_mask;
#define MPI3MR_TSUPDATE_INTERVAL 900
#define MPI3MR_DEFAULT_SHUTDOWN_TIME 120
#define MPI3MR_RAID_ERRREC_RESET_TIMEOUT 180
#define MPI3MR_PREPARE_FOR_RESET_TIMEOUT 180
#define MPI3MR_RESET_ACK_TIMEOUT 30
#define MPI3MR_WATCHDOG_INTERVAL 1000 /* in milli seconds */
@ -693,6 +694,8 @@ struct scmd_priv {
* @prev_reset_result: Result of previous reset
* @reset_mutex: Controller reset mutex
* @reset_waitq: Controller reset wait queue
* @prepare_for_reset: Prepare for reset event received
* @prepare_for_reset_timeout_counter: Prepare for reset timeout
* @diagsave_timeout: Diagnostic information save timeout
* @logging_level: Controller debug logging level
* @flush_io_count: I/O count to flush after reset
@ -825,6 +828,9 @@ struct mpi3mr_ioc {
struct mutex reset_mutex;
wait_queue_head_t reset_waitq;
u8 prepare_for_reset;
u16 prepare_for_reset_timeout_counter;
u16 diagsave_timeout;
int logging_level;
u16 flush_io_count;

85
drivers/scsi/mpi3mr/mpi3mr_fw.c
View File

@ -2262,7 +2262,8 @@ static void mpi3mr_watchdog_work(struct work_struct *work)
container_of(work, struct mpi3mr_ioc, watchdog_work.work);
unsigned long flags;
enum mpi3mr_iocstate ioc_state;
u32 fault, host_diagnostic;
u32 fault, host_diagnostic, ioc_status;
u32 reset_reason = MPI3MR_RESET_FROM_FAULT_WATCH;
if (mrioc->reset_in_progress || mrioc->unrecoverable)
return;
@ -2272,44 +2273,56 @@ static void mpi3mr_watchdog_work(struct work_struct *work)
mpi3mr_sync_timestamp(mrioc);
}
if ((mrioc->prepare_for_reset) &&
((mrioc->prepare_for_reset_timeout_counter++) >=
MPI3MR_PREPARE_FOR_RESET_TIMEOUT)) {
mpi3mr_soft_reset_handler(mrioc,
MPI3MR_RESET_FROM_CIACTVRST_TIMER, 1);
return;
}
ioc_status = readl(&mrioc->sysif_regs->ioc_status);
if (ioc_status & MPI3_SYSIF_IOC_STATUS_RESET_HISTORY) {
mpi3mr_soft_reset_handler(mrioc, MPI3MR_RESET_FROM_FIRMWARE, 0);
return;
}
/*Check for fault state every one second and issue Soft reset*/
ioc_state = mpi3mr_get_iocstate(mrioc);
if (ioc_state == MRIOC_STATE_FAULT) {
fault = readl(&mrioc->sysif_regs->fault) &
MPI3_SYSIF_FAULT_CODE_MASK;
host_diagnostic = readl(&mrioc->sysif_regs->host_diagnostic);
if (host_diagnostic & MPI3_SYSIF_HOST_DIAG_SAVE_IN_PROGRESS) {
if (!mrioc->diagsave_timeout) {
mpi3mr_print_fault_info(mrioc);
ioc_warn(mrioc, "Diag save in progress\n");
}
if ((mrioc->diagsave_timeout++) <=
MPI3_SYSIF_DIAG_SAVE_TIMEOUT)
goto schedule_work;
} else
if (ioc_state != MRIOC_STATE_FAULT)
goto schedule_work;
fault = readl(&mrioc->sysif_regs->fault) & MPI3_SYSIF_FAULT_CODE_MASK;
host_diagnostic = readl(&mrioc->sysif_regs->host_diagnostic);
if (host_diagnostic & MPI3_SYSIF_HOST_DIAG_SAVE_IN_PROGRESS) {
if (!mrioc->diagsave_timeout) {
mpi3mr_print_fault_info(mrioc);
mrioc->diagsave_timeout = 0;
if (fault == MPI3_SYSIF_FAULT_CODE_POWER_CYCLE_REQUIRED) {
ioc_info(mrioc,
"Factory Reset fault occurred marking controller as unrecoverable"
);
mrioc->unrecoverable = 1;
goto out;
ioc_warn(mrioc, "diag save in progress\n");
}
if ((fault == MPI3_SYSIF_FAULT_CODE_DIAG_FAULT_RESET) ||
(fault == MPI3_SYSIF_FAULT_CODE_SOFT_RESET_IN_PROGRESS) ||
(mrioc->reset_in_progress))
goto out;
if (fault == MPI3_SYSIF_FAULT_CODE_CI_ACTIVATION_RESET)
mpi3mr_soft_reset_handler(mrioc,
MPI3MR_RESET_FROM_CIACTIV_FAULT, 0);
else
mpi3mr_soft_reset_handler(mrioc,
MPI3MR_RESET_FROM_FAULT_WATCH, 0);
if ((mrioc->diagsave_timeout++) <= MPI3_SYSIF_DIAG_SAVE_TIMEOUT)
goto schedule_work;
}
mpi3mr_print_fault_info(mrioc);
mrioc->diagsave_timeout = 0;
switch (fault) {
case MPI3_SYSIF_FAULT_CODE_POWER_CYCLE_REQUIRED:
ioc_info(mrioc,
"controller requires system power cycle, marking controller as unrecoverable\n");
mrioc->unrecoverable = 1;
return;
case MPI3_SYSIF_FAULT_CODE_SOFT_RESET_IN_PROGRESS:
return;
case MPI3_SYSIF_FAULT_CODE_CI_ACTIVATION_RESET:
reset_reason = MPI3MR_RESET_FROM_CIACTIV_FAULT;
break;
default:
break;
}
mpi3mr_soft_reset_handler(mrioc, reset_reason, 0);
return;
schedule_work:
spin_lock_irqsave(&mrioc->watchdog_lock, flags);
if (mrioc->watchdog_work_q)
@ -2317,7 +2330,6 @@ static void mpi3mr_watchdog_work(struct work_struct *work)
&mrioc->watchdog_work,
msecs_to_jiffies(MPI3MR_WATCHDOG_INTERVAL));
spin_unlock_irqrestore(&mrioc->watchdog_lock, flags);
out:
return;
}
@ -3488,6 +3500,7 @@ static int mpi3mr_enable_events(struct mpi3mr_ioc *mrioc)
mpi3mr_unmask_events(mrioc, MPI3_EVENT_SAS_BROADCAST_PRIMITIVE);
mpi3mr_unmask_events(mrioc, MPI3_EVENT_PCIE_TOPOLOGY_CHANGE_LIST);
mpi3mr_unmask_events(mrioc, MPI3_EVENT_PCIE_ENUMERATION);
mpi3mr_unmask_events(mrioc, MPI3_EVENT_PREPARE_FOR_RESET);
mpi3mr_unmask_events(mrioc, MPI3_EVENT_CABLE_MGMT);
mpi3mr_unmask_events(mrioc, MPI3_EVENT_ENERGY_PACK_CHANGE);
@ -4223,6 +4236,10 @@ int mpi3mr_soft_reset_handler(struct mpi3mr_ioc *mrioc,
mpi3mr_cleanup_fwevt_list(mrioc);
mpi3mr_flush_host_io(mrioc);
mpi3mr_invalidate_devhandles(mrioc);
if (mrioc->prepare_for_reset) {
mrioc->prepare_for_reset = 0;
mrioc->prepare_for_reset_timeout_counter = 0;
}
mpi3mr_memset_buffers(mrioc);
retval = mpi3mr_reinit_ioc(mrioc, 0);
if (retval) {

40
drivers/scsi/mpi3mr/mpi3mr_os.c
View File

@ -1988,6 +1988,40 @@ static void mpi3mr_devstatuschg_evt_th(struct mpi3mr_ioc *mrioc,
mpi3mr_tgtdev_put(tgtdev);
}
/**
* mpi3mr_preparereset_evt_th - Prepare for reset event tophalf
* @mrioc: Adapter instance reference
* @event_reply: event data
*
* Blocks and unblocks host level I/O based on the reason code
*
* Return: Nothing
*/
static void mpi3mr_preparereset_evt_th(struct mpi3mr_ioc *mrioc,
struct mpi3_event_notification_reply *event_reply)
{
struct mpi3_event_data_prepare_for_reset *evtdata =
(struct mpi3_event_data_prepare_for_reset *)event_reply->event_data;
if (evtdata->reason_code == MPI3_EVENT_PREPARE_RESET_RC_START) {
dprint_event_th(mrioc,
"prepare for reset event top half with rc=start\n");
if (mrioc->prepare_for_reset)
return;
mrioc->prepare_for_reset = 1;
mrioc->prepare_for_reset_timeout_counter = 0;
} else if (evtdata->reason_code == MPI3_EVENT_PREPARE_RESET_RC_ABORT) {
dprint_event_th(mrioc,
"prepare for reset top half with rc=abort\n");
mrioc->prepare_for_reset = 0;
mrioc->prepare_for_reset_timeout_counter = 0;
}
if ((event_reply->msg_flags & MPI3_EVENT_NOTIFY_MSGFLAGS_ACK_MASK)
== MPI3_EVENT_NOTIFY_MSGFLAGS_ACK_REQUIRED)
mpi3mr_send_event_ack(mrioc, event_reply->event, NULL,
le32_to_cpu(event_reply->event_context));
}
/**
* mpi3mr_energypackchg_evt_th - Energy pack change evt tophalf
* @mrioc: Adapter instance reference
@ -2075,6 +2109,12 @@ void mpi3mr_os_handle_events(struct mpi3mr_ioc *mrioc,
mpi3mr_pcietopochg_evt_th(mrioc, event_reply);
break;
}
case MPI3_EVENT_PREPARE_FOR_RESET:
{
mpi3mr_preparereset_evt_th(mrioc, event_reply);
ack_req = 0;
break;
}
case MPI3_EVENT_DEVICE_INFO_CHANGED:
{
process_evt_bh = 1;