Linux 6.15-rc1

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Merge tag 'v6.15-rc1' into x86/mm, to pick up fixes

Signed-off-by: Ingo Molnar <mingo@kernel.org>
This commit is contained in:
Ingo Molnar 2025-04-09 22:00:25 +02:00
commit 78a84fbfa4
2899 changed files with 71371 additions and 47986 deletions

1
.gitignore vendored
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@ -65,6 +65,7 @@ modules.order
/vmlinux.32
/vmlinux.map
/vmlinux.symvers
/vmlinux.unstripped
/vmlinux-gdb.py
/vmlinuz
/System.map

View File

@ -31,6 +31,13 @@ Alexander Lobakin <alobakin@pm.me> <alobakin@marvell.com>
Alexander Lobakin <alobakin@pm.me> <bloodyreaper@yandex.ru>
Alexander Mikhalitsyn <alexander@mihalicyn.com> <alexander.mikhalitsyn@virtuozzo.com>
Alexander Mikhalitsyn <alexander@mihalicyn.com> <aleksandr.mikhalitsyn@canonical.com>
Alexander Sverdlin <alexander.sverdlin@gmail.com> <alexander.sverdlin.ext@nsn.com>
Alexander Sverdlin <alexander.sverdlin@gmail.com> <alexander.sverdlin@gmx.de>
Alexander Sverdlin <alexander.sverdlin@gmail.com> <alexander.sverdlin@nokia.com>
Alexander Sverdlin <alexander.sverdlin@gmail.com> <alexander.sverdlin@nsn.com>
Alexander Sverdlin <alexander.sverdlin@gmail.com> <alexander.sverdlin@siemens.com>
Alexander Sverdlin <alexander.sverdlin@gmail.com> <alexander.sverdlin@sysgo.com>
Alexander Sverdlin <alexander.sverdlin@gmail.com> <subaparts@yandex.ru>
Alexandre Belloni <alexandre.belloni@bootlin.com> <alexandre.belloni@free-electrons.com>
Alexandre Ghiti <alex@ghiti.fr> <alexandre.ghiti@canonical.com>
Alexei Avshalom Lazar <quic_ailizaro@quicinc.com> <ailizaro@codeaurora.org>
@ -153,7 +160,6 @@ Carlos Bilbao <carlos.bilbao@kernel.org> <carlos.bilbao@amd.com>
Carlos Bilbao <carlos.bilbao@kernel.org> <carlos.bilbao.osdev@gmail.com>
Carlos Bilbao <carlos.bilbao@kernel.org> <bilbao@vt.edu>
Changbin Du <changbin.du@intel.com> <changbin.du@gmail.com>
Changbin Du <changbin.du@intel.com> <changbin.du@intel.com>
Chao Yu <chao@kernel.org> <chao2.yu@samsung.com>
Chao Yu <chao@kernel.org> <yuchao0@huawei.com>
Chester Lin <chester62515@gmail.com> <clin@suse.com>
@ -271,6 +277,7 @@ Hamza Mahfooz <hamzamahfooz@linux.microsoft.com> <hamza.mahfooz@amd.com>
Hanjun Guo <guohanjun@huawei.com> <hanjun.guo@linaro.org>
Hans Verkuil <hverkuil@xs4all.nl> <hansverk@cisco.com>
Hans Verkuil <hverkuil@xs4all.nl> <hverkuil-cisco@xs4all.nl>
Harry Yoo <harry.yoo@oracle.com> <42.hyeyoo@gmail.com>
Heiko Carstens <hca@linux.ibm.com> <h.carstens@de.ibm.com>
Heiko Carstens <hca@linux.ibm.com> <heiko.carstens@de.ibm.com>
Heiko Stuebner <heiko@sntech.de> <heiko.stuebner@bqreaders.com>
@ -305,7 +312,6 @@ Jan Glauber <jan.glauber@gmail.com> <jglauber@cavium.com>
Jan Kuliga <jtkuliga.kdev@gmail.com> <jankul@alatek.krakow.pl>
Jarkko Sakkinen <jarkko@kernel.org> <jarkko.sakkinen@linux.intel.com>
Jarkko Sakkinen <jarkko@kernel.org> <jarkko@profian.com>
Jarkko Sakkinen <jarkko@kernel.org> <jarkko.sakkinen@parity.io>
Jason Gunthorpe <jgg@ziepe.ca> <jgg@mellanox.com>
Jason Gunthorpe <jgg@ziepe.ca> <jgg@nvidia.com>
Jason Gunthorpe <jgg@ziepe.ca> <jgunthorpe@obsidianresearch.com>
@ -543,6 +549,8 @@ Nicolas Pitre <nico@fluxnic.net> <nicolas.pitre@linaro.org>
Nicolas Pitre <nico@fluxnic.net> <nico@linaro.org>
Nicolas Saenz Julienne <nsaenz@kernel.org> <nsaenzjulienne@suse.de>
Nicolas Saenz Julienne <nsaenz@kernel.org> <nsaenzjulienne@suse.com>
Nicolas Schier <nicolas.schier@linux.dev> <n.schier@avm.de>
Nicolas Schier <nicolas.schier@linux.dev> <nicolas@fjasle.eu>
Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Nikolay Aleksandrov <razor@blackwall.org> <naleksan@redhat.com>
Nikolay Aleksandrov <razor@blackwall.org> <nikolay@redhat.com>
@ -762,7 +770,6 @@ Vinod Koul <vkoul@kernel.org> <vkoul@infradead.org>
Viresh Kumar <vireshk@kernel.org> <viresh.kumar2@arm.com>
Viresh Kumar <vireshk@kernel.org> <viresh.kumar@st.com>
Viresh Kumar <vireshk@kernel.org> <viresh.linux@gmail.com>
Viresh Kumar <viresh.kumar@linaro.org> <viresh.kumar@linaro.org>
Viresh Kumar <viresh.kumar@linaro.org> <viresh.kumar@linaro.com>
Vishnu Dasa <vishnu.dasa@broadcom.com> <vdasa@vmware.com>
Vivek Aknurwar <quic_viveka@quicinc.com> <viveka@codeaurora.org>

15
CREDITS
View File

@ -317,6 +317,10 @@ S: Code 930.5, Goddard Space Flight Center
S: Greenbelt, Maryland 20771
S: USA
N: Joel Becker
E: jlbec@evilplan.org
D: configfs
N: Adam Belay
E: ambx1@neo.rr.com
D: Linux Plug and Play Support
@ -855,6 +859,10 @@ N: John Crispin
E: john@phrozen.org
D: MediaTek MT7623 Gigabit ethernet support
N: Conor Culhane
E: conor.culhane@silvaco.com
D: Silvaco I3C master driver
N: Laurence Culhane
E: loz@holmes.demon.co.uk
D: Wrote the initial alpha SLIP code
@ -1895,6 +1903,7 @@ S: Czech Republic
N: Seth Jennings
E: sjenning@redhat.com
D: Creation and maintenance of zswap
D: Creation and maintenace of the zbud allocator
N: Jeremy Kerr
D: Maintainer of SPU File System
@ -3661,6 +3670,10 @@ S: 149 Union St.
S: Kingston, Ontario
S: Canada K7L 2P4
N: Pravin B Shelar
E: pshelar@ovn.org
D: Open vSwitch maintenance and contributions
N: John Shifflett
E: john@geolog.com
E: jshiffle@netcom.com
@ -3803,6 +3816,7 @@ N: Dan Streetman
E: ddstreet@ieee.org
D: Maintenance and development of zswap
D: Creation and maintenance of the zpool API
D: Maintenace of the zbud allocator
N: Drew Sullivan
E: drew@ss.org
@ -4330,6 +4344,7 @@ S: England
N: Vitaly Wool
E: vitaly.wool@konsulko.com
D: Maintenance and development of zswap
D: Maintenance and development of z3fold
N: Chris Wright
E: chrisw@sous-sol.org

View File

@ -1,5 +1,4 @@
The cxl driver is no longer maintained, and will be removed from the kernel in
the near future.
The cxl driver was removed in 6.15.
Please note that attributes that are shared between devices are stored in
the directory pointed to by the symlink device/.
@ -10,7 +9,7 @@ For example, the real path of the attribute /sys/class/cxl/afu0.0s/irqs_max is
Slave contexts (eg. /sys/class/cxl/afu0.0s):
What: /sys/class/cxl/<afu>/afu_err_buf
Date: September 2014
Date: September 2014, removed February 2025
Contact: linuxppc-dev@lists.ozlabs.org
Description: read only
AFU Error Buffer contents. The contents of this file are
@ -21,7 +20,7 @@ Description: read only
What: /sys/class/cxl/<afu>/irqs_max
Date: September 2014
Date: September 2014, removed February 2025
Contact: linuxppc-dev@lists.ozlabs.org
Description: read/write
Decimal value of maximum number of interrupts that can be
@ -32,7 +31,7 @@ Description: read/write
Users: https://github.com/ibm-capi/libcxl
What: /sys/class/cxl/<afu>/irqs_min
Date: September 2014
Date: September 2014, removed February 2025
Contact: linuxppc-dev@lists.ozlabs.org
Description: read only
Decimal value of the minimum number of interrupts that
@ -42,7 +41,7 @@ Description: read only
Users: https://github.com/ibm-capi/libcxl
What: /sys/class/cxl/<afu>/mmio_size
Date: September 2014
Date: September 2014, removed February 2025
Contact: linuxppc-dev@lists.ozlabs.org
Description: read only
Decimal value of the size of the MMIO space that may be mmapped
@ -50,7 +49,7 @@ Description: read only
Users: https://github.com/ibm-capi/libcxl
What: /sys/class/cxl/<afu>/modes_supported
Date: September 2014
Date: September 2014, removed February 2025
Contact: linuxppc-dev@lists.ozlabs.org
Description: read only
List of the modes this AFU supports. One per line.
@ -58,7 +57,7 @@ Description: read only
Users: https://github.com/ibm-capi/libcxl
What: /sys/class/cxl/<afu>/mode
Date: September 2014
Date: September 2014, removed February 2025
Contact: linuxppc-dev@lists.ozlabs.org
Description: read/write
The current mode the AFU is using. Will be one of the modes
@ -68,7 +67,7 @@ Users: https://github.com/ibm-capi/libcxl
What: /sys/class/cxl/<afu>/prefault_mode
Date: September 2014
Date: September 2014, removed February 2025
Contact: linuxppc-dev@lists.ozlabs.org
Description: read/write
Set the mode for prefaulting in segments into the segment table
@ -88,7 +87,7 @@ Description: read/write
Users: https://github.com/ibm-capi/libcxl
What: /sys/class/cxl/<afu>/reset
Date: September 2014
Date: September 2014, removed February 2025
Contact: linuxppc-dev@lists.ozlabs.org
Description: write only
Writing 1 here will reset the AFU provided there are not
@ -96,14 +95,14 @@ Description: write only
Users: https://github.com/ibm-capi/libcxl
What: /sys/class/cxl/<afu>/api_version
Date: September 2014
Date: September 2014, removed February 2025
Contact: linuxppc-dev@lists.ozlabs.org
Description: read only
Decimal value of the current version of the kernel/user API.
Users: https://github.com/ibm-capi/libcxl
What: /sys/class/cxl/<afu>/api_version_compatible
Date: September 2014
Date: September 2014, removed February 2025
Contact: linuxppc-dev@lists.ozlabs.org
Description: read only
Decimal value of the lowest version of the userspace API
@ -117,7 +116,7 @@ An AFU may optionally export one or more PCIe like configuration records, known
as AFU configuration records, which will show up here (if present).
What: /sys/class/cxl/<afu>/cr<config num>/vendor
Date: February 2015
Date: February 2015, removed February 2025
Contact: linuxppc-dev@lists.ozlabs.org
Description: read only
Hexadecimal value of the vendor ID found in this AFU
@ -125,7 +124,7 @@ Description: read only
Users: https://github.com/ibm-capi/libcxl
What: /sys/class/cxl/<afu>/cr<config num>/device
Date: February 2015
Date: February 2015, removed February 2025
Contact: linuxppc-dev@lists.ozlabs.org
Description: read only
Hexadecimal value of the device ID found in this AFU
@ -133,7 +132,7 @@ Description: read only
Users: https://github.com/ibm-capi/libcxl
What: /sys/class/cxl/<afu>/cr<config num>/class
Date: February 2015
Date: February 2015, removed February 2025
Contact: linuxppc-dev@lists.ozlabs.org
Description: read only
Hexadecimal value of the class code found in this AFU
@ -141,7 +140,7 @@ Description: read only
Users: https://github.com/ibm-capi/libcxl
What: /sys/class/cxl/<afu>/cr<config num>/config
Date: February 2015
Date: February 2015, removed February 2025
Contact: linuxppc-dev@lists.ozlabs.org
Description: read only
This binary file provides raw access to the AFU configuration
@ -155,7 +154,7 @@ Users: https://github.com/ibm-capi/libcxl
Master contexts (eg. /sys/class/cxl/afu0.0m)
What: /sys/class/cxl/<afu>m/mmio_size
Date: September 2014
Date: September 2014, removed February 2025
Contact: linuxppc-dev@lists.ozlabs.org
Description: read only
Decimal value of the size of the MMIO space that may be mmapped
@ -163,14 +162,14 @@ Description: read only
Users: https://github.com/ibm-capi/libcxl
What: /sys/class/cxl/<afu>m/pp_mmio_len
Date: September 2014
Date: September 2014, removed February 2025
Contact: linuxppc-dev@lists.ozlabs.org
Description: read only
Decimal value of the Per Process MMIO space length.
Users: https://github.com/ibm-capi/libcxl
What: /sys/class/cxl/<afu>m/pp_mmio_off
Date: September 2014
Date: September 2014, removed February 2025
Contact: linuxppc-dev@lists.ozlabs.org
Description: read only
(not in a guest)
@ -181,21 +180,21 @@ Users: https://github.com/ibm-capi/libcxl
Card info (eg. /sys/class/cxl/card0)
What: /sys/class/cxl/<card>/caia_version
Date: September 2014
Date: September 2014, removed February 2025
Contact: linuxppc-dev@lists.ozlabs.org
Description: read only
Identifies the CAIA Version the card implements.
Users: https://github.com/ibm-capi/libcxl
What: /sys/class/cxl/<card>/psl_revision
Date: September 2014
Date: September 2014, removed February 2025
Contact: linuxppc-dev@lists.ozlabs.org
Description: read only
Identifies the revision level of the PSL.
Users: https://github.com/ibm-capi/libcxl
What: /sys/class/cxl/<card>/base_image
Date: September 2014
Date: September 2014, removed February 2025
Contact: linuxppc-dev@lists.ozlabs.org
Description: read only
(not in a guest)
@ -206,7 +205,7 @@ Description: read only
Users: https://github.com/ibm-capi/libcxl
What: /sys/class/cxl/<card>/image_loaded
Date: September 2014
Date: September 2014, removed February 2025
Contact: linuxppc-dev@lists.ozlabs.org
Description: read only
(not in a guest)
@ -215,7 +214,7 @@ Description: read only
Users: https://github.com/ibm-capi/libcxl
What: /sys/class/cxl/<card>/load_image_on_perst
Date: December 2014
Date: December 2014, removed February 2025
Contact: linuxppc-dev@lists.ozlabs.org
Description: read/write
(not in a guest)
@ -232,7 +231,7 @@ Description: read/write
Users: https://github.com/ibm-capi/libcxl
What: /sys/class/cxl/<card>/reset
Date: October 2014
Date: October 2014, removed February 2025
Contact: linuxppc-dev@lists.ozlabs.org
Description: write only
Writing 1 will issue a PERST to card provided there are no
@ -243,7 +242,7 @@ Description: write only
Users: https://github.com/ibm-capi/libcxl
What: /sys/class/cxl/<card>/perst_reloads_same_image
Date: July 2015
Date: July 2015, removed February 2025
Contact: linuxppc-dev@lists.ozlabs.org
Description: read/write
(not in a guest)
@ -257,7 +256,7 @@ Description: read/write
Users: https://github.com/ibm-capi/libcxl
What: /sys/class/cxl/<card>/psl_timebase_synced
Date: March 2016
Date: March 2016, removed February 2025
Contact: linuxppc-dev@lists.ozlabs.org
Description: read only
Returns 1 if the psl timebase register is synchronized
@ -265,7 +264,7 @@ Description: read only
Users: https://github.com/ibm-capi/libcxl
What: /sys/class/cxl/<card>/tunneled_ops_supported
Date: May 2018
Date: May 2018, removed February 2025
Contact: linuxppc-dev@lists.ozlabs.org
Description: read only
Returns 1 if tunneled operations are supported in capi mode,

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@ -177,6 +177,12 @@ Description:
The cache write policy: 0 for write-back, 1 for write-through,
other or unknown.
What: /sys/devices/system/node/nodeX/memory_side_cache/indexY/address_mode
Date: March 2025
Contact: Dave Jiang <dave.jiang@intel.com>
Description:
The address mode: 0 for reserved, 1 for extended-linear.
What: /sys/devices/system/node/nodeX/x86/sgx_total_bytes
Date: November 2021
Contact: Jarkko Sakkinen <jarkko@kernel.org>

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@ -22,14 +22,6 @@ Description:
device. The reset operation frees all the memory associated
with this device.
What: /sys/block/zram<id>/max_comp_streams
Date: February 2014
Contact: Sergey Senozhatsky <sergey.senozhatsky@gmail.com>
Description:
The max_comp_streams file is read-write and specifies the
number of backend's zcomp_strm compression streams (number of
concurrent compress operations).
What: /sys/block/zram<id>/comp_algorithm
Date: February 2014
Contact: Sergey Senozhatsky <sergey.senozhatsky@gmail.com>

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@ -257,3 +257,18 @@ Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_t
Description:
(RW) Set/Get the MSR(mux select register) for the CMB subunit
TPDM.
What: /sys/bus/coresight/devices/<tpdm-name>/mcmb_trig_lane
Date: Feb 2025
KernelVersion 6.15
Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
Description:
(RW) Set/Get which lane participates in the output pattern
match cross trigger mechanism for the MCMB subunit TPDM.
What: /sys/bus/coresight/devices/<tpdm-name>/mcmb_lanes_select
Date: Feb 2025
KernelVersion 6.15
Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
Description:
(RW) Set/Get the enablement of the individual lane.

View File

@ -34,6 +34,14 @@ Contact: linux-iio@vger.kernel.org
Description:
Count data of Count Y represented as a string.
What: /sys/bus/counter/devices/counterX/countY/compare
KernelVersion: 6.15
Contact: linux-iio@vger.kernel.org
Description:
If the counter device supports compare registers -- registers
used to compare counter channels against a particular count --
the compare count for channel Y is provided by this attribute.
What: /sys/bus/counter/devices/counterX/countY/capture
KernelVersion: 6.1
Contact: linux-iio@vger.kernel.org
@ -301,6 +309,7 @@ Description:
What: /sys/bus/counter/devices/counterX/cascade_counts_enable_component_id
What: /sys/bus/counter/devices/counterX/external_input_phase_clock_select_component_id
What: /sys/bus/counter/devices/counterX/countY/compare_component_id
What: /sys/bus/counter/devices/counterX/countY/capture_component_id
What: /sys/bus/counter/devices/counterX/countY/ceiling_component_id
What: /sys/bus/counter/devices/counterX/countY/floor_component_id

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@ -1,5 +1,5 @@
What: /sys/bus/cxl/flush
Date: Januarry, 2022
Date: January, 2022
KernelVersion: v5.18
Contact: linux-cxl@vger.kernel.org
Description:
@ -18,6 +18,24 @@ Description:
specification.
What: /sys/bus/cxl/devices/memX/payload_max
Date: December, 2020
KernelVersion: v5.12
Contact: linux-cxl@vger.kernel.org
Description:
(RO) Maximum size (in bytes) of the mailbox command payload
registers. Linux caps this at 1MB if the device reports a
larger size.
What: /sys/bus/cxl/devices/memX/label_storage_size
Date: May, 2021
KernelVersion: v5.13
Contact: linux-cxl@vger.kernel.org
Description:
(RO) Size (in bytes) of the Label Storage Area (LSA).
What: /sys/bus/cxl/devices/memX/ram/size
Date: December, 2020
KernelVersion: v5.12
@ -33,7 +51,7 @@ Date: May, 2023
KernelVersion: v6.8
Contact: linux-cxl@vger.kernel.org
Description:
(RO) For CXL host platforms that support "QoS Telemmetry"
(RO) For CXL host platforms that support "QoS Telemetry"
this attribute conveys a comma delimited list of platform
specific cookies that identifies a QoS performance class
for the volatile partition of the CXL mem device. These
@ -60,7 +78,7 @@ Date: May, 2023
KernelVersion: v6.8
Contact: linux-cxl@vger.kernel.org
Description:
(RO) For CXL host platforms that support "QoS Telemmetry"
(RO) For CXL host platforms that support "QoS Telemetry"
this attribute conveys a comma delimited list of platform
specific cookies that identifies a QoS performance class
for the persistent partition of the CXL mem device. These
@ -321,14 +339,13 @@ KernelVersion: v6.0
Contact: linux-cxl@vger.kernel.org
Description:
(RW) When a CXL decoder is of devtype "cxl_decoder_endpoint" it
translates from a host physical address range, to a device local
address range. Device-local address ranges are further split
into a 'ram' (volatile memory) range and 'pmem' (persistent
memory) range. The 'mode' attribute emits one of 'ram', 'pmem',
'mixed', or 'none'. The 'mixed' indication is for error cases
when a decoder straddles the volatile/persistent partition
boundary, and 'none' indicates the decoder is not actively
decoding, or no DPA allocation policy has been set.
translates from a host physical address range, to a device
local address range. Device-local address ranges are further
split into a 'ram' (volatile memory) range and 'pmem'
(persistent memory) range. The 'mode' attribute emits one of
'ram', 'pmem', or 'none'. The 'none' indicates the decoder is
not actively decoding, or no DPA allocation policy has been
set.
'mode' can be written, when the decoder is in the 'disabled'
state, with either 'ram' or 'pmem' to set the boundaries for the
@ -423,7 +440,7 @@ Date: May, 2023
KernelVersion: v6.5
Contact: linux-cxl@vger.kernel.org
Description:
(RO) For CXL host platforms that support "QoS Telemmetry" this
(RO) For CXL host platforms that support "QoS Telemetry" this
root-decoder-only attribute conveys a platform specific cookie
that identifies a QoS performance class for the CXL Window.
This class-id can be compared against a similar "qos_class"
@ -586,3 +603,15 @@ Description:
See Documentation/ABI/stable/sysfs-devices-node. access0 provides
the number to the closest initiator and access1 provides the
number to the closest CPU.
What: /sys/bus/cxl/devices/nvdimm-bridge0/ndbusX/nmemY/cxl/dirty_shutdown
Date: Feb, 2025
KernelVersion: v6.15
Contact: linux-cxl@vger.kernel.org
Description:
(RO) The device dirty shutdown count value, which is the number
of times the device could have incurred in potential data loss.
The count is persistent across power loss and wraps back to 0
upon overflow. If this file is not present, the device does not
have the necessary support for dirty tracking.

View File

@ -2268,7 +2268,7 @@ Description:
representing the sensor unique ID number.
What: /sys/bus/iio/devices/iio:deviceX/filter_type_available
What: /sys/bus/iio/devices/iio:deviceX/in_voltage-voltage_filter_mode_available
What: /sys/bus/iio/devices/iio:deviceX/in_voltage-voltage_filter_type_available
KernelVersion: 6.1
Contact: linux-iio@vger.kernel.org
Description:
@ -2290,6 +2290,16 @@ Description:
* "sinc3+pf2" - Sinc3 + device specific Post Filter 2.
* "sinc3+pf3" - Sinc3 + device specific Post Filter 3.
* "sinc3+pf4" - Sinc3 + device specific Post Filter 4.
* "wideband" - filter with wideband low ripple passband
and sharp transition band.
What: /sys/bus/iio/devices/iio:deviceX/filter_type
What: /sys/bus/iio/devices/iio:deviceX/in_voltageY-voltageZ_filter_type
KernelVersion: 6.1
Contact: linux-iio@vger.kernel.org
Description:
Specifies which filter type apply to the channel. The possible
values are given by the filter_type_available attribute.
What: /sys/.../events/in_proximity_thresh_either_runningperiod
KernelVersion: 6.6

View File

@ -0,0 +1,20 @@
What: /sys/bus/iio/devices/iio:deviceX/in_voltage-voltage_filter_mode_available
KernelVersion: 6.2
Contact: linux-iio@vger.kernel.org
Description:
Reading returns a list with the possible filter modes.
This ABI is only kept for backwards compatibility and the values
returned are identical to filter_type_available attribute
documented in Documentation/ABI/testing/sysfs-bus-iio. Please,
use filter_type_available like ABI to provide filter options for
new drivers.
What: /sys/bus/iio/devices/iio:deviceX/in_voltageY-voltageZ_filter_mode
KernelVersion: 6.2
Contact: linux-iio@vger.kernel.org
Description:
This ABI is only kept for backwards compatibility and the values
returned are identical to in_voltageY-voltageZ_filter_type
attribute documented in Documentation/ABI/testing/sysfs-bus-iio.
Please, use in_voltageY-voltageZ_filter_type for new drivers.

View File

@ -17,7 +17,7 @@ Description: Read only. Returns the firmware version of Intel MAX10
What: /sys/bus/.../drivers/intel-m10-bmc/.../mac_address
Date: January 2021
KernelVersion: 5.12
Contact: Peter Colberg <peter.colberg@intel.com>
Contact: Peter Colberg <peter.colberg@altera.com>
Description: Read only. Returns the first MAC address in a block
of sequential MAC addresses assigned to the board
that is managed by the Intel MAX10 BMC. It is stored in
@ -28,7 +28,7 @@ Description: Read only. Returns the first MAC address in a block
What: /sys/bus/.../drivers/intel-m10-bmc/.../mac_count
Date: January 2021
KernelVersion: 5.12
Contact: Peter Colberg <peter.colberg@intel.com>
Contact: Peter Colberg <peter.colberg@altera.com>
Description: Read only. Returns the number of sequential MAC
addresses assigned to the board managed by the Intel
MAX10 BMC. This value is stored in FLASH and is mirrored

View File

@ -1,7 +1,7 @@
What: /sys/bus/platform/drivers/intel-m10bmc-sec-update/.../security/sr_root_entry_hash
Date: Sep 2022
KernelVersion: 5.20
Contact: Peter Colberg <peter.colberg@intel.com>
Contact: Peter Colberg <peter.colberg@altera.com>
Description: Read only. Returns the root entry hash for the static
region if one is programmed, else it returns the
string: "hash not programmed". This file is only
@ -11,7 +11,7 @@ Description: Read only. Returns the root entry hash for the static
What: /sys/bus/platform/drivers/intel-m10bmc-sec-update/.../security/pr_root_entry_hash
Date: Sep 2022
KernelVersion: 5.20
Contact: Peter Colberg <peter.colberg@intel.com>
Contact: Peter Colberg <peter.colberg@altera.com>
Description: Read only. Returns the root entry hash for the partial
reconfiguration region if one is programmed, else it
returns the string: "hash not programmed". This file
@ -21,7 +21,7 @@ Description: Read only. Returns the root entry hash for the partial
What: /sys/bus/platform/drivers/intel-m10bmc-sec-update/.../security/bmc_root_entry_hash
Date: Sep 2022
KernelVersion: 5.20
Contact: Peter Colberg <peter.colberg@intel.com>
Contact: Peter Colberg <peter.colberg@altera.com>
Description: Read only. Returns the root entry hash for the BMC image
if one is programmed, else it returns the string:
"hash not programmed". This file is only visible if the
@ -31,7 +31,7 @@ Description: Read only. Returns the root entry hash for the BMC image
What: /sys/bus/platform/drivers/intel-m10bmc-sec-update/.../security/sr_canceled_csks
Date: Sep 2022
KernelVersion: 5.20
Contact: Peter Colberg <peter.colberg@intel.com>
Contact: Peter Colberg <peter.colberg@altera.com>
Description: Read only. Returns a list of indices for canceled code
signing keys for the static region. The standard bitmap
list format is used (e.g. "1,2-6,9").
@ -39,7 +39,7 @@ Description: Read only. Returns a list of indices for canceled code
What: /sys/bus/platform/drivers/intel-m10bmc-sec-update/.../security/pr_canceled_csks
Date: Sep 2022
KernelVersion: 5.20
Contact: Peter Colberg <peter.colberg@intel.com>
Contact: Peter Colberg <peter.colberg@altera.com>
Description: Read only. Returns a list of indices for canceled code
signing keys for the partial reconfiguration region. The
standard bitmap list format is used (e.g. "1,2-6,9").
@ -47,7 +47,7 @@ Description: Read only. Returns a list of indices for canceled code
What: /sys/bus/platform/drivers/intel-m10bmc-sec-update/.../security/bmc_canceled_csks
Date: Sep 2022
KernelVersion: 5.20
Contact: Peter Colberg <peter.colberg@intel.com>
Contact: Peter Colberg <peter.colberg@altera.com>
Description: Read only. Returns a list of indices for canceled code
signing keys for the BMC. The standard bitmap list format
is used (e.g. "1,2-6,9").
@ -55,7 +55,7 @@ Description: Read only. Returns a list of indices for canceled code
What: /sys/bus/platform/drivers/intel-m10bmc-sec-update/.../security/flash_count
Date: Sep 2022
KernelVersion: 5.20
Contact: Peter Colberg <peter.colberg@intel.com>
Contact: Peter Colberg <peter.colberg@altera.com>
Description: Read only. Returns number of times the secure update
staging area has been flashed.
Format: "%u".

View File

@ -29,3 +29,16 @@ Date: Feb 2024
Contact: Anshuman Khandual <anshuman.khandual@arm.com>
Description:
the number of pages CMA API succeeded to release
What: /sys/kernel/mm/cma/<cma-heap-name>/total_pages
Date: Jun 2024
Contact: Frank van der Linden <fvdl@google.com>
Description:
The size of the CMA area in pages.
What: /sys/kernel/mm/cma/<cma-heap-name>/available_pages
Date: Jun 2024
Contact: Frank van der Linden <fvdl@google.com>
Description:
The number of pages in the CMA area that are still
available for CMA allocation.

View File

@ -91,6 +91,36 @@ Description: Writing a value to this file sets the update interval of the
DAMON context in microseconds as the value. Reading this file
returns the value.
What: /sys/kernel/mm/damon/admin/kdamonds/<K>/contexts/<C>/monitoring_attrs/intervals/intrvals_goal/access_bp
Date: Feb 2025
Contact: SeongJae Park <sj@kernel.org>
Description: Writing a value to this file sets the monitoring intervals
auto-tuning target DAMON-observed access events ratio within
the given time interval (aggrs in same directory), in bp
(1/10,000). Reading this file returns the value.
What: /sys/kernel/mm/damon/admin/kdamonds/<K>/contexts/<C>/monitoring_attrs/intervals/intrvals_goal/aggrs
Date: Feb 2025
Contact: SeongJae Park <sj@kernel.org>
Description: Writing a value to this file sets the time interval to achieve
the monitoring intervals auto-tuning target DAMON-observed
access events ratio (access_bp in same directory) within.
Reading this file returns the value.
What: /sys/kernel/mm/damon/admin/kdamonds/<K>/contexts/<C>/monitoring_attrs/intervals/intrvals_goal/min_sample_us
Date: Feb 2025
Contact: SeongJae Park <sj@kernel.org>
Description: Writing a value to this file sets the minimum value of
auto-tuned sampling interval in microseconds. Reading this
file returns the value.
What: /sys/kernel/mm/damon/admin/kdamonds/<K>/contexts/<C>/monitoring_attrs/intervals/intrvals_goal/max_sample_us
Date: Feb 2025
Contact: SeongJae Park <sj@kernel.org>
Description: Writing a value to this file sets the maximum value of
auto-tuned sampling interval in microseconds. Reading this
file returns the value.
What: /sys/kernel/mm/damon/admin/kdamonds/<K>/contexts/<C>/monitoring_attrs/nr_regions/min
WDate: Mar 2022
@ -345,6 +375,20 @@ Description: If 'addr' is written to the 'type' file, writing to or reading
from this file sets or gets the end address of the address
range for the filter.
What: /sys/kernel/mm/damon/admin/kdamonds/<K>/contexts/<C>/schemes/<S>/filters/<F>/min
Date: Feb 2025
Contact: SeongJae Park <sj@kernel.org>
Description: If 'hugepage_size' is written to the 'type' file, writing to
or reading from this file sets or gets the minimum size of the
hugepage for the filter.
What: /sys/kernel/mm/damon/admin/kdamonds/<K>/contexts/<C>/schemes/<S>/filters/<F>/max
Date: Feb 2025
Contact: SeongJae Park <sj@kernel.org>
Description: If 'hugepage_size' is written to the 'type' file, writing to
or reading from this file sets or gets the maximum size of the
hugepage for the filter.
What: /sys/kernel/mm/damon/admin/kdamonds/<K>/contexts/<C>/schemes/<S>/filters/<F>/target_idx
Date: Dec 2022
Contact: SeongJae Park <sj@kernel.org>
@ -365,6 +409,22 @@ Description: Writing 'Y' or 'N' to this file sets whether to allow or reject
applying the scheme's action to the memory that satisfies the
'type' and the 'matching' of the directory.
What: /sys/kernel/mm/damon/admin/kdamonds/<K>/contexts/<C>/schemes/<S>/core_filters
Date: Feb 2025
Contact: SeongJae Park <sj@kernel.org>
Description: Directory for DAMON core layer-handled DAMOS filters. Files
under this directory works same to those of
/sys/kernel/mm/damon/admin/kdamonds/<K>/contexts/<C>/schemes/<S>/filters
directory.
What: /sys/kernel/mm/damon/admin/kdamonds/<K>/contexts/<C>/schemes/<S>/ops_filters
Date: Feb 2025
Contact: SeongJae Park <sj@kernel.org>
Description: Directory for DAMON operations set layer-handled DAMOS filters.
Files under this directory works same to those of
/sys/kernel/mm/damon/admin/kdamonds/<K>/contexts/<C>/schemes/<S>/filters
directory.
What: /sys/kernel/mm/damon/admin/kdamonds/<K>/contexts/<C>/schemes/<S>/stats/nr_tried
Date: Mar 2022
Contact: SeongJae Park <sj@kernel.org>

View File

@ -30,3 +30,11 @@ KernelVersion: 5.11
Contact: Matteo Croce <mcroce@microsoft.com>
Description: Don't wait for any other CPUs on reboot and
avoid anything that could hang.
What: /sys/kernel/reboot/hw_protection
Date: April 2025
KernelVersion: 6.15
Contact: Ahmad Fatoum <a.fatoum@pengutronix.de>
Description: Hardware protection action taken on critical events like
overtemperature or imminent voltage loss.
Valid values are: reboot shutdown

View File

@ -0,0 +1,6 @@
What: /sys/class/pps-gen/pps-genx/enable
Date: April 2025
KernelVersion: 6.15
Contact: Subramanian Mohan<subramanian.mohan@intel.com>
Description:
Enable or disable PPS TIO generator output.

View File

@ -971,6 +971,16 @@ unfortunately any spinlock in a ``SLAB_TYPESAFE_BY_RCU`` object must be
initialized after each and every call to kmem_cache_alloc(), which renders
reference-free spinlock acquisition completely unsafe. Therefore, when
using ``SLAB_TYPESAFE_BY_RCU``, make proper use of a reference counter.
If using refcount_t, the specialized refcount_{add|inc}_not_zero_acquire()
and refcount_set_release() APIs should be used to ensure correct operation
ordering when verifying object identity and when initializing newly
allocated objects. Acquire fence in refcount_{add|inc}_not_zero_acquire()
ensures that identity checks happen *after* reference count is taken.
refcount_set_release() should be called after a newly allocated object is
fully initialized and release fence ensures that new values are visible
*before* refcount can be successfully taken by other users. Once
refcount_set_release() is called, the object should be considered visible
by other tasks.
(Those willing to initialize their locks in a kmem_cache constructor
may also use locking, including cache-friendly sequence locking.)

View File

@ -54,7 +54,7 @@ The list of possible return codes:
If you use 'echo', the returned value is set by the 'echo' utility,
and, in general case, something like::
echo 3 > /sys/block/zram0/max_comp_streams
echo foo > /sys/block/zram0/comp_algorithm
if [ $? -ne 0 ]; then
handle_error
fi
@ -73,21 +73,7 @@ This creates 4 devices: /dev/zram{0,1,2,3}
num_devices parameter is optional and tells zram how many devices should be
pre-created. Default: 1.
2) Set max number of compression streams
========================================
Regardless of the value passed to this attribute, ZRAM will always
allocate multiple compression streams - one per online CPU - thus
allowing several concurrent compression operations. The number of
allocated compression streams goes down when some of the CPUs
become offline. There is no single-compression-stream mode anymore,
unless you are running a UP system or have only 1 CPU online.
To find out how many streams are currently available::
cat /sys/block/zram0/max_comp_streams
3) Select compression algorithm
2) Select compression algorithm
===============================
Using comp_algorithm device attribute one can see available and
@ -107,7 +93,7 @@ Examples::
For the time being, the `comp_algorithm` content shows only compression
algorithms that are supported by zram.
4) Set compression algorithm parameters: Optional
3) Set compression algorithm parameters: Optional
=================================================
Compression algorithms may support specific parameters which can be
@ -138,7 +124,7 @@ better the compression ratio, it even can take negatives values for some
algorithms), for other algorithms `level` is acceleration level (the higher
the value the lower the compression ratio).
5) Set Disksize
4) Set Disksize
===============
Set disk size by writing the value to sysfs node 'disksize'.
@ -158,7 +144,7 @@ There is little point creating a zram of greater than twice the size of memory
since we expect a 2:1 compression ratio. Note that zram uses about 0.1% of the
size of the disk when not in use so a huge zram is wasteful.
6) Set memory limit: Optional
5) Set memory limit: Optional
=============================
Set memory limit by writing the value to sysfs node 'mem_limit'.
@ -177,7 +163,7 @@ Examples::
# To disable memory limit
echo 0 > /sys/block/zram0/mem_limit
7) Activate
6) Activate
===========
::
@ -188,7 +174,7 @@ Examples::
mkfs.ext4 /dev/zram1
mount /dev/zram1 /tmp
8) Add/remove zram devices
7) Add/remove zram devices
==========================
zram provides a control interface, which enables dynamic (on-demand) device
@ -208,7 +194,7 @@ execute::
echo X > /sys/class/zram-control/hot_remove
9) Stats
8) Stats
========
Per-device statistics are exported as various nodes under /sys/block/zram<id>/
@ -228,8 +214,6 @@ mem_limit WO specifies the maximum amount of memory ZRAM can
writeback_limit WO specifies the maximum amount of write IO zram
can write out to backing device as 4KB unit
writeback_limit_enable RW show and set writeback_limit feature
max_comp_streams RW the number of possible concurrent compress
operations
comp_algorithm RW show and change the compression algorithm
algorithm_params WO setup compression algorithm parameters
compact WO trigger memory compaction
@ -310,7 +294,7 @@ a single line of text and contains the following stats separated by whitespace:
Unit: 4K bytes
============== =============================================================
10) Deactivate
9) Deactivate
==============
::
@ -318,7 +302,7 @@ a single line of text and contains the following stats separated by whitespace:
swapoff /dev/zram0
umount /dev/zram1
11) Reset
10) Reset
=========
Write any positive value to 'reset' sysfs node::

View File

@ -610,6 +610,10 @@ memory.stat file includes following statistics:
'rss + mapped_file" will give you resident set size of cgroup.
Note that some kernel configurations might account complete larger
allocations (e.g., THP) towards 'rss' and 'mapped_file', even if
only some, but not all that memory is mapped.
(Note: file and shmem may be shared among other cgroups. In that case,
mapped_file is accounted only when the memory cgroup is owner of page
cache.)

View File

@ -1445,7 +1445,10 @@ The following nested keys are defined.
anon
Amount of memory used in anonymous mappings such as
brk(), sbrk(), and mmap(MAP_ANONYMOUS)
brk(), sbrk(), and mmap(MAP_ANONYMOUS). Note that
some kernel configurations might account complete larger
allocations (e.g., THP) if only some, but not all the
memory of such an allocation is mapped anymore.
file
Amount of memory used to cache filesystem data,
@ -1488,7 +1491,10 @@ The following nested keys are defined.
Amount of application memory swapped out to zswap.
file_mapped
Amount of cached filesystem data mapped with mmap()
Amount of cached filesystem data mapped with mmap(). Note
that some kernel configurations might account complete
larger allocations (e.g., THP) if only some, but not
not all the memory of such an allocation is mapped.
file_dirty
Amount of cached filesystem data that was modified but
@ -1560,6 +1566,12 @@ The following nested keys are defined.
workingset_nodereclaim
Number of times a shadow node has been reclaimed
pswpin (npn)
Number of pages swapped into memory
pswpout (npn)
Number of pages swapped out of memory
pgscan (npn)
Amount of scanned pages (in an inactive LRU list)
@ -1575,6 +1587,9 @@ The following nested keys are defined.
pgscan_khugepaged (npn)
Amount of scanned pages by khugepaged (in an inactive LRU list)
pgscan_proactive (npn)
Amount of scanned pages proactively (in an inactive LRU list)
pgsteal_kswapd (npn)
Amount of reclaimed pages by kswapd
@ -1584,6 +1599,9 @@ The following nested keys are defined.
pgsteal_khugepaged (npn)
Amount of reclaimed pages by khugepaged
pgsteal_proactive (npn)
Amount of reclaimed pages proactively
pgfault (npn)
Total number of page faults incurred
@ -1661,6 +1679,9 @@ The following nested keys are defined.
pgdemote_khugepaged
Number of pages demoted by khugepaged.
pgdemote_proactive
Number of pages demoted by proactively.
hugetlb
Amount of memory used by hugetlb pages. This metric only shows
up if hugetlb usage is accounted for in memory.current (i.e.

View File

@ -146,6 +146,11 @@ integrity:<bytes>:<type>
integrity for the encrypted device. The additional space is then
used for storing authentication tag (and persistent IV if needed).
integrity_key_size:<bytes>
Optionally set the integrity key size if it differs from the digest size.
It allows the use of wrapped key algorithms where the key size is
independent of the cryptographic key size.
sector_size:<bytes>
Use <bytes> as the encryption unit instead of 512 bytes sectors.
This option can be in range 512 - 4096 bytes and must be power of two.

View File

@ -92,6 +92,11 @@ Target arguments:
allowed. This mode is useful for data recovery if the
device cannot be activated in any of the other standard
modes.
I - inline mode - in this mode, dm-integrity will store integrity
data directly in the underlying device sectors.
The underlying device must have an integrity profile that
allows storing user integrity data and provides enough
space for the selected integrity tag.
5. the number of additional arguments

View File

@ -87,6 +87,15 @@ panic_on_corruption
Panic the device when a corrupted block is discovered. This option is
not compatible with ignore_corruption and restart_on_corruption.
restart_on_error
Restart the system when an I/O error is detected.
This option can be combined with the restart_on_corruption option.
panic_on_error
Panic the device when an I/O error is detected. This option is
not compatible with the restart_on_error option but can be combined
with the panic_on_corruption option.
ignore_zero_blocks
Do not verify blocks that are expected to contain zeroes and always return
zeroes instead. This may be useful if the partition contains unused blocks
@ -142,8 +151,15 @@ root_hash_sig_key_desc <key_description>
already in the secondary trusted keyring.
try_verify_in_tasklet
If verity hashes are in cache, verify data blocks in kernel tasklet instead
of workqueue. This option can reduce IO latency.
If verity hashes are in cache and the IO size does not exceed the limit,
verify data blocks in bottom half instead of workqueue. This option can
reduce IO latency. The size limits can be configured via
/sys/module/dm_verity/parameters/use_bh_bytes. The four parameters
correspond to limits for IOPRIO_CLASS_NONE, IOPRIO_CLASS_RT,
IOPRIO_CLASS_BE and IOPRIO_CLASS_IDLE in turn.
For example:
<none>,<rt>,<be>,<idle>
4096,4096,4096,4096
Theory of operation
===================

View File

@ -1866,7 +1866,7 @@
hpet_mmap= [X86, HPET_MMAP] Allow userspace to mmap HPET
registers. Default set by CONFIG_HPET_MMAP_DEFAULT.
hugepages= [HW] Number of HugeTLB pages to allocate at boot.
hugepages= [HW,EARLY] Number of HugeTLB pages to allocate at boot.
If this follows hugepagesz (below), it specifies
the number of pages of hugepagesz to be allocated.
If this is the first HugeTLB parameter on the command
@ -1878,15 +1878,24 @@
<node>:<integer>[,<node>:<integer>]
hugepagesz=
[HW] The size of the HugeTLB pages. This is used in
conjunction with hugepages (above) to allocate huge
pages of a specific size at boot. The pair
hugepagesz=X hugepages=Y can be specified once for
each supported huge page size. Huge page sizes are
architecture dependent. See also
[HW,EARLY] The size of the HugeTLB pages. This is
used in conjunction with hugepages (above) to
allocate huge pages of a specific size at boot. The
pair hugepagesz=X hugepages=Y can be specified once
for each supported huge page size. Huge page sizes
are architecture dependent. See also
Documentation/admin-guide/mm/hugetlbpage.rst.
Format: size[KMG]
hugepage_alloc_threads=
[HW] The number of threads that should be used to
allocate hugepages during boot. This option can be
used to improve system bootup time when allocating
a large amount of huge pages.
The default value is 25% of the available hardware threads.
Note that this parameter only applies to non-gigantic huge pages.
hugetlb_cma= [HW,CMA,EARLY] The size of a CMA area used for allocation
of gigantic hugepages. Or using node format, the size
of a CMA area per node can be specified.
@ -1897,6 +1906,13 @@
hugepages using the CMA allocator. If enabled, the
boot-time allocation of gigantic hugepages is skipped.
hugetlb_cma_only=
[HW,CMA,EARLY] When allocating new HugeTLB pages, only
try to allocate from the CMA areas.
This option does nothing if hugetlb_cma= is not also
specified.
hugetlb_free_vmemmap=
[KNL] Requires CONFIG_HUGETLB_PAGE_OPTIMIZE_VMEMMAP
enabled.
@ -1938,6 +1954,12 @@
which allow the hypervisor to 'idle' the guest
on lock contention.
hw_protection= [HW]
Format: reboot | shutdown
Hardware protection action taken on critical events like
overtemperature or imminent voltage loss.
i2c_bus= [HW] Override the default board specific I2C bus speed
or register an additional I2C bus that is not
registered from board initialization code.
@ -4243,10 +4265,10 @@
nosmp [SMP,EARLY] Tells an SMP kernel to act as a UP kernel,
and disable the IO APIC. legacy for "maxcpus=0".
nosmt [KNL,MIPS,PPC,S390,EARLY] Disable symmetric multithreading (SMT).
nosmt [KNL,MIPS,PPC,EARLY] Disable symmetric multithreading (SMT).
Equivalent to smt=1.
[KNL,X86,PPC] Disable symmetric multithreading (SMT).
[KNL,X86,PPC,S390] Disable symmetric multithreading (SMT).
nosmt=force: Force disable SMT, cannot be undone
via the sysfs control file.
@ -7266,6 +7288,8 @@
This is just one of many ways that can clear memory. Make sure your system
keeps the content of memory across reboots before relying on this option.
NB: Both the mapped address and size must be page aligned for the architecture.
See also Documentation/trace/debugging.rst
@ -7511,6 +7535,22 @@
Note that genuine overcurrent events won't be
reported either.
unaligned_scalar_speed=
[RISCV]
Format: {slow | fast | unsupported}
Allow skipping scalar unaligned access speed tests. This
is useful for testing alternative code paths and to skip
the tests in environments where they run too slowly. All
CPUs must have the same scalar unaligned access speed.
unaligned_vector_speed=
[RISCV]
Format: {slow | fast | unsupported}
Allow skipping vector unaligned access speed tests. This
is useful for testing alternative code paths and to skip
the tests in environments where they run too slowly. All
CPUs must have the same vector unaligned access speed.
unknown_nmi_panic
[X86] Cause panic on unknown NMI.

View File

@ -12,10 +12,16 @@ its CMA name like below:
The structure of the files created under that directory is as follows:
- [RO] base_pfn: The base PFN (Page Frame Number) of the zone.
- [RO] base_pfn: The base PFN (Page Frame Number) of the CMA area.
This is the same as ranges/0/base_pfn.
- [RO] count: Amount of memory in the CMA area.
- [RO] order_per_bit: Order of pages represented by one bit.
- [RO] bitmap: The bitmap of page states in the zone.
- [RO] bitmap: The bitmap of allocated pages in the area.
This is the same as ranges/0/base_pfn.
- [RO] ranges/N/base_pfn: The base PFN of contiguous range N
in the CMA area.
- [RO] ranges/N/bitmap: The bit map of allocated pages in
range N in the CMA area.
- [WO] alloc: Allocate N pages from that CMA area. For example::
echo 5 > <debugfs>/cma/<cma_name>/alloc

View File

@ -64,6 +64,7 @@ comma (",").
│ │ │ │ :ref:`0 <sysfs_context>`/avail_operations,operations
│ │ │ │ │ :ref:`monitoring_attrs <sysfs_monitoring_attrs>`/
│ │ │ │ │ │ intervals/sample_us,aggr_us,update_us
│ │ │ │ │ │ │ intervals_goal/access_bp,aggrs,min_sample_us,max_sample_us
│ │ │ │ │ │ nr_regions/min,max
│ │ │ │ │ :ref:`targets <sysfs_targets>`/nr_targets
│ │ │ │ │ │ :ref:`0 <sysfs_target>`/pid_target
@ -82,8 +83,8 @@ comma (",").
│ │ │ │ │ │ │ │ :ref:`goals <sysfs_schemes_quota_goals>`/nr_goals
│ │ │ │ │ │ │ │ │ 0/target_metric,target_value,current_value
│ │ │ │ │ │ │ :ref:`watermarks <sysfs_watermarks>`/metric,interval_us,high,mid,low
│ │ │ │ │ │ │ :ref:`filters <sysfs_filters>`/nr_filters
│ │ │ │ │ │ │ │ 0/type,matching,allow,memcg_path,addr_start,addr_end,target_idx
│ │ │ │ │ │ │ :ref:`{core_,ops_,}filters <sysfs_filters>`/nr_filters
│ │ │ │ │ │ │ │ 0/type,matching,allow,memcg_path,addr_start,addr_end,target_idx,min,max
│ │ │ │ │ │ │ :ref:`stats <sysfs_schemes_stats>`/nr_tried,sz_tried,nr_applied,sz_applied,sz_ops_filter_passed,qt_exceeds
│ │ │ │ │ │ │ :ref:`tried_regions <sysfs_schemes_tried_regions>`/total_bytes
│ │ │ │ │ │ │ │ 0/start,end,nr_accesses,age,sz_filter_passed
@ -132,6 +133,11 @@ Users can write below commands for the kdamond to the ``state`` file.
- ``off``: Stop running.
- ``commit``: Read the user inputs in the sysfs files except ``state`` file
again.
- ``update_tuned_intervals``: Update the contents of ``sample_us`` and
``aggr_us`` files of the kdamond with the auto-tuning applied ``sampling
interval`` and ``aggregation interval`` for the files. Please refer to
:ref:`intervals_goal section <damon_usage_sysfs_monitoring_intervals_goal>`
for more details.
- ``commit_schemes_quota_goals``: Read the DAMON-based operation schemes'
:ref:`quota goals <sysfs_schemes_quota_goals>`.
- ``update_schemes_stats``: Update the contents of stats files for each
@ -213,6 +219,25 @@ writing to and rading from the files.
For more details about the intervals and monitoring regions range, please refer
to the Design document (:doc:`/mm/damon/design`).
.. _damon_usage_sysfs_monitoring_intervals_goal:
contexts/<N>/monitoring_attrs/intervals/intervals_goal/
-------------------------------------------------------
Under the ``intervals`` directory, one directory for automated tuning of
``sample_us`` and ``aggr_us``, namely ``intervals_goal`` directory also exists.
Under the directory, four files for the auto-tuning control, namely
``access_bp``, ``aggrs``, ``min_sample_us`` and ``max_sample_us`` exist.
Please refer to the :ref:`design document of the feature
<damon_design_monitoring_intervals_autotuning>` for the internal of the tuning
mechanism. Reading and writing the four files under ``intervals_goal``
directory shows and updates the tuning parameters that described in the
:ref:design doc <damon_design_monitoring_intervals_autotuning>` with the same
names. The tuning starts with the user-set ``sample_us`` and ``aggr_us``. The
tuning-applied current values of the two intervals can be read from the
``sample_us`` and ``aggr_us`` files after writing ``update_tuned_intervals`` to
the ``state`` file.
.. _sysfs_targets:
contexts/<N>/targets/
@ -282,9 +307,10 @@ to ``N-1``. Each directory represents each DAMON-based operation scheme.
schemes/<N>/
------------
In each scheme directory, five directories (``access_pattern``, ``quotas``,
``watermarks``, ``filters``, ``stats``, and ``tried_regions``) and three files
(``action``, ``target_nid`` and ``apply_interval``) exist.
In each scheme directory, seven directories (``access_pattern``, ``quotas``,
``watermarks``, ``core_filters``, ``ops_filters``, ``filters``, ``stats``, and
``tried_regions``) and three files (``action``, ``target_nid`` and
``apply_interval``) exist.
The ``action`` file is for setting and getting the scheme's :ref:`action
<damon_design_damos_action>`. The keywords that can be written to and read
@ -395,33 +421,43 @@ The ``interval`` should written in microseconds unit.
.. _sysfs_filters:
schemes/<N>/filters/
--------------------
schemes/<N>/{core\_,ops\_,}filters/
-----------------------------------
The directory for the :ref:`filters <damon_design_damos_filters>` of the given
Directories for :ref:`filters <damon_design_damos_filters>` of the given
DAMON-based operation scheme.
In the beginning, this directory has only one file, ``nr_filters``. Writing a
``core_filters`` and ``ops_filters`` directories are for the filters handled by
the DAMON core layer and operations set layer, respectively. ``filters``
directory can be used for installing filters regardless of their handled
layers. Filters that requested by ``core_filters`` and ``ops_filters`` will be
installed before those of ``filters``. All three directories have same files.
Use of ``filters`` directory can make expecting evaluation orders of given
filters with the files under directory bit confusing. Users are hence
recommended to use ``core_filters`` and ``ops_filters`` directories. The
``filters`` directory could be deprecated in future.
In the beginning, the directory has only one file, ``nr_filters``. Writing a
number (``N``) to the file creates the number of child directories named ``0``
to ``N-1``. Each directory represents each filter. The filters are evaluated
in the numeric order.
Each filter directory contains seven files, namely ``type``, ``matching``,
``allow``, ``memcg_path``, ``addr_start``, ``addr_end``, and ``target_idx``.
To ``type`` file, you can write one of five special keywords: ``anon`` for
anonymous pages, ``memcg`` for specific memory cgroup, ``young`` for young
pages, ``addr`` for specific address range (an open-ended interval), or
``target`` for specific DAMON monitoring target filtering. Meaning of the
types are same to the description on the :ref:`design doc
<damon_design_damos_filters>`.
Each filter directory contains nine files, namely ``type``, ``matching``,
``allow``, ``memcg_path``, ``addr_start``, ``addr_end``, ``min``, ``max``
and ``target_idx``. To ``type`` file, you can write the type of the filter.
Refer to :ref:`the design doc <damon_design_damos_filters>` for available type
names, their meaning and on what layer those are handled.
In case of the memory cgroup filtering, you can specify the memory cgroup of
the interest by writing the path of the memory cgroup from the cgroups mount
point to ``memcg_path`` file. In case of the address range filtering, you can
specify the start and end address of the range to ``addr_start`` and
``addr_end`` files, respectively. For the DAMON monitoring target filtering,
you can specify the index of the target between the list of the DAMON context's
monitoring targets list to ``target_idx`` file.
For ``memcg`` type, you can specify the memory cgroup of the interest by
writing the path of the memory cgroup from the cgroups mount point to
``memcg_path`` file. For ``addr`` type, you can specify the start and end
address of the range (open-ended interval) to ``addr_start`` and ``addr_end``
files, respectively. For ``hugepage_size`` type, you can specify the minimum
and maximum size of the range (closed interval) to ``min`` and ``max`` files,
respectively. For ``target`` type, you can specify the index of the target
between the list of the DAMON context's monitoring targets list to
``target_idx`` file.
You can write ``Y`` or ``N`` to ``matching`` file to specify whether the filter
is for memory that matches the ``type``. You can write ``Y`` or ``N`` to
@ -431,6 +467,7 @@ the ``type`` and ``matching`` should be allowed or not.
For example, below restricts a DAMOS action to be applied to only non-anonymous
pages of all memory cgroups except ``/having_care_already``.::
# cd ops_filters/0/
# echo 2 > nr_filters
# # disallow anonymous pages
echo anon > 0/type

View File

@ -145,7 +145,17 @@ hugepages
It will allocate 1 2M hugepage on node0 and 2 2M hugepages on node1.
If the node number is invalid, the parameter will be ignored.
hugepage_alloc_threads
Specify the number of threads that should be used to allocate hugepages
during boot. This parameter can be used to improve system bootup time
when allocating a large amount of huge pages.
The default value is 25% of the available hardware threads.
Example to use 8 allocation threads::
hugepage_alloc_threads=8
Note that this parameter only applies to non-gigantic huge pages.
default_hugepagesz
Specify the default huge page size. This parameter can
only be specified once on the command line. default_hugepagesz can

View File

@ -21,7 +21,8 @@ There are four components to pagemap:
* Bit 56 page exclusively mapped (since 4.2)
* Bit 57 pte is uffd-wp write-protected (since 5.13) (see
Documentation/admin-guide/mm/userfaultfd.rst)
* Bits 58-60 zero
* Bit 58 pte is a guard region (since 6.15) (see madvise (2) man page)
* Bits 59-60 zero
* Bit 61 page is file-page or shared-anon (since 3.5)
* Bit 62 page swapped
* Bit 63 page present
@ -37,12 +38,28 @@ There are four components to pagemap:
precisely which pages are mapped (or in swap) and comparing mapped
pages between processes.
Traditionally, bit 56 indicates that a page is mapped exactly once and bit
56 is clear when a page is mapped multiple times, even when mapped in the
same process multiple times. In some kernel configurations, the semantics
for pages part of a larger allocation (e.g., THP) can differ: bit 56 is set
if all pages part of the corresponding large allocation are *certainly*
mapped in the same process, even if the page is mapped multiple times in that
process. Bit 56 is clear when any page page of the larger allocation
is *maybe* mapped in a different process. In some cases, a large allocation
might be treated as "maybe mapped by multiple processes" even though this
is no longer the case.
Efficient users of this interface will use ``/proc/pid/maps`` to
determine which areas of memory are actually mapped and llseek to
skip over unmapped regions.
* ``/proc/kpagecount``. This file contains a 64-bit count of the number of
times each page is mapped, indexed by PFN.
times each page is mapped, indexed by PFN. Some kernel configurations do
not track the precise number of times a page part of a larger allocation
(e.g., THP) is mapped. In these configurations, the average number of
mappings per page in this larger allocation is returned instead. However,
if any page of the large allocation is mapped, the returned value will
be at least 1.
The page-types tool in the tools/mm directory can be used to query the
number of times a page is mapped.

View File

@ -60,15 +60,13 @@ accessed. The compressed memory pool grows on demand and shrinks as compressed
pages are freed. The pool is not preallocated. By default, a zpool
of type selected in ``CONFIG_ZSWAP_ZPOOL_DEFAULT`` Kconfig option is created,
but it can be overridden at boot time by setting the ``zpool`` attribute,
e.g. ``zswap.zpool=zbud``. It can also be changed at runtime using the sysfs
e.g. ``zswap.zpool=zsmalloc``. It can also be changed at runtime using the sysfs
``zpool`` attribute, e.g.::
echo zbud > /sys/module/zswap/parameters/zpool
echo zsmalloc > /sys/module/zswap/parameters/zpool
The zbud type zpool allocates exactly 1 page to store 2 compressed pages, which
means the compression ratio will always be 2:1 or worse (because of half-full
zbud pages). The zsmalloc type zpool has a more complex compressed page
storage method, and it can achieve greater storage densities.
The zsmalloc type zpool has a complex compressed page storage method, and it
can achieve great storage densities.
When a swap page is passed from swapout to zswap, zswap maintains a mapping
of the swap entry, a combination of the swap type and swap offset, to the zpool

View File

@ -347,3 +347,28 @@ filesystems:
``/proc/sys/fs/fuse/max_pages_limit`` is a read/write file for
setting/getting the maximum number of pages that can be used for servicing
requests in FUSE.
``/proc/sys/fs/fuse/default_request_timeout`` is a read/write file for
setting/getting the default timeout (in seconds) for a fuse server to
reply to a kernel-issued request in the event where the server did not
specify a timeout at mount. If the server set a timeout,
then default_request_timeout will be ignored. The default
"default_request_timeout" is set to 0. 0 indicates no default timeout.
The maximum value that can be set is 65535.
``/proc/sys/fs/fuse/max_request_timeout`` is a read/write file for
setting/getting the maximum timeout (in seconds) for a fuse server to
reply to a kernel-issued request. A value greater than 0 automatically opts
the server into a timeout that will be set to at most "max_request_timeout",
even if the server did not specify a timeout and default_request_timeout is
set to 0. If max_request_timeout is greater than 0 and the server set a timeout
greater than max_request_timeout or default_request_timeout is set to a value
greater than max_request_timeout, the system will use max_request_timeout as the
timeout. 0 indicates no max request timeout. The maximum value that can be set
is 65535.
For timeouts, if the server does not respond to the request by the time
the set timeout elapses, then the connection to the fuse server will be aborted.
Please note that the timeouts are not 100% precise (eg you may set 60 seconds but
the timeout may kick in after 70 seconds). The upper margin of error for the
timeout is roughly FUSE_TIMEOUT_TIMER_FREQ seconds.

View File

@ -28,6 +28,7 @@ Currently, these files are in /proc/sys/vm:
- compact_memory
- compaction_proactiveness
- compact_unevictable_allowed
- defrag_mode
- dirty_background_bytes
- dirty_background_ratio
- dirty_bytes
@ -145,6 +146,14 @@ On CONFIG_PREEMPT_RT the default value is 0 in order to avoid a page fault, due
to compaction, which would block the task from becoming active until the fault
is resolved.
defrag_mode
===========
When set to 1, the page allocator tries harder to avoid fragmentation
and maintain the ability to produce huge pages / higher-order pages.
It is recommended to enable this right after boot, as fragmentation,
once it occurred, can be long-lasting or even permanent.
dirty_background_bytes
======================

View File

@ -22,8 +22,6 @@ offlining of memory being accessed by the ptdump code.
In order to dump the kernel page tables, enable the following
configurations and mount debugfs::
CONFIG_GENERIC_PTDUMP=y
CONFIG_PTDUMP_CORE=y
CONFIG_PTDUMP_DEBUGFS=y
mount -t debugfs nodev /sys/kernel/debug

View File

@ -1,470 +0,0 @@
====================================
Coherent Accelerator Interface (CXL)
====================================
Introduction
============
The coherent accelerator interface is designed to allow the
coherent connection of accelerators (FPGAs and other devices) to a
POWER system. These devices need to adhere to the Coherent
Accelerator Interface Architecture (CAIA).
IBM refers to this as the Coherent Accelerator Processor Interface
or CAPI. In the kernel it's referred to by the name CXL to avoid
confusion with the ISDN CAPI subsystem.
Coherent in this context means that the accelerator and CPUs can
both access system memory directly and with the same effective
addresses.
**This driver is deprecated and will be removed in a future release.**
Hardware overview
=================
::
POWER8/9 FPGA
+----------+ +---------+
| | | |
| CPU | | AFU |
| | | |
| | | |
| | | |
+----------+ +---------+
| PHB | | |
| +------+ | PSL |
| | CAPP |<------>| |
+---+------+ PCIE +---------+
The POWER8/9 chip has a Coherently Attached Processor Proxy (CAPP)
unit which is part of the PCIe Host Bridge (PHB). This is managed
by Linux by calls into OPAL. Linux doesn't directly program the
CAPP.
The FPGA (or coherently attached device) consists of two parts.
The POWER Service Layer (PSL) and the Accelerator Function Unit
(AFU). The AFU is used to implement specific functionality behind
the PSL. The PSL, among other things, provides memory address
translation services to allow each AFU direct access to userspace
memory.
The AFU is the core part of the accelerator (eg. the compression,
crypto etc function). The kernel has no knowledge of the function
of the AFU. Only userspace interacts directly with the AFU.
The PSL provides the translation and interrupt services that the
AFU needs. This is what the kernel interacts with. For example, if
the AFU needs to read a particular effective address, it sends
that address to the PSL, the PSL then translates it, fetches the
data from memory and returns it to the AFU. If the PSL has a
translation miss, it interrupts the kernel and the kernel services
the fault. The context to which this fault is serviced is based on
who owns that acceleration function.
- POWER8 and PSL Version 8 are compliant to the CAIA Version 1.0.
- POWER9 and PSL Version 9 are compliant to the CAIA Version 2.0.
This PSL Version 9 provides new features such as:
* Interaction with the nest MMU on the P9 chip.
* Native DMA support.
* Supports sending ASB_Notify messages for host thread wakeup.
* Supports Atomic operations.
* etc.
Cards with a PSL9 won't work on a POWER8 system and cards with a
PSL8 won't work on a POWER9 system.
AFU Modes
=========
There are two programming modes supported by the AFU. Dedicated
and AFU directed. AFU may support one or both modes.
When using dedicated mode only one MMU context is supported. In
this mode, only one userspace process can use the accelerator at
time.
When using AFU directed mode, up to 16K simultaneous contexts can
be supported. This means up to 16K simultaneous userspace
applications may use the accelerator (although specific AFUs may
support fewer). In this mode, the AFU sends a 16 bit context ID
with each of its requests. This tells the PSL which context is
associated with each operation. If the PSL can't translate an
operation, the ID can also be accessed by the kernel so it can
determine the userspace context associated with an operation.
MMIO space
==========
A portion of the accelerator MMIO space can be directly mapped
from the AFU to userspace. Either the whole space can be mapped or
just a per context portion. The hardware is self describing, hence
the kernel can determine the offset and size of the per context
portion.
Interrupts
==========
AFUs may generate interrupts that are destined for userspace. These
are received by the kernel as hardware interrupts and passed onto
userspace by a read syscall documented below.
Data storage faults and error interrupts are handled by the kernel
driver.
Work Element Descriptor (WED)
=============================
The WED is a 64-bit parameter passed to the AFU when a context is
started. Its format is up to the AFU hence the kernel has no
knowledge of what it represents. Typically it will be the
effective address of a work queue or status block where the AFU
and userspace can share control and status information.
User API
========
1. AFU character devices
^^^^^^^^^^^^^^^^^^^^^^^^
For AFUs operating in AFU directed mode, two character device
files will be created. /dev/cxl/afu0.0m will correspond to a
master context and /dev/cxl/afu0.0s will correspond to a slave
context. Master contexts have access to the full MMIO space an
AFU provides. Slave contexts have access to only the per process
MMIO space an AFU provides.
For AFUs operating in dedicated process mode, the driver will
only create a single character device per AFU called
/dev/cxl/afu0.0d. This will have access to the entire MMIO space
that the AFU provides (like master contexts in AFU directed).
The types described below are defined in include/uapi/misc/cxl.h
The following file operations are supported on both slave and
master devices.
A userspace library libcxl is available here:
https://github.com/ibm-capi/libcxl
This provides a C interface to this kernel API.
open
----
Opens the device and allocates a file descriptor to be used with
the rest of the API.
A dedicated mode AFU only has one context and only allows the
device to be opened once.
An AFU directed mode AFU can have many contexts, the device can be
opened once for each context that is available.
When all available contexts are allocated the open call will fail
and return -ENOSPC.
Note:
IRQs need to be allocated for each context, which may limit
the number of contexts that can be created, and therefore
how many times the device can be opened. The POWER8 CAPP
supports 2040 IRQs and 3 are used by the kernel, so 2037 are
left. If 1 IRQ is needed per context, then only 2037
contexts can be allocated. If 4 IRQs are needed per context,
then only 2037/4 = 509 contexts can be allocated.
ioctl
-----
CXL_IOCTL_START_WORK:
Starts the AFU context and associates it with the current
process. Once this ioctl is successfully executed, all memory
mapped into this process is accessible to this AFU context
using the same effective addresses. No additional calls are
required to map/unmap memory. The AFU memory context will be
updated as userspace allocates and frees memory. This ioctl
returns once the AFU context is started.
Takes a pointer to a struct cxl_ioctl_start_work
::
struct cxl_ioctl_start_work {
__u64 flags;
__u64 work_element_descriptor;
__u64 amr;
__s16 num_interrupts;
__s16 reserved1;
__s32 reserved2;
__u64 reserved3;
__u64 reserved4;
__u64 reserved5;
__u64 reserved6;
};
flags:
Indicates which optional fields in the structure are
valid.
work_element_descriptor:
The Work Element Descriptor (WED) is a 64-bit argument
defined by the AFU. Typically this is an effective
address pointing to an AFU specific structure
describing what work to perform.
amr:
Authority Mask Register (AMR), same as the powerpc
AMR. This field is only used by the kernel when the
corresponding CXL_START_WORK_AMR value is specified in
flags. If not specified the kernel will use a default
value of 0.
num_interrupts:
Number of userspace interrupts to request. This field
is only used by the kernel when the corresponding
CXL_START_WORK_NUM_IRQS value is specified in flags.
If not specified the minimum number required by the
AFU will be allocated. The min and max number can be
obtained from sysfs.
reserved fields:
For ABI padding and future extensions
CXL_IOCTL_GET_PROCESS_ELEMENT:
Get the current context id, also known as the process element.
The value is returned from the kernel as a __u32.
mmap
----
An AFU may have an MMIO space to facilitate communication with the
AFU. If it does, the MMIO space can be accessed via mmap. The size
and contents of this area are specific to the particular AFU. The
size can be discovered via sysfs.
In AFU directed mode, master contexts are allowed to map all of
the MMIO space and slave contexts are allowed to only map the per
process MMIO space associated with the context. In dedicated
process mode the entire MMIO space can always be mapped.
This mmap call must be done after the START_WORK ioctl.
Care should be taken when accessing MMIO space. Only 32 and 64-bit
accesses are supported by POWER8. Also, the AFU will be designed
with a specific endianness, so all MMIO accesses should consider
endianness (recommend endian(3) variants like: le64toh(),
be64toh() etc). These endian issues equally apply to shared memory
queues the WED may describe.
read
----
Reads events from the AFU. Blocks if no events are pending
(unless O_NONBLOCK is supplied). Returns -EIO in the case of an
unrecoverable error or if the card is removed.
read() will always return an integral number of events.
The buffer passed to read() must be at least 4K bytes.
The result of the read will be a buffer of one or more events,
each event is of type struct cxl_event, of varying size::
struct cxl_event {
struct cxl_event_header header;
union {
struct cxl_event_afu_interrupt irq;
struct cxl_event_data_storage fault;
struct cxl_event_afu_error afu_error;
};
};
The struct cxl_event_header is defined as
::
struct cxl_event_header {
__u16 type;
__u16 size;
__u16 process_element;
__u16 reserved1;
};
type:
This defines the type of event. The type determines how
the rest of the event is structured. These types are
described below and defined by enum cxl_event_type.
size:
This is the size of the event in bytes including the
struct cxl_event_header. The start of the next event can
be found at this offset from the start of the current
event.
process_element:
Context ID of the event.
reserved field:
For future extensions and padding.
If the event type is CXL_EVENT_AFU_INTERRUPT then the event
structure is defined as
::
struct cxl_event_afu_interrupt {
__u16 flags;
__u16 irq; /* Raised AFU interrupt number */
__u32 reserved1;
};
flags:
These flags indicate which optional fields are present
in this struct. Currently all fields are mandatory.
irq:
The IRQ number sent by the AFU.
reserved field:
For future extensions and padding.
If the event type is CXL_EVENT_DATA_STORAGE then the event
structure is defined as
::
struct cxl_event_data_storage {
__u16 flags;
__u16 reserved1;
__u32 reserved2;
__u64 addr;
__u64 dsisr;
__u64 reserved3;
};
flags:
These flags indicate which optional fields are present in
this struct. Currently all fields are mandatory.
address:
The address that the AFU unsuccessfully attempted to
access. Valid accesses will be handled transparently by the
kernel but invalid accesses will generate this event.
dsisr:
This field gives information on the type of fault. It is a
copy of the DSISR from the PSL hardware when the address
fault occurred. The form of the DSISR is as defined in the
CAIA.
reserved fields:
For future extensions
If the event type is CXL_EVENT_AFU_ERROR then the event structure
is defined as
::
struct cxl_event_afu_error {
__u16 flags;
__u16 reserved1;
__u32 reserved2;
__u64 error;
};
flags:
These flags indicate which optional fields are present in
this struct. Currently all fields are Mandatory.
error:
Error status from the AFU. Defined by the AFU.
reserved fields:
For future extensions and padding
2. Card character device (powerVM guest only)
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
In a powerVM guest, an extra character device is created for the
card. The device is only used to write (flash) a new image on the
FPGA accelerator. Once the image is written and verified, the
device tree is updated and the card is reset to reload the updated
image.
open
----
Opens the device and allocates a file descriptor to be used with
the rest of the API. The device can only be opened once.
ioctl
-----
CXL_IOCTL_DOWNLOAD_IMAGE / CXL_IOCTL_VALIDATE_IMAGE:
Starts and controls flashing a new FPGA image. Partial
reconfiguration is not supported (yet), so the image must contain
a copy of the PSL and AFU(s). Since an image can be quite large,
the caller may have to iterate, splitting the image in smaller
chunks.
Takes a pointer to a struct cxl_adapter_image::
struct cxl_adapter_image {
__u64 flags;
__u64 data;
__u64 len_data;
__u64 len_image;
__u64 reserved1;
__u64 reserved2;
__u64 reserved3;
__u64 reserved4;
};
flags:
These flags indicate which optional fields are present in
this struct. Currently all fields are mandatory.
data:
Pointer to a buffer with part of the image to write to the
card.
len_data:
Size of the buffer pointed to by data.
len_image:
Full size of the image.
Sysfs Class
===========
A cxl sysfs class is added under /sys/class/cxl to facilitate
enumeration and tuning of the accelerators. Its layout is
described in Documentation/ABI/obsolete/sysfs-class-cxl
Udev rules
==========
The following udev rules could be used to create a symlink to the
most logical chardev to use in any programming mode (afuX.Yd for
dedicated, afuX.Ys for afu directed), since the API is virtually
identical for each::
SUBSYSTEM=="cxl", ATTRS{mode}=="dedicated_process", SYMLINK="cxl/%b"
SUBSYSTEM=="cxl", ATTRS{mode}=="afu_directed", \
KERNEL=="afu[0-9]*.[0-9]*s", SYMLINK="cxl/%b"

View File

@ -12,7 +12,6 @@ powerpc
bootwrapper
cpu_families
cpu_features
cxl
dawr-power9
dexcr
dscr

View File

@ -183,6 +183,9 @@ The following keys are defined:
defined in the Atomic Compare-and-Swap (CAS) instructions manual starting
from commit 5059e0ca641c ("update to ratified").
* :c:macro:`RISCV_HWPROBE_EXT_ZICNTR`: The Zicntr extension version 2.0
is supported as defined in the RISC-V ISA manual.
* :c:macro:`RISCV_HWPROBE_EXT_ZICOND`: The Zicond extension is supported as
defined in the RISC-V Integer Conditional (Zicond) operations extension
manual starting from commit 95cf1f9 ("Add changes requested by Ved
@ -192,6 +195,9 @@ The following keys are defined:
supported as defined in the RISC-V ISA manual starting from commit
d8ab5c78c207 ("Zihintpause is ratified").
* :c:macro:`RISCV_HWPROBE_EXT_ZIHPM`: The Zihpm extension version 2.0
is supported as defined in the RISC-V ISA manual.
* :c:macro:`RISCV_HWPROBE_EXT_ZVE32X`: The Vector sub-extension Zve32x is
supported, as defined by version 1.0 of the RISC-V Vector extension manual.
@ -239,9 +245,32 @@ The following keys are defined:
ratified in commit 98918c844281 ("Merge pull request #1217 from
riscv/zawrs") of riscv-isa-manual.
* :c:macro:`RISCV_HWPROBE_EXT_ZAAMO`: The Zaamo extension is supported as
defined in the in the RISC-V ISA manual starting from commit e87412e621f1
("integrate Zaamo and Zalrsc text (#1304)").
* :c:macro:`RISCV_HWPROBE_EXT_ZALRSC`: The Zalrsc extension is supported as
defined in the in the RISC-V ISA manual starting from commit e87412e621f1
("integrate Zaamo and Zalrsc text (#1304)").
* :c:macro:`RISCV_HWPROBE_EXT_SUPM`: The Supm extension is supported as
defined in version 1.0 of the RISC-V Pointer Masking extensions.
* :c:macro:`RISCV_HWPROBE_EXT_ZFBFMIN`: The Zfbfmin extension is supported as
defined in the RISC-V ISA manual starting from commit 4dc23d6229de
("Added Chapter title to BF16").
* :c:macro:`RISCV_HWPROBE_EXT_ZVFBFMIN`: The Zvfbfmin extension is supported as
defined in the RISC-V ISA manual starting from commit 4dc23d6229de
("Added Chapter title to BF16").
* :c:macro:`RISCV_HWPROBE_EXT_ZVFBFWMA`: The Zvfbfwma extension is supported as
defined in the RISC-V ISA manual starting from commit 4dc23d6229de
("Added Chapter title to BF16").
* :c:macro:`RISCV_HWPROBE_EXT_ZICBOM`: The Zicbom extension is supported, as
ratified in commit 3dd606f ("Create cmobase-v1.0.pdf") of riscv-CMOs.
* :c:macro:`RISCV_HWPROBE_KEY_CPUPERF_0`: Deprecated. Returns similar values to
:c:macro:`RISCV_HWPROBE_KEY_MISALIGNED_SCALAR_PERF`, but the key was
mistakenly classified as a bitmask rather than a value.
@ -303,3 +332,6 @@ The following keys are defined:
* :c:macro:`RISCV_HWPROBE_VENDOR_EXT_XTHEADVECTOR`: The xtheadvector vendor
extension is supported in the T-Head ISA extensions spec starting from
commit a18c801634 ("Add T-Head VECTOR vendor extension. ").
* :c:macro:`RISCV_HWPROBE_KEY_ZICBOM_BLOCK_SIZE`: An unsigned int which
represents the size of the Zicbom block in bytes.

View File

@ -309,18 +309,35 @@ with specified IO tag in the command data:
``UBLK_IO_COMMIT_AND_FETCH_REQ`` to the server, ublkdrv needs to copy
the server buffer (pages) read to the IO request pages.
Future development
==================
Zero copy
---------
Zero copy is a generic requirement for nbd, fuse or similar drivers. A
problem [#xiaoguang]_ Xiaoguang mentioned is that pages mapped to userspace
can't be remapped any more in kernel with existing mm interfaces. This can
occurs when destining direct IO to ``/dev/ublkb*``. Also, he reported that
big requests (IO size >= 256 KB) may benefit a lot from zero copy.
ublk zero copy relies on io_uring's fixed kernel buffer, which provides
two APIs: `io_buffer_register_bvec()` and `io_buffer_unregister_bvec`.
ublk adds IO command of `UBLK_IO_REGISTER_IO_BUF` to call
`io_buffer_register_bvec()` for ublk server to register client request
buffer into io_uring buffer table, then ublk server can submit io_uring
IOs with the registered buffer index. IO command of `UBLK_IO_UNREGISTER_IO_BUF`
calls `io_buffer_unregister_bvec()` to unregister the buffer, which is
guaranteed to be live between calling `io_buffer_register_bvec()` and
`io_buffer_unregister_bvec()`. Any io_uring operation which supports this
kind of kernel buffer will grab one reference of the buffer until the
operation is completed.
ublk server implementing zero copy or user copy has to be CAP_SYS_ADMIN and
be trusted, because it is ublk server's responsibility to make sure IO buffer
filled with data for handling read command, and ublk server has to return
correct result to ublk driver when handling READ command, and the result
has to match with how many bytes filled to the IO buffer. Otherwise,
uninitialized kernel IO buffer will be exposed to client application.
ublk server needs to align the parameter of `struct ublk_param_dma_align`
with backend for zero copy to work correctly.
For reaching best IO performance, ublk server should align its segment
parameter of `struct ublk_param_segment` with backend for avoiding
unnecessary IO split, which usually hurts io_uring performance.
References
==========
@ -332,5 +349,3 @@ References
.. [#userspace_nbdublk] https://gitlab.com/rwmjones/libnbd/-/tree/nbdublk
.. [#userspace_readme] https://github.com/ming1/ubdsrv/blob/master/README
.. [#xiaoguang] https://lore.kernel.org/linux-block/YoOr6jBfgVm8GvWg@stefanha-x1.localdomain/

View File

@ -86,7 +86,19 @@ Memory ordering guarantee changes:
* none (both fully unordered)
case 2) - increment-based ops that return no value
case 2) - non-"Read/Modify/Write" (RMW) ops with release ordering
-----------------------------------------------------------------
Function changes:
* atomic_set_release() --> refcount_set_release()
Memory ordering guarantee changes:
* none (both provide RELEASE ordering)
case 3) - increment-based ops that return no value
--------------------------------------------------
Function changes:
@ -98,7 +110,7 @@ Memory ordering guarantee changes:
* none (both fully unordered)
case 3) - decrement-based RMW ops that return no value
case 4) - decrement-based RMW ops that return no value
------------------------------------------------------
Function changes:
@ -110,7 +122,7 @@ Memory ordering guarantee changes:
* fully unordered --> RELEASE ordering
case 4) - increment-based RMW ops that return a value
case 5) - increment-based RMW ops that return a value
-----------------------------------------------------
Function changes:
@ -126,7 +138,20 @@ Memory ordering guarantees changes:
result of obtaining pointer to the object!
case 5) - generic dec/sub decrement-based RMW ops that return a value
case 6) - increment-based RMW ops with acquire ordering that return a value
---------------------------------------------------------------------------
Function changes:
* atomic_inc_not_zero() --> refcount_inc_not_zero_acquire()
* no atomic counterpart --> refcount_add_not_zero_acquire()
Memory ordering guarantees changes:
* fully ordered --> ACQUIRE ordering on success
case 7) - generic dec/sub decrement-based RMW ops that return a value
---------------------------------------------------------------------
Function changes:
@ -139,7 +164,7 @@ Memory ordering guarantees changes:
* fully ordered --> RELEASE ordering + ACQUIRE ordering on success
case 6) other decrement-based RMW ops that return a value
case 8) other decrement-based RMW ops that return a value
---------------------------------------------------------
Function changes:
@ -154,7 +179,7 @@ Memory ordering guarantees changes:
.. note:: atomic_add_unless() only provides full order on success.
case 7) - lock-based RMW
case 9) - lock-based RMW
------------------------
Function changes:

View File

@ -489,7 +489,19 @@ Storing ``NULL`` into any index of a multi-index entry will set the
entry at every index to ``NULL`` and dissolve the tie. A multi-index
entry can be split into entries occupying smaller ranges by calling
xas_split_alloc() without the xa_lock held, followed by taking the lock
and calling xas_split().
and calling xas_split() or calling xas_try_split() with xa_lock. The
difference between xas_split_alloc()+xas_split() and xas_try_alloc() is
that xas_split_alloc() + xas_split() split the entry from the original
order to the new order in one shot uniformly, whereas xas_try_split()
iteratively splits the entry containing the index non-uniformly.
For example, to split an order-9 entry, which takes 2^(9-6)=8 slots,
assuming ``XA_CHUNK_SHIFT`` is 6, xas_split_alloc() + xas_split() need
8 xa_node. xas_try_split() splits the order-9 entry into
2 order-8 entries, then split one order-8 entry, based on the given index,
to 2 order-7 entries, ..., and split one order-1 entry to 2 order-0 entries.
When splitting the order-6 entry and a new xa_node is needed, xas_try_split()
will try to allocate one if possible. As a result, xas_try_split() would only
need 1 xa_node instead of 8.
Functions and structures
========================

View File

@ -342,24 +342,6 @@ API usage
See: https://www.kernel.org/doc/html/latest/RCU/whatisRCU.html#full-list-of-rcu-apis
**DEPRECATED_VARIABLE**
EXTRA_{A,C,CPP,LD}FLAGS are deprecated and should be replaced by the new
flags added via commit f77bf01425b1 ("kbuild: introduce ccflags-y,
asflags-y and ldflags-y").
The following conversion scheme maybe used::
EXTRA_AFLAGS -> asflags-y
EXTRA_CFLAGS -> ccflags-y
EXTRA_CPPFLAGS -> cppflags-y
EXTRA_LDFLAGS -> ldflags-y
See:
1. https://lore.kernel.org/lkml/20070930191054.GA15876@uranus.ravnborg.org/
2. https://lore.kernel.org/lkml/1313384834-24433-12-git-send-email-lacombar@gmail.com/
3. https://www.kernel.org/doc/html/latest/kbuild/makefiles.html#compilation-flags
**DEVICE_ATTR_FUNCTIONS**
The function names used in DEVICE_ATTR is unusual.
Typically, the store and show functions are used with <attr>_store and

View File

@ -101,6 +101,29 @@ properties:
and ETF configurations.
$ref: /schemas/graph.yaml#/properties/port
memory-region:
items:
- description: Reserved trace buffer memory for ETR and ETF sinks.
For ETR, this reserved memory region is used for trace data capture.
Same region is used for trace data retention as well after a panic
or watchdog reset.
This reserved memory region is used as trace buffer or used for trace
data retention only if specifically selected by the user in sysfs
interface.
The default memory usage models for ETR in sysfs/perf modes are
otherwise unaltered.
For ETF, this reserved memory region is used by default for
retention of trace data synced from internal SRAM after a panic
or watchdog reset.
- description: Reserved meta data memory. Used for ETR and ETF sinks
for storing metadata.
memory-region-names:
items:
- const: tracedata
- const: metadata
required:
- compatible
- reg
@ -115,6 +138,9 @@ examples:
etr@20070000 {
compatible = "arm,coresight-tmc", "arm,primecell";
reg = <0x20070000 0x1000>;
memory-region = <&etr_trace_mem_reserved>,
<&etr_mdata_mem_reserved>;
memory-region-names = "tracedata", "metadata";
clocks = <&oscclk6a>;
clock-names = "apb_pclk";

View File

@ -0,0 +1,84 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/arm/qcom,coresight-ctcu.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: CoreSight TMC Control Unit
maintainers:
- Yuanfang Zhang <quic_yuanfang@quicinc.com>
- Mao Jinlong <quic_jinlmao@quicinc.com>
- Jie Gan <quic_jiegan@quicinc.com>
description: |
The Trace Memory Controller(TMC) is used for Embedded Trace Buffer(ETB),
Embedded Trace FIFO(ETF) and Embedded Trace Router(ETR) configurations.
The configuration mode (ETB, ETF, ETR) is discovered at boot time when
the device is probed.
The Coresight TMC Control unit controls various Coresight behaviors.
It works as a helper device when connected to TMC ETR device.
It is responsible for controlling the data filter function based on
the source device's Trace ID for TMC ETR device. The trace data with
that Trace id can get into ETR's buffer while other trace data gets
ignored.
properties:
compatible:
enum:
- qcom,sa8775p-ctcu
reg:
maxItems: 1
clocks:
maxItems: 1
clock-names:
items:
- const: apb
in-ports:
$ref: /schemas/graph.yaml#/properties/ports
patternProperties:
'^port(@[0-1])?$':
description: Input connections from CoreSight Trace bus
$ref: /schemas/graph.yaml#/properties/port
required:
- compatible
- reg
- in-ports
additionalProperties: false
examples:
- |
ctcu@1001000 {
compatible = "qcom,sa8775p-ctcu";
reg = <0x1001000 0x1000>;
clocks = <&aoss_qmp>;
clock-names = "apb";
in-ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
ctcu_in_port0: endpoint {
remote-endpoint = <&etr0_out_port>;
};
};
port@1 {
reg = <1>;
ctcu_in_port1: endpoint {
remote-endpoint = <&etr1_out_port>;
};
};
};
};

View File

@ -55,8 +55,7 @@ properties:
- const: arm,primecell
reg:
minItems: 1
maxItems: 2
maxItems: 1
clocks:
maxItems: 1

View File

@ -41,8 +41,7 @@ properties:
- const: arm,primecell
reg:
minItems: 1
maxItems: 2
maxItems: 1
qcom,dsb-element-bits:
description:

View File

@ -0,0 +1,68 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/dma/atmel,at91sam9g45-dma.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Atmel Direct Memory Access Controller (DMA)
maintainers:
- Ludovic Desroches <ludovic.desroches@microchip.com>
description:
The Atmel Direct Memory Access Controller (DMAC) transfers data from a source
peripheral to a destination peripheral over one or more AMBA buses. One channel
is required for each source/destination pair. In the most basic configuration,
the DMAC has one master interface and one channel. The master interface reads
the data from a source and writes it to a destination. Two AMBA transfers are
required for each DMAC data transfer. This is also known as a dual-access transfer.
The DMAC is programmed via the APB interface.
properties:
compatible:
enum:
- atmel,at91sam9g45-dma
- atmel,at91sam9rl-dma
reg:
maxItems: 1
interrupts:
maxItems: 1
"#dma-cells":
description:
Must be <2>, used to represent the number of integer cells in the dma
property of client devices. The two cells in order are
1. The first cell represents the channel number.
2. The second cell is 0 for RX and 1 for TX transfers.
const: 2
clocks:
maxItems: 1
clock-names:
const: dma_clk
required:
- compatible
- reg
- interrupts
- "#dma-cells"
- clocks
- clock-names
additionalProperties: false
examples:
- |
dma-controller@ffffec00 {
compatible = "atmel,at91sam9g45-dma";
reg = <0xffffec00 0x200>;
interrupts = <21>;
#dma-cells = <2>;
clocks = <&pmc 2 20>;
clock-names = "dma_clk";
};
...

View File

@ -32,6 +32,9 @@ properties:
- microchip,sam9x60-dma
- microchip,sam9x7-dma
- const: atmel,sama5d4-dma
- items:
- const: microchip,sama7d65-dma
- const: microchip,sama7g5-dma
"#dma-cells":
description: |

View File

@ -1,42 +0,0 @@
* Atmel Direct Memory Access Controller (DMA)
Required properties:
- compatible: Should be "atmel,<chip>-dma".
- reg: Should contain DMA registers location and length.
- interrupts: Should contain DMA interrupt.
- #dma-cells: Must be <2>, used to represent the number of integer cells in
the dmas property of client devices.
Example:
dma0: dma@ffffec00 {
compatible = "atmel,at91sam9g45-dma";
reg = <0xffffec00 0x200>;
interrupts = <21>;
#dma-cells = <2>;
};
DMA clients connected to the Atmel DMA controller must use the format
described in the dma.txt file, using a three-cell specifier for each channel:
a phandle plus two integer cells.
The three cells in order are:
1. A phandle pointing to the DMA controller.
2. The memory interface (16 most significant bits), the peripheral interface
(16 less significant bits).
3. Parameters for the at91 DMA configuration register which are device
dependent:
- bit 7-0: peripheral identifier for the hardware handshaking interface. The
identifier can be different for tx and rx.
- bit 11-8: FIFO configuration. 0 for half FIFO, 1 for ALAP, 2 for ASAP.
Example:
i2c0@i2c@f8010000 {
compatible = "atmel,at91sam9x5-i2c";
reg = <0xf8010000 0x100>;
interrupts = <9 4 6>;
dmas = <&dma0 1 7>,
<&dma0 1 8>;
dma-names = "tx", "rx";
};

View File

@ -27,6 +27,14 @@ properties:
- fsl,imx93-edma4
- fsl,imx95-edma5
- nxp,s32g2-edma
- items:
- enum:
- fsl,imx94-edma3
- const: fsl,imx93-edma3
- items:
- enum:
- fsl,imx94-edma5
- const: fsl,imx95-edma5
- items:
- const: fsl,ls1028a-edma
- const: fsl,vf610-edma

View File

@ -0,0 +1,137 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/dma/fsl,elo-dma.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Freescale Elo DMA Controller
maintainers:
- J. Neuschäfer <j.ne@posteo.net>
description:
This is a little-endian 4-channel DMA controller, used in Freescale mpc83xx
series chips such as mpc8315, mpc8349, mpc8379 etc.
properties:
compatible:
items:
- enum:
- fsl,mpc8313-dma
- fsl,mpc8315-dma
- fsl,mpc8323-dma
- fsl,mpc8347-dma
- fsl,mpc8349-dma
- fsl,mpc8360-dma
- fsl,mpc8377-dma
- fsl,mpc8378-dma
- fsl,mpc8379-dma
- const: fsl,elo-dma
reg:
items:
- description:
DMA General Status Register, i.e. DGSR which contains status for
all the 4 DMA channels.
cell-index:
$ref: /schemas/types.yaml#/definitions/uint32
description: Controller index. 0 for controller @ 0x8100.
ranges: true
"#address-cells":
const: 1
"#size-cells":
const: 1
interrupts:
maxItems: 1
description: Controller interrupt.
required:
- compatible
- reg
patternProperties:
"^dma-channel@[0-9a-f]+$":
type: object
additionalProperties: false
properties:
compatible:
oneOf:
# native DMA channel
- items:
- enum:
- fsl,mpc8315-dma-channel
- fsl,mpc8323-dma-channel
- fsl,mpc8347-dma-channel
- fsl,mpc8349-dma-channel
- fsl,mpc8360-dma-channel
- fsl,mpc8377-dma-channel
- fsl,mpc8378-dma-channel
- fsl,mpc8379-dma-channel
- const: fsl,elo-dma-channel
# audio DMA channel, see fsl,ssi.yaml
- const: fsl,ssi-dma-channel
reg:
maxItems: 1
cell-index:
description: DMA channel index starts at 0.
interrupts:
maxItems: 1
description:
Per-channel interrupt. Only necessary if no controller interrupt has
been provided.
additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/irq.h>
dma@82a8 {
compatible = "fsl,mpc8349-dma", "fsl,elo-dma";
reg = <0x82a8 4>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x8100 0x1a4>;
interrupts = <71 IRQ_TYPE_LEVEL_LOW>;
cell-index = <0>;
dma-channel@0 {
compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
reg = <0 0x80>;
cell-index = <0>;
interrupts = <71 IRQ_TYPE_LEVEL_LOW>;
};
dma-channel@80 {
compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
reg = <0x80 0x80>;
cell-index = <1>;
interrupts = <71 IRQ_TYPE_LEVEL_LOW>;
};
dma-channel@100 {
compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
reg = <0x100 0x80>;
cell-index = <2>;
interrupts = <71 IRQ_TYPE_LEVEL_LOW>;
};
dma-channel@180 {
compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
reg = <0x180 0x80>;
cell-index = <3>;
interrupts = <71 IRQ_TYPE_LEVEL_LOW>;
};
};
...

View File

@ -0,0 +1,125 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/dma/fsl,elo3-dma.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Freescale Elo3 DMA Controller
maintainers:
- J. Neuschäfer <j.ne@posteo.net>
description:
DMA controller which has same function as EloPlus except that Elo3 has 8
channels while EloPlus has only 4, it is used in Freescale Txxx and Bxxx
series chips, such as t1040, t4240, b4860.
properties:
compatible:
const: fsl,elo3-dma
reg:
items:
- description:
DMA General Status Registers starting from DGSR0, for channel 1~4
- description:
DMA General Status Registers starting from DGSR1, for channel 5~8
ranges: true
"#address-cells":
const: 1
"#size-cells":
const: 1
interrupts:
maxItems: 1
patternProperties:
"^dma-channel@[0-9a-f]+$":
type: object
additionalProperties: false
properties:
compatible:
enum:
# native DMA channel
- fsl,eloplus-dma-channel
# audio DMA channel, see fsl,ssi.yaml
- fsl,ssi-dma-channel
reg:
maxItems: 1
interrupts:
maxItems: 1
description:
Per-channel interrupt. Only necessary if no controller interrupt has
been provided.
additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/irq.h>
dma@100300 {
compatible = "fsl,elo3-dma";
reg = <0x100300 0x4>,
<0x100600 0x4>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x100100 0x500>;
dma-channel@0 {
compatible = "fsl,eloplus-dma-channel";
reg = <0x0 0x80>;
interrupts = <28 IRQ_TYPE_EDGE_FALLING 0 0>;
};
dma-channel@80 {
compatible = "fsl,eloplus-dma-channel";
reg = <0x80 0x80>;
interrupts = <29 IRQ_TYPE_EDGE_FALLING 0 0>;
};
dma-channel@100 {
compatible = "fsl,eloplus-dma-channel";
reg = <0x100 0x80>;
interrupts = <30 IRQ_TYPE_EDGE_FALLING 0 0>;
};
dma-channel@180 {
compatible = "fsl,eloplus-dma-channel";
reg = <0x180 0x80>;
interrupts = <31 IRQ_TYPE_EDGE_FALLING 0 0>;
};
dma-channel@300 {
compatible = "fsl,eloplus-dma-channel";
reg = <0x300 0x80>;
interrupts = <76 IRQ_TYPE_EDGE_FALLING 0 0>;
};
dma-channel@380 {
compatible = "fsl,eloplus-dma-channel";
reg = <0x380 0x80>;
interrupts = <77 IRQ_TYPE_EDGE_FALLING 0 0>;
};
dma-channel@400 {
compatible = "fsl,eloplus-dma-channel";
reg = <0x400 0x80>;
interrupts = <78 IRQ_TYPE_EDGE_FALLING 0 0>;
};
dma-channel@480 {
compatible = "fsl,eloplus-dma-channel";
reg = <0x480 0x80>;
interrupts = <79 IRQ_TYPE_EDGE_FALLING 0 0>;
};
};
...

View File

@ -0,0 +1,132 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/dma/fsl,eloplus-dma.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Freescale EloPlus DMA Controller
maintainers:
- J. Neuschäfer <j.ne@posteo.net>
description:
This is a 4-channel DMA controller with extended addresses and chaining,
mainly used in Freescale mpc85xx/86xx, Pxxx and BSC series chips, such as
mpc8540, mpc8641 p4080, bsc9131 etc.
properties:
compatible:
oneOf:
- items:
- enum:
- fsl,mpc8540-dma
- fsl,mpc8541-dma
- fsl,mpc8548-dma
- fsl,mpc8555-dma
- fsl,mpc8560-dma
- fsl,mpc8572-dma
- fsl,mpc8641-dma
- const: fsl,eloplus-dma
- const: fsl,eloplus-dma
reg:
items:
- description:
DMA General Status Register, i.e. DGSR which contains
status for all the 4 DMA channels
cell-index:
$ref: /schemas/types.yaml#/definitions/uint32
description:
controller index. 0 for controller @ 0x21000, 1 for controller @ 0xc000
ranges: true
"#address-cells":
const: 1
"#size-cells":
const: 1
interrupts:
maxItems: 1
description: Controller interrupt.
patternProperties:
"^dma-channel@[0-9a-f]+$":
type: object
additionalProperties: false
properties:
compatible:
oneOf:
# native DMA channel
- items:
- enum:
- fsl,mpc8540-dma-channel
- fsl,mpc8541-dma-channel
- fsl,mpc8548-dma-channel
- fsl,mpc8555-dma-channel
- fsl,mpc8560-dma-channel
- fsl,mpc8572-dma-channel
- const: fsl,eloplus-dma-channel
# audio DMA channel, see fsl,ssi.yaml
- const: fsl,ssi-dma-channel
reg:
maxItems: 1
cell-index:
description: DMA channel index starts at 0.
interrupts:
maxItems: 1
description:
Per-channel interrupt. Only necessary if no controller interrupt has
been provided.
additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/irq.h>
dma@21300 {
compatible = "fsl,mpc8540-dma", "fsl,eloplus-dma";
reg = <0x21300 4>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x21100 0x200>;
cell-index = <0>;
dma-channel@0 {
compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel";
reg = <0 0x80>;
cell-index = <0>;
interrupts = <20 IRQ_TYPE_EDGE_FALLING>;
};
dma-channel@80 {
compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel";
reg = <0x80 0x80>;
cell-index = <1>;
interrupts = <21 IRQ_TYPE_EDGE_FALLING>;
};
dma-channel@100 {
compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel";
reg = <0x100 0x80>;
cell-index = <2>;
interrupts = <22 IRQ_TYPE_EDGE_FALLING>;
};
dma-channel@180 {
compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel";
reg = <0x180 0x80>;
cell-index = <3>;
interrupts = <23 IRQ_TYPE_EDGE_FALLING>;
};
};
...

View File

@ -31,6 +31,12 @@ properties:
- fsl,imx6q-dma-apbh
- fsl,imx6sx-dma-apbh
- fsl,imx7d-dma-apbh
- fsl,imx8dxl-dma-apbh
- fsl,imx8mm-dma-apbh
- fsl,imx8mn-dma-apbh
- fsl,imx8mp-dma-apbh
- fsl,imx8mq-dma-apbh
- fsl,imx8qm-dma-apbh
- fsl,imx8qxp-dma-apbh
- const: fsl,imx28-dma-apbh
- enum:

View File

@ -59,6 +59,8 @@ properties:
minimum: 1
maximum: 8
dma-noncoherent: true
resets:
minItems: 1
maxItems: 2

View File

@ -130,10 +130,13 @@ properties:
- const: giantec,gt24c32a
- const: atmel,24c32
- items:
- const: onnn,n24s64b
- enum:
- onnn,n24s64b
- puya,p24c64f
- const: atmel,24c64
- items:
- enum:
- giantec,gt24p128e
- giantec,gt24p128f
- renesas,r1ex24128
- samsung,s524ad0xd1

View File

@ -30,6 +30,7 @@ properties:
- items:
- enum:
- samsung,exynos5433-hsi2c
- samsung,exynos7870-hsi2c
- tesla,fsd-hsi2c
- const: samsung,exynos7-hsi2c
- items:

View File

@ -26,6 +26,7 @@ properties:
- fsl,imx8qm-lpi2c
- fsl,imx8ulp-lpi2c
- fsl,imx93-lpi2c
- fsl,imx94-lpi2c
- fsl,imx95-lpi2c
- const: fsl,imx7ulp-lpi2c

View File

@ -37,6 +37,7 @@ properties:
- rockchip,px30-i2c
- rockchip,rk3308-i2c
- rockchip,rk3328-i2c
- rockchip,rk3562-i2c
- rockchip,rk3568-i2c
- rockchip,rk3576-i2c
- rockchip,rk3588-i2c

View File

@ -40,6 +40,9 @@ properties:
- const: tx
- const: rx
interconnects:
maxItems: 1
interrupts:
maxItems: 1
@ -52,9 +55,15 @@ properties:
- const: default
- const: sleep
power-domains:
maxItems: 1
reg:
maxItems: 1
required-opps:
maxItems: 1
required:
- compatible
- clock-names
@ -67,7 +76,9 @@ unevaluatedProperties: false
examples:
- |
#include <dt-bindings/clock/qcom,gcc-msm8998.h>
#include <dt-bindings/interconnect/qcom,msm8996.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/power/qcom-rpmpd.h>
i2c@c175000 {
compatible = "qcom,i2c-qup-v2.2.1";
@ -82,6 +93,9 @@ examples:
pinctrl-names = "default", "sleep";
pinctrl-0 = <&blsp1_i2c1_default>;
pinctrl-1 = <&blsp1_i2c1_sleep>;
power-domains = <&rpmpd MSM8909_VDDCX>;
required-opps = <&rpmpd_opp_svs_krait>;
interconnects = <&pnoc MASTER_BLSP_1 &bimc SLAVE_EBI_CH0>;
clock-frequency = <400000>;
#address-cells = <1>;

View File

@ -22,6 +22,7 @@ properties:
- samsung,exynos5-sata-phy-i2c
- items:
- enum:
- samsung,exynos7870-i2c
- samsung,exynos7885-i2c
- samsung,exynos850-i2c
- const: samsung,s3c2440-i2c

View File

@ -27,6 +27,11 @@ properties:
oneOf:
- description: Generic Synopsys DesignWare I2C controller
const: snps,designware-i2c
- description: Renesas RZ/N1D I2C controller
items:
- const: renesas,r9a06g032-i2c # RZ/N1D
- const: renesas,rzn1-i2c # RZ/N1
- const: snps,designware-i2c
- description: Microsemi Ocelot SoCs I2C controller
items:
- const: mscc,ocelot-i2c

View File

@ -0,0 +1,61 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/i2c/spacemit,k1-i2c.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: I2C controller embedded in SpacemiT's K1 SoC
maintainers:
- Troy Mitchell <troymitchell988@gmail.com>
properties:
compatible:
const: spacemit,k1-i2c
reg:
maxItems: 1
interrupts:
maxItems: 1
clocks:
items:
- description: I2C Functional Clock
- description: APB Bus Clock
clock-names:
items:
- const: func
- const: bus
clock-frequency:
description: |
K1 support three different modes which running different frequencies
standard speed mode: up to 100000 (100Hz)
fast speed mode : up to 400000 (400Hz)
high speed mode : up to 3300000 (3.3Mhz)
default: 400000
maximum: 3300000
required:
- compatible
- reg
- interrupts
- clocks
unevaluatedProperties: false
examples:
- |
i2c@d4010800 {
compatible = "spacemit,k1-i2c";
reg = <0xd4010800 0x38>;
interrupt-parent = <&plic>;
interrupts = <36>;
clocks =<&ccu 32>, <&ccu 84>;
clock-names = "func", "bus";
clock-frequency = <100000>;
};
...

View File

@ -47,6 +47,11 @@ properties:
$ref: /schemas/types.yaml#/definitions/string
deprecated: true
mux-states:
description:
mux controller node to route the I2C signals from SoC to clients.
maxItems: 1
required:
- compatible
- reg
@ -87,4 +92,5 @@ examples:
interrupts = <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
mux-states = <&i2c_mux 1>;
};

View File

@ -14,7 +14,9 @@ allOf:
properties:
compatible:
const: silvaco,i3c-master-v1
enum:
- nuvoton,npcm845-i3c
- silvaco,i3c-master-v1
reg:
maxItems: 1

View File

@ -34,6 +34,9 @@ properties:
interrupts:
maxItems: 1
power-domains:
maxItems: 1
required:
- compatible
- reg

View File

@ -0,0 +1,110 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
# Copyright 2024 Analog Devices Inc.
# Copyright 2024 BayLibre, SAS.
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/adc/adi,ad4030.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Analog Devices AD4030 and AD4630 ADC families
maintainers:
- Michael Hennerich <michael.hennerich@analog.com>
- Nuno Sa <nuno.sa@analog.com>
description: |
Analog Devices AD4030 single channel and AD4630/AD4632 dual channel precision
SAR ADC families
* https://www.analog.com/media/en/technical-documentation/data-sheets/ad4030-24-4032-24.pdf
* https://www.analog.com/media/en/technical-documentation/data-sheets/ad4630-24_ad4632-24.pdf
* https://www.analog.com/media/en/technical-documentation/data-sheets/ad4630-16-4632-16.pdf
properties:
compatible:
enum:
- adi,ad4030-24
- adi,ad4032-24
- adi,ad4630-16
- adi,ad4630-24
- adi,ad4632-16
- adi,ad4632-24
reg:
maxItems: 1
spi-max-frequency:
maximum: 102040816
spi-rx-bus-width:
enum: [1, 2, 4]
vdd-5v-supply: true
vdd-1v8-supply: true
vio-supply: true
ref-supply:
description:
Optional External unbuffered reference. Used when refin-supply is not
connected.
refin-supply:
description:
Internal buffered Reference. Used when ref-supply is not connected.
cnv-gpios:
description:
The Convert Input (CNV). It initiates the sampling conversions.
maxItems: 1
reset-gpios:
description:
The Reset Input (/RST). Used for asynchronous device reset.
maxItems: 1
interrupts:
description:
The BUSY pin is used to signal that the conversions results are available
to be transferred when in SPI Clocking Mode. This nodes should be
connected to an interrupt that is triggered when the BUSY line goes low.
maxItems: 1
interrupt-names:
const: busy
required:
- compatible
- reg
- vdd-5v-supply
- vdd-1v8-supply
- vio-supply
- cnv-gpios
oneOf:
- required:
- ref-supply
- required:
- refin-supply
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/gpio/gpio.h>
spi {
#address-cells = <1>;
#size-cells = <0>;
adc@0 {
compatible = "adi,ad4030-24";
reg = <0>;
spi-max-frequency = <80000000>;
vdd-5v-supply = <&supply_5V>;
vdd-1v8-supply = <&supply_1_8V>;
vio-supply = <&supply_1_8V>;
ref-supply = <&supply_5V>;
cnv-gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>;
reset-gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
};
};

View File

@ -84,6 +84,10 @@ properties:
description: The Reset Input (RESET). Should be configured GPIO_ACTIVE_LOW.
maxItems: 1
pwms:
description: PWM signal connected to the CNV pin.
maxItems: 1
interrupts:
minItems: 1
items:
@ -106,6 +110,15 @@ properties:
The first cell is the GPn number: 0 to 3.
The second cell takes standard GPIO flags.
'#trigger-source-cells':
description: |
First cell indicates the output signal: 0 = BUSY, 1 = ALERT.
Second cell indicates which GPn pin is used: 0, 2 or 3.
For convenience, macros for these values are available in
dt-bindings/iio/adc/adi,ad4695.h.
const: 2
"#address-cells":
const: 1

View File

@ -0,0 +1,153 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
# Copyright 2024 Analog Devices Inc.
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/adc/adi,ad4851.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Analog Devices AD485X family
maintainers:
- Sergiu Cuciurean <sergiu.cuciurean@analog.com>
- Dragos Bogdan <dragos.bogdan@analog.com>
- Antoniu Miclaus <antoniu.miclaus@analog.com>
description: |
Analog Devices AD485X fully buffered, 8-channel simultaneous sampling,
16/20-bit, 1 MSPS data acquisition system (DAS) with differential, wide
common-mode range inputs.
https://www.analog.com/media/en/technical-documentation/data-sheets/ad4855.pdf
https://www.analog.com/media/en/technical-documentation/data-sheets/ad4856.pdf
https://www.analog.com/media/en/technical-documentation/data-sheets/ad4857.pdf
https://www.analog.com/media/en/technical-documentation/data-sheets/ad4858.pdf
$ref: /schemas/spi/spi-peripheral-props.yaml#
properties:
compatible:
enum:
- adi,ad4851
- adi,ad4852
- adi,ad4853
- adi,ad4854
- adi,ad4855
- adi,ad4856
- adi,ad4857
- adi,ad4858
- adi,ad4858i
reg:
maxItems: 1
vcc-supply: true
vee-supply: true
vdd-supply: true
vddh-supply: true
vddl-supply: true
vio-supply: true
vrefbuf-supply: true
vrefio-supply: true
pwms:
description: PWM connected to the CNV pin.
maxItems: 1
io-backends:
maxItems: 1
pd-gpios:
maxItems: 1
spi-max-frequency:
maximum: 25000000
'#address-cells':
const: 1
'#size-cells':
const: 0
patternProperties:
"^channel(@[0-7])?$":
$ref: adc.yaml
type: object
description: Represents the channels which are connected to the ADC.
properties:
reg:
description:
The channel number, as specified in the datasheet (from 0 to 7).
minimum: 0
maximum: 7
diff-channels:
description:
Each channel can be configured as a bipolar differential channel.
The ADC uses the same positive and negative inputs for this.
This property must be specified as 'reg' (or the channel number) for
both positive and negative inputs (i.e. diff-channels = <reg reg>).
Since the configuration is bipolar differential, the 'bipolar'
property is required.
items:
minimum: 0
maximum: 7
bipolar: true
required:
- reg
additionalProperties: false
required:
- compatible
- reg
- vcc-supply
- vee-supply
- vdd-supply
- vio-supply
- pwms
unevaluatedProperties: false
examples:
- |
spi {
#address-cells = <1>;
#size-cells = <0>;
adc@0{
#address-cells = <1>;
#size-cells = <0>;
compatible = "adi,ad4858";
reg = <0>;
spi-max-frequency = <10000000>;
vcc-supply = <&vcc>;
vdd-supply = <&vdd>;
vee-supply = <&vee>;
vddh-supply = <&vddh>;
vddl-supply = <&vddl>;
vio-supply = <&vio>;
pwms = <&pwm_gen 0 0>;
io-backends = <&iio_backend>;
channel@0 {
reg = <0>;
diff-channels = <0 0>;
bipolar;
};
channel@1 {
reg = <1>;
};
};
};
...

View File

@ -0,0 +1,149 @@
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
# Copyright 2025 Analog Devices Inc.
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/adc/adi,ad7191.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Analog Devices AD7191 ADC
maintainers:
- Alisa-Dariana Roman <alisa.roman@analog.com>
description: |
Bindings for the Analog Devices AD7191 ADC device. Datasheet can be
found here:
https://www.analog.com/media/en/technical-documentation/data-sheets/AD7191.pdf
The device's PDOWN pin must be connected to the SPI controller's chip select
pin.
properties:
compatible:
enum:
- adi,ad7191
reg:
maxItems: 1
spi-cpol: true
spi-cpha: true
clocks:
maxItems: 1
description:
Must be present when CLKSEL pin is tied HIGH to select external clock
source (either a crystal between MCLK1 and MCLK2 pins, or a
CMOS-compatible clock driving MCLK2 pin). Must be absent when CLKSEL pin
is tied LOW to use the internal 4.92MHz clock.
interrupts:
maxItems: 1
avdd-supply:
description: AVdd voltage supply
dvdd-supply:
description: DVdd voltage supply
vref-supply:
description: Vref voltage supply
odr-gpios:
description:
ODR1 and ODR2 pins for output data rate selection. Should be defined if
adi,odr-value is absent.
minItems: 2
maxItems: 2
adi,odr-value:
$ref: /schemas/types.yaml#/definitions/uint32
description: |
Should be present if ODR pins are pin-strapped. Possible values:
120 Hz (ODR1=0, ODR2=0)
60 Hz (ODR1=0, ODR2=1)
50 Hz (ODR1=1, ODR2=0)
10 Hz (ODR1=1, ODR2=1)
If defined, odr-gpios must be absent.
enum: [120, 60, 50, 10]
pga-gpios:
description:
PGA1 and PGA2 pins for gain selection. Should be defined if adi,pga-value
is absent.
minItems: 2
maxItems: 2
adi,pga-value:
$ref: /schemas/types.yaml#/definitions/uint32
description: |
Should be present if PGA pins are pin-strapped. Possible values:
Gain 1 (PGA1=0, PGA2=0)
Gain 8 (PGA1=0, PGA2=1)
Gain 64 (PGA1=1, PGA2=0)
Gain 128 (PGA1=1, PGA2=1)
If defined, pga-gpios must be absent.
enum: [1, 8, 64, 128]
temp-gpios:
description: TEMP pin for temperature sensor enable.
maxItems: 1
chan-gpios:
description: CHAN pin for input channel selection.
maxItems: 1
required:
- compatible
- reg
- interrupts
- avdd-supply
- dvdd-supply
- vref-supply
- spi-cpol
- spi-cpha
- temp-gpios
- chan-gpios
allOf:
- $ref: /schemas/spi/spi-peripheral-props.yaml#
- oneOf:
- required:
- adi,odr-value
- required:
- odr-gpios
- oneOf:
- required:
- adi,pga-value
- required:
- pga-gpios
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
spi {
#address-cells = <1>;
#size-cells = <0>;
adc@0 {
compatible = "adi,ad7191";
reg = <0>;
spi-max-frequency = <1000000>;
spi-cpol;
spi-cpha;
clocks = <&ad7191_mclk>;
interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
interrupt-parent = <&gpio>;
avdd-supply = <&avdd>;
dvdd-supply = <&dvdd>;
vref-supply = <&vref>;
adi,pga-value = <1>;
odr-gpios = <&gpio 23 GPIO_ACTIVE_HIGH>, <&gpio 24 GPIO_ACTIVE_HIGH>;
temp-gpios = <&gpio 22 GPIO_ACTIVE_HIGH>;
chan-gpios = <&gpio 27 GPIO_ACTIVE_HIGH>;
};
};

View File

@ -27,6 +27,7 @@ description: |
* https://www.analog.com/en/products/ad7388-4.html
* https://www.analog.com/en/products/adaq4370-4.html
* https://www.analog.com/en/products/adaq4380-4.html
* https://www.analog.com/en/products/adaq4381-4.html
$ref: /schemas/spi/spi-peripheral-props.yaml#
@ -50,6 +51,7 @@ properties:
- adi,ad7388-4
- adi,adaq4370-4
- adi,adaq4380-4
- adi,adaq4381-4
reg:
maxItems: 1
@ -201,6 +203,7 @@ allOf:
- adi,ad7380-4
- adi,adaq4370-4
- adi,adaq4380-4
- adi,adaq4381-4
then:
properties:
refio-supply: false
@ -218,6 +221,7 @@ allOf:
enum:
- adi,adaq4370-4
- adi,adaq4380-4
- adi,adaq4381-4
then:
required:
- vs-p-supply

View File

@ -17,13 +17,25 @@ description: |
interface for the actual ADC, while this IP core will interface
to the data-lines of the ADC and handle the streaming of data into
memory via DMA.
In some cases, the AXI ADC interface is used to perform specialized
operation to a particular ADC, e.g access the physical bus through
specific registers to write ADC registers.
In this case, we use a different compatible which indicates the target
IP core's name.
The following IP is currently supported:
- AXI AD7606x: specialized version of the IP core for all the chips from
the ad7606 family.
https://wiki.analog.com/resources/fpga/docs/axi_adc_ip
https://analogdevicesinc.github.io/hdl/library/axi_ad485x/index.html
http://analogdevicesinc.github.io/hdl/library/axi_ad7606x/index.html
properties:
compatible:
enum:
- adi,axi-adc-10.0.a
- adi,axi-ad7606x
- adi,axi-ad485x
reg:
maxItems: 1
@ -47,17 +59,48 @@ properties:
'#io-backend-cells':
const: 0
'#address-cells':
const: 1
'#size-cells':
const: 0
patternProperties:
"^adc@[0-9a-f]+$":
type: object
properties:
reg:
maxItems: 1
additionalProperties: true
required:
- compatible
- reg
required:
- compatible
- dmas
- reg
- clocks
allOf:
- if:
properties:
compatible:
not:
contains:
const: adi,axi-ad7606x
then:
properties:
'#address-cells': false
'#size-cells': false
patternProperties:
"^adc@[0-9a-f]+$": false
additionalProperties: false
examples:
- |
axi-adc@44a00000 {
adc@44a00000 {
compatible = "adi,axi-adc-10.0.a";
reg = <0x44a00000 0x10000>;
dmas = <&rx_dma 0>;
@ -65,4 +108,31 @@ examples:
clocks = <&axi_clk>;
#io-backend-cells = <0>;
};
- |
#include <dt-bindings/gpio/gpio.h>
parallel_bus_controller@44a00000 {
compatible = "adi,axi-ad7606x";
reg = <0x44a00000 0x10000>;
dmas = <&rx_dma 0>;
dma-names = "rx";
clocks = <&ext_clk>;
#address-cells = <1>;
#size-cells = <0>;
adc@0 {
compatible = "adi,ad7606b";
reg = <0>;
pwms = <&axi_pwm_gen 0 0>;
pwm-names = "convst1";
avcc-supply = <&adc_vref>;
vdrive-supply = <&vdd_supply>;
reset-gpios = <&gpio0 91 GPIO_ACTIVE_HIGH>;
standby-gpios = <&gpio0 90 GPIO_ACTIVE_LOW>;
adi,range-gpios = <&gpio0 89 GPIO_ACTIVE_HIGH>;
adi,oversampling-ratio-gpios = <&gpio0 88 GPIO_ACTIVE_HIGH
&gpio0 87 GPIO_ACTIVE_HIGH
&gpio0 86 GPIO_ACTIVE_HIGH>;
io-backends = <&parallel_bus_controller>;
};
};
...

View File

@ -19,7 +19,14 @@ description:
properties:
compatible:
const: nxp,imx93-adc
oneOf:
- enum:
- nxp,imx93-adc
- items:
- enum:
- nxp,imx94-adc
- nxp,imx95-adc
- const: nxp,imx93-adc
reg:
maxItems: 1

View File

@ -15,6 +15,8 @@ properties:
- const: rockchip,saradc
- const: rockchip,rk3066-tsadc
- const: rockchip,rk3399-saradc
- const: rockchip,rk3528-saradc
- const: rockchip,rk3562-saradc
- const: rockchip,rk3588-saradc
- items:
- const: rockchip,rk3576-saradc

View File

@ -0,0 +1,63 @@
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/adc/ti,ads7138.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Texas Instruments ADS7128/ADS7138 analog-to-digital converter (ADC)
maintainers:
- Tobias Sperling <tobias.sperling@softing.com>
description: |
The ADS7128 and ADS7138 chips are 12-bit, 8 channel analog-to-digital
converters (ADC) with build-in digital window comparator (DWC), using the
I2C interface.
ADS7128 differs in the addition of further hardware features, like a
root-mean-square (RMS) and a zero-crossing-detect (ZCD) module.
Datasheets:
https://www.ti.com/product/ADS7128
https://www.ti.com/product/ADS7138
properties:
compatible:
enum:
- ti,ads7128
- ti,ads7138
reg:
maxItems: 1
avdd-supply:
description:
The regulator used as analog supply voltage as well as reference voltage.
interrupts:
description:
Interrupt on ALERT pin, triggers on low level.
maxItems: 1
required:
- compatible
- reg
- avdd-supply
additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/irq.h>
i2c {
#address-cells = <1>;
#size-cells = <0>;
adc@10 {
compatible = "ti,ads7138";
reg = <0x10>;
avdd-supply = <&reg_stb_3v3>;
interrupt-parent = <&gpio2>;
interrupts = <12 IRQ_TYPE_LEVEL_LOW>;
};
};
...

View File

@ -55,18 +55,18 @@ examples:
#address-cells = <1>;
#size-cells = <0>;
dac@0 {
reg = <0>;
compatible = "adi,ad5390-5";
vref-supply = <&dacvref>;
reg = <0>;
compatible = "adi,ad5390-5";
vref-supply = <&dacvref>;
};
};
- |
i2c {
#address-cells = <1>;
#size-cells = <0>;
dac@42 {
reg = <0x42>;
compatible = "adi,ad5380-3";
};
#address-cells = <1>;
#size-cells = <0>;
dac@42 {
reg = <0x42>;
compatible = "adi,ad5380-3";
};
};
...

View File

@ -30,8 +30,9 @@ properties:
clock-names:
description:
Must be "clkin"
maxItems: 1
Must be "clkin" if the input reference is single ended or "clkin-diff"
if the input reference is differential.
enum: [clkin, clkin-diff]
adi,mute-till-lock-en:
type: boolean

View File

@ -43,13 +43,13 @@ additionalProperties: false
examples:
- |
i2c {
#address-cells = <1>;
#size-cells = <0>;
#address-cells = <1>;
#size-cells = <0>;
temperature-sensor@43 {
compatible = "sciosense,ens210";
reg = <0x43>;
};
temperature-sensor@43 {
compatible = "sciosense,ens210";
reg = <0x43>;
};
};
...

View File

@ -0,0 +1,74 @@
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/imu/adi,adis16550.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Analog Devices ADIS16550 and similar IMUs
maintainers:
- Nuno Sa <nuno.sa@analog.com>
- Ramona Gradinariu <ramona.gradinariu@analog.com>
- Antoniu Miclaus <antoniu.miclaus@analog.com>
- Robert Budai <robert.budai@analog.com>
properties:
compatible:
enum:
- adi,adis16550
reg:
maxItems: 1
spi-cpha: true
spi-cpol: true
spi-max-frequency:
maximum: 15000000
vdd-supply: true
interrupts:
maxItems: 1
reset-gpios:
description:
Active low RESET pin.
maxItems: 1
clocks:
description: If not provided, then the internal clock is used.
maxItems: 1
required:
- compatible
- reg
- interrupts
- spi-cpha
- spi-cpol
- spi-max-frequency
- vdd-supply
allOf:
- $ref: /schemas/spi/spi-peripheral-props.yaml#
additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/irq.h>
spi {
#address-cells = <1>;
#size-cells = <0>;
imu@0 {
compatible = "adi,adis16550";
reg = <0>;
spi-max-frequency = <15000000>;
spi-cpol;
spi-cpha;
vdd-supply = <&vdd>;
interrupts = <4 IRQ_TYPE_EDGE_FALLING>;
interrupt-parent = <&gpio>;
};
};

View File

@ -0,0 +1,78 @@
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/light/brcm,apds9160.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Broadcom Combined Proximity & Ambient light sensor
maintainers:
- Mikael Gonella-Bolduc <m.gonella.bolduc@gmail.com>
description: |
Datasheet: https://docs.broadcom.com/docs/APDS-9160-003-DS
properties:
compatible:
enum:
- brcm,apds9160
reg:
maxItems: 1
interrupts:
maxItems: 1
vdd-supply: true
ps-cancellation-duration:
$ref: /schemas/types.yaml#/definitions/uint32
description:
Proximity sensor cancellation pulse duration in half clock cycles.
This parameter determines a cancellation pulse duration.
The cancellation is applied in the integration phase to cancel out
unwanted reflected light from very near objects such as tempered glass
in front of the sensor.
default: 0
maximum: 63
ps-cancellation-current-picoamp:
description:
Proximity sensor crosstalk cancellation current in picoampere.
This parameter adjusts the current in steps of 2400 pA up to 276000 pA.
The provided value must be a multiple of 2400 and in one of these ranges
[60000 - 96000]
[120000 - 156000]
[180000 - 216000]
[240000 - 276000]
This parameter is used in conjunction with the cancellation duration.
minimum: 60000
maximum: 276000
multipleOf: 2400
required:
- compatible
- reg
- vdd-supply
additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/irq.h>
i2c {
#address-cells = <1>;
#size-cells = <0>;
light-sensor@53 {
compatible = "brcm,apds9160";
reg = <0x53>;
vdd-supply = <&vdd_reg>;
interrupts = <29 IRQ_TYPE_EDGE_FALLING>;
interrupt-parent = <&pinctrl>;
ps-cancellation-duration = <10>;
ps-cancellation-current-picoamp = <62400>;
};
};
...

View File

@ -4,14 +4,16 @@
$id: http://devicetree.org/schemas/iio/light/dynaimage,al3010.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Dyna-Image AL3010 sensor
title: Dyna-Image AL3000a/AL3010 sensor
maintainers:
- David Heidelberg <david@ixit.cz>
properties:
compatible:
const: dynaimage,al3010
enum:
- dynaimage,al3000a
- dynaimage,al3010
reg:
maxItems: 1

View File

@ -0,0 +1,48 @@
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/magnetometer/silabs,si7210.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Si7210 magnetic position and temperature sensor
maintainers:
- Antoni Pokusinski <apokusinski01@gmail.com>
description: |
Silabs Si7210 I2C Hall effect magnetic position and temperature sensor.
https://www.silabs.com/documents/public/data-sheets/si7210-datasheet.pdf
properties:
compatible:
const: silabs,si7210
reg:
maxItems: 1
interrupts:
maxItems: 1
vdd-supply:
description: Regulator that provides power to the sensor
required:
- compatible
- reg
additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/irq.h>
i2c {
#address-cells = <1>;
#size-cells = <0>;
magnetometer@30 {
compatible = "silabs,si7210";
reg = <0x30>;
interrupt-parent = <&gpio1>;
interrupts = <4 IRQ_TYPE_EDGE_FALLING>;
vdd-supply = <&vdd_3v3_reg>;
};
};

View File

@ -40,15 +40,15 @@ unevaluatedProperties: false
examples:
- |
spi {
#address-cells = <1>;
#size-cells = <0>;
#address-cells = <1>;
#size-cells = <0>;
temperature-sensor@0 {
compatible = "maxim,max31865";
reg = <0>;
spi-max-frequency = <400000>;
spi-cpha;
maxim,3-wire;
};
temperature-sensor@0 {
compatible = "maxim,max31865";
reg = <0>;
spi-max-frequency = <400000>;
spi-cpha;
maxim,3-wire;
};
};
...

View File

@ -44,8 +44,8 @@ examples:
#size-cells = <0>;
tmp117@48 {
compatible = "ti,tmp117";
reg = <0x48>;
vcc-supply = <&pmic_reg_3v3>;
compatible = "ti,tmp117";
reg = <0x48>;
vcc-supply = <&pmic_reg_3v3>;
};
};

View File

@ -1,49 +0,0 @@
* GPIO driven matrix keypad device tree bindings
GPIO driven matrix keypad is used to interface a SoC with a matrix keypad.
The matrix keypad supports multiple row and column lines, a key can be
placed at each intersection of a unique row and a unique column. The matrix
keypad can sense a key-press and key-release by means of GPIO lines and
report the event using GPIO interrupts to the cpu.
Required Properties:
- compatible: Should be "gpio-matrix-keypad"
- row-gpios: List of gpios used as row lines. The gpio specifier
for this property depends on the gpio controller to
which these row lines are connected.
- col-gpios: List of gpios used as column lines. The gpio specifier
for this property depends on the gpio controller to
which these column lines are connected.
- linux,keymap: The definition can be found at
bindings/input/matrix-keymap.txt
Optional Properties:
- linux,no-autorepeat: do no enable autorepeat feature.
- wakeup-source: use any event on keypad as wakeup event.
(Legacy property supported: "linux,wakeup")
- debounce-delay-ms: debounce interval in milliseconds
- col-scan-delay-us: delay, measured in microseconds, that is needed
before we can scan keypad after activating column gpio
- drive-inactive-cols: drive inactive columns during scan,
default is to turn inactive columns into inputs.
Example:
matrix-keypad {
compatible = "gpio-matrix-keypad";
debounce-delay-ms = <5>;
col-scan-delay-us = <2>;
row-gpios = <&gpio2 25 0
&gpio2 26 0
&gpio2 27 0>;
col-gpios = <&gpio2 21 0
&gpio2 22 0>;
linux,keymap = <0x0000008B
0x0100009E
0x02000069
0x0001006A
0x0101001C
0x0201006C>;
};

View File

@ -0,0 +1,103 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/input/gpio-matrix-keypad.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: GPIO matrix keypad
maintainers:
- Marek Vasut <marek.vasut@gmail.com>
description:
GPIO driven matrix keypad is used to interface a SoC with a matrix keypad.
The matrix keypad supports multiple row and column lines, a key can be
placed at each intersection of a unique row and a unique column. The matrix
keypad can sense a key-press and key-release by means of GPIO lines and
report the event using GPIO interrupts to the cpu.
allOf:
- $ref: /schemas/input/matrix-keymap.yaml#
properties:
compatible:
const: gpio-matrix-keypad
row-gpios:
description:
List of GPIOs used as row lines. The gpio specifier for this property
depends on the gpio controller to which these row lines are connected.
col-gpios:
description:
List of GPIOs used as column lines. The gpio specifier for this property
depends on the gpio controller to which these column lines are connected.
linux,keymap: true
linux,no-autorepeat:
type: boolean
description: Do not enable autorepeat feature.
gpio-activelow:
type: boolean
description:
Force GPIO polarity to active low.
In the absence of this property GPIOs are treated as active high.
debounce-delay-ms:
description: Debounce interval in milliseconds.
default: 0
col-scan-delay-us:
description:
Delay, measured in microseconds, that is needed
before we can scan keypad after activating column gpio.
default: 0
all-cols-on-delay-us:
description:
Delay, measured in microseconds, that is needed
after activating all column gpios.
default: 0
drive-inactive-cols:
type: boolean
description:
Drive inactive columns during scan,
default is to turn inactive columns into inputs.
wakeup-source: true
required:
- compatible
- row-gpios
- col-gpios
- linux,keymap
additionalProperties: false
examples:
- |
matrix-keypad {
compatible = "gpio-matrix-keypad";
debounce-delay-ms = <5>;
col-scan-delay-us = <2>;
row-gpios = <&gpio2 25 0
&gpio2 26 0
&gpio2 27 0>;
col-gpios = <&gpio2 21 0
&gpio2 22 0>;
linux,keymap = <0x0000008B
0x0100009E
0x02000069
0x0001006A
0x0101001C
0x0201006C>;
wakeup-source;
};

View File

@ -62,28 +62,28 @@ unevaluatedProperties: false
examples:
- |
#include <dt-bindings/input/input.h>
#include <dt-bindings/interrupt-controller/irq.h>
pmic {
#address-cells = <1>;
#size-cells = <0>;
#include <dt-bindings/input/input.h>
#include <dt-bindings/interrupt-controller/irq.h>
pmic {
#address-cells = <1>;
#size-cells = <0>;
keypad@148 {
compatible = "qcom,pm8921-keypad";
reg = <0x148>;
interrupt-parent = <&pmicintc>;
interrupts = <74 IRQ_TYPE_EDGE_RISING>, <75 IRQ_TYPE_EDGE_RISING>;
linux,keymap = <
MATRIX_KEY(0, 0, KEY_VOLUMEUP)
MATRIX_KEY(0, 1, KEY_VOLUMEDOWN)
MATRIX_KEY(0, 2, KEY_CAMERA_FOCUS)
MATRIX_KEY(0, 3, KEY_CAMERA)
>;
keypad,num-rows = <1>;
keypad,num-columns = <5>;
debounce = <15>;
scan-delay = <32>;
row-hold = <91500>;
};
};
keypad@148 {
compatible = "qcom,pm8921-keypad";
reg = <0x148>;
interrupt-parent = <&pmicintc>;
interrupts = <74 IRQ_TYPE_EDGE_RISING>, <75 IRQ_TYPE_EDGE_RISING>;
linux,keymap = <
MATRIX_KEY(0, 0, KEY_VOLUMEUP)
MATRIX_KEY(0, 1, KEY_VOLUMEDOWN)
MATRIX_KEY(0, 2, KEY_CAMERA_FOCUS)
MATRIX_KEY(0, 3, KEY_CAMERA)
>;
keypad,num-rows = <1>;
keypad,num-columns = <5>;
debounce = <15>;
scan-delay = <32>;
row-hold = <91500>;
};
};
...

View File

@ -52,24 +52,24 @@ unevaluatedProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/irq.h>
ssbi {
#address-cells = <1>;
#size-cells = <0>;
#include <dt-bindings/interrupt-controller/irq.h>
ssbi {
#address-cells = <1>;
#size-cells = <0>;
pmic@0 {
reg = <0x0>;
#address-cells = <1>;
#size-cells = <0>;
pmic@0 {
reg = <0x0>;
#address-cells = <1>;
#size-cells = <0>;
pwrkey@1c {
compatible = "qcom,pm8921-pwrkey";
reg = <0x1c>;
interrupt-parent = <&pmicint>;
interrupts = <50 IRQ_TYPE_EDGE_RISING>, <51 IRQ_TYPE_EDGE_RISING>;
debounce = <15625>;
pull-up;
};
};
};
pwrkey@1c {
compatible = "qcom,pm8921-pwrkey";
reg = <0x1c>;
interrupt-parent = <&pmicint>;
interrupts = <50 IRQ_TYPE_EDGE_RISING>, <51 IRQ_TYPE_EDGE_RISING>;
debounce = <15625>;
pull-up;
};
};
};
...

View File

@ -0,0 +1,70 @@
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/input/touchscreen/apple,z2-multitouch.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Apple touchscreens attached using the Z2 protocol
maintainers:
- Sasha Finkelstein <fnkl.kernel@gmail.com>
description: A series of touschscreen controllers used in Apple products
allOf:
- $ref: touchscreen.yaml#
- $ref: /schemas/spi/spi-peripheral-props.yaml#
properties:
compatible:
enum:
- apple,j293-touchbar
- apple,j493-touchbar
interrupts:
maxItems: 1
reset-gpios:
maxItems: 1
firmware-name:
maxItems: 1
apple,z2-cal-blob:
$ref: /schemas/types.yaml#/definitions/uint8-array
maxItems: 4096
description:
Calibration blob supplied by the bootloader
required:
- compatible
- interrupts
- reset-gpios
- firmware-name
- touchscreen-size-x
- touchscreen-size-y
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
spi {
#address-cells = <1>;
#size-cells = <0>;
touchscreen@0 {
compatible = "apple,j293-touchbar";
reg = <0>;
spi-max-frequency = <11500000>;
reset-gpios = <&pinctrl_ap 139 GPIO_ACTIVE_LOW>;
interrupts-extended = <&pinctrl_ap 194 IRQ_TYPE_EDGE_FALLING>;
firmware-name = "apple/dfrmtfw-j293.bin";
touchscreen-size-x = <23045>;
touchscreen-size-y = <640>;
};
};
...

View File

@ -19,6 +19,7 @@ allOf:
properties:
compatible:
enum:
- goodix,gt9897
- goodix,gt9916
reg:

View File

@ -164,20 +164,20 @@ examples:
#size-cells = <0>;
touchscreen@0 {
compatible = "ti,tsc2046";
reg = <0>; /* CS0 */
interrupt-parent = <&gpio1>;
interrupts = <8 0>; /* BOOT6 / GPIO 8 */
pendown-gpio = <&gpio1 8 0>;
spi-max-frequency = <1000000>;
vcc-supply = <&reg_vcc3>;
wakeup-source;
compatible = "ti,tsc2046";
reg = <0>; /* CS0 */
interrupt-parent = <&gpio1>;
interrupts = <8 0>; /* BOOT6 / GPIO 8 */
pendown-gpio = <&gpio1 8 0>;
spi-max-frequency = <1000000>;
vcc-supply = <&reg_vcc3>;
wakeup-source;
ti,pressure-max = /bits/ 16 <255>;
ti,x-max = /bits/ 16 <8000>;
ti,x-min = /bits/ 16 <0>;
ti,x-plate-ohms = /bits/ 16 <40>;
ti,y-max = /bits/ 16 <4800>;
ti,y-min = /bits/ 16 <0>;
};
ti,pressure-max = /bits/ 16 <255>;
ti,x-max = /bits/ 16 <8000>;
ti,x-min = /bits/ 16 <0>;
ti,x-plate-ohms = /bits/ 16 <40>;
ti,y-max = /bits/ 16 <4800>;
ti,y-min = /bits/ 16 <0>;
};
};

View File

@ -1,5 +1,5 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
# # Copyright (c) 2021 Aspeed Tehchnology Inc.
# # Copyright (c) 2021 Aspeed Technology Inc.
%YAML 1.2
---
$id: http://devicetree.org/schemas/mfd/aspeed-lpc.yaml#

View File

@ -20,7 +20,9 @@ properties:
- allwinner,sun20i-d1-usb-phy
- allwinner,sun50i-a64-usb-phy
- items:
- const: allwinner,sun50i-a100-usb-phy
- enum:
- allwinner,sun50i-a100-usb-phy
- allwinner,sun55i-a523-usb-phy
- const: allwinner,sun20i-d1-usb-phy
reg:

View File

@ -12,6 +12,7 @@ maintainers:
properties:
compatible:
enum:
- rockchip,rk3562-naneng-combphy
- rockchip,rk3568-naneng-combphy
- rockchip,rk3576-naneng-combphy
- rockchip,rk3588-naneng-combphy

View File

@ -0,0 +1,76 @@
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/phy/qcom,ipq5332-uniphy-pcie-phy.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm UNIPHY PCIe 28LP PHY
maintainers:
- Nitheesh Sekar <quic_nsekar@quicinc.com>
- Varadarajan Narayanan <quic_varada@quicinc.com>
description:
PCIe and USB combo PHY found in Qualcomm IPQ5332 SoC
properties:
compatible:
enum:
- qcom,ipq5332-uniphy-pcie-phy
reg:
maxItems: 1
clocks:
items:
- description: pcie pipe clock
- description: pcie ahb clock
resets:
items:
- description: phy reset
- description: ahb reset
- description: cfg reset
"#phy-cells":
const: 0
"#clock-cells":
const: 0
num-lanes:
$ref: /schemas/types.yaml#/definitions/uint32
enum: [1, 2]
required:
- compatible
- reg
- clocks
- resets
- "#phy-cells"
- "#clock-cells"
- num-lanes
additionalProperties: false
examples:
- |
#include <dt-bindings/clock/qcom,ipq5332-gcc.h>
pcie0_phy: phy@4b0000 {
compatible = "qcom,ipq5332-uniphy-pcie-phy";
reg = <0x004b0000 0x800>;
clocks = <&gcc GCC_PCIE3X1_0_PIPE_CLK>,
<&gcc GCC_PCIE3X1_PHY_AHB_CLK>;
resets = <&gcc GCC_PCIE3X1_0_PHY_BCR>,
<&gcc GCC_PCIE3X1_PHY_AHB_CLK_ARES>,
<&gcc GCC_PCIE3X1_0_PHY_PHY_BCR>;
#clock-cells = <0>;
#phy-cells = <0>;
num-lanes = <1>;
};

View File

@ -17,6 +17,7 @@ properties:
compatible:
enum:
- qcom,qcs615-qmp-gen3x1-pcie-phy
- qcom,qcs8300-qmp-gen4x2-pcie-phy
- qcom,sa8775p-qmp-gen4x2-pcie-phy
- qcom,sa8775p-qmp-gen4x4-pcie-phy
- qcom,sar2130p-qmp-gen3x2-pcie-phy
@ -45,6 +46,7 @@ properties:
- qcom,x1e80100-qmp-gen4x2-pcie-phy
- qcom,x1e80100-qmp-gen4x4-pcie-phy
- qcom,x1e80100-qmp-gen4x8-pcie-phy
- qcom,x1p42100-qmp-gen4x4-pcie-phy
reg:
minItems: 1
@ -124,6 +126,7 @@ allOf:
enum:
- qcom,sc8280xp-qmp-gen3x4-pcie-phy
- qcom,x1e80100-qmp-gen4x4-pcie-phy
- qcom,x1p42100-qmp-gen4x4-pcie-phy
then:
properties:
reg:
@ -180,6 +183,7 @@ allOf:
- qcom,x1e80100-qmp-gen4x2-pcie-phy
- qcom,x1e80100-qmp-gen4x4-pcie-phy
- qcom,x1e80100-qmp-gen4x8-pcie-phy
- qcom,x1p42100-qmp-gen4x4-pcie-phy
then:
properties:
clocks:
@ -192,6 +196,7 @@ allOf:
compatible:
contains:
enum:
- qcom,qcs8300-qmp-gen4x2-pcie-phy
- qcom,sa8775p-qmp-gen4x2-pcie-phy
- qcom,sa8775p-qmp-gen4x4-pcie-phy
then:
@ -217,12 +222,6 @@ allOf:
minItems: 2
reset-names:
minItems: 2
else:
properties:
resets:
maxItems: 1
reset-names:
maxItems: 1
- if:
properties:

View File

@ -44,6 +44,7 @@ properties:
- qcom,sm8475-qmp-ufs-phy
- qcom,sm8550-qmp-ufs-phy
- qcom,sm8650-qmp-ufs-phy
- qcom,sm8750-qmp-ufs-phy
reg:
maxItems: 1
@ -111,6 +112,7 @@ allOf:
- qcom,sm8475-qmp-ufs-phy
- qcom,sm8550-qmp-ufs-phy
- qcom,sm8650-qmp-ufs-phy
- qcom,sm8750-qmp-ufs-phy
then:
properties:
clocks:

View File

@ -11,8 +11,13 @@ maintainers:
properties:
compatible:
enum:
- rockchip,rk3588-hdptx-phy
oneOf:
- enum:
- rockchip,rk3588-hdptx-phy
- items:
- enum:
- rockchip,rk3576-hdptx-phy
- const: rockchip,rk3588-hdptx-phy
reg:
maxItems: 1
@ -34,24 +39,12 @@ properties:
const: 0
resets:
items:
- description: PHY reset line
- description: APB reset line
- description: INIT reset line
- description: CMN reset line
- description: LANE reset line
- description: ROPLL reset line
- description: LCPLL reset line
minItems: 4
maxItems: 7
reset-names:
items:
- const: phy
- const: apb
- const: init
- const: cmn
- const: lane
- const: ropll
- const: lcpll
minItems: 4
maxItems: 7
rockchip,grf:
$ref: /schemas/types.yaml#/definitions/phandle
@ -67,6 +60,39 @@ required:
- reset-names
- rockchip,grf
allOf:
- if:
properties:
compatible:
contains:
enum:
- rockchip,rk3576-hdptx-phy
then:
properties:
resets:
minItems: 4
maxItems: 4
reset-names:
items:
- const: apb
- const: init
- const: cmn
- const: lane
else:
properties:
resets:
minItems: 7
maxItems: 7
reset-names:
items:
- const: phy
- const: apb
- const: init
- const: cmn
- const: lane
- const: ropll
- const: lcpll
additionalProperties: false
examples:

View File

@ -0,0 +1,87 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/phy/rockchip,rk3588-mipi-dcphy.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Rockchip MIPI D-/C-PHY with Samsung IP block
maintainers:
- Guochun Huang <hero.huang@rock-chips.com>
- Heiko Stuebner <heiko@sntech.de>
properties:
compatible:
enum:
- rockchip,rk3576-mipi-dcphy
- rockchip,rk3588-mipi-dcphy
reg:
maxItems: 1
"#phy-cells":
const: 1
description: |
Argument is mode to operate in. Supported modes are:
- PHY_TYPE_DPHY
- PHY_TYPE_CPHY
See include/dt-bindings/phy/phy.h for constants.
clocks:
maxItems: 2
clock-names:
items:
- const: pclk
- const: ref
resets:
maxItems: 4
reset-names:
items:
- const: m_phy
- const: apb
- const: grf
- const: s_phy
rockchip,grf:
$ref: /schemas/types.yaml#/definitions/phandle
description:
Phandle to the syscon managing the 'mipi dcphy general register files'.
required:
- compatible
- reg
- clocks
- clock-names
- resets
- reset-names
- "#phy-cells"
additionalProperties: false
examples:
- |
#include <dt-bindings/clock/rockchip,rk3588-cru.h>
#include <dt-bindings/reset/rockchip,rk3588-cru.h>
soc {
#address-cells = <2>;
#size-cells = <2>;
phy@feda0000 {
compatible = "rockchip,rk3588-mipi-dcphy";
reg = <0x0 0xfeda0000 0x0 0x10000>;
clocks = <&cru PCLK_MIPI_DCPHY0>,
<&cru CLK_USBDPPHY_MIPIDCPPHY_REF>;
clock-names = "pclk", "ref";
resets = <&cru SRST_M_MIPI_DCPHY0>,
<&cru SRST_P_MIPI_DCPHY0>,
<&cru SRST_P_MIPI_DCPHY0_GRF>,
<&cru SRST_S_MIPI_DCPHY0>;
reset-names = "m_phy", "apb", "grf", "s_phy";
rockchip,grf = <&mipidcphy0_grf>;
#phy-cells = <1>;
};
};

View File

@ -18,6 +18,7 @@ properties:
- google,gs101-ufs-phy
- samsung,exynos7-ufs-phy
- samsung,exynosautov9-ufs-phy
- samsung,exynosautov920-ufs-phy
- tesla,fsd-ufs-phy
reg:

View File

@ -83,14 +83,19 @@ properties:
pll-supply:
description: Power supply for the USB PLL.
dvdd-usb20-supply:
description: DVDD power supply for the USB 2.0 phy.
vddh-usb20-supply:
description: VDDh power supply for the USB 2.0 phy.
vdd33-usb20-supply:
description: 3.3V power supply for the USB 2.0 phy.
vdda-usbdp-supply:
description: VDDa power supply for the USB DP phy.
vddh-usbdp-supply:
description: VDDh power supply for the USB DP phy.
@ -109,6 +114,8 @@ allOf:
contains:
const: google,gs101-usb31drd-phy
then:
$ref: /schemas/usb/usb-switch.yaml#
properties:
clocks:
items:
@ -117,6 +124,7 @@ allOf:
- description: Gate of control interface AXI clock
- description: Gate of control interface APB clock
- description: Gate of SCL APB clock
clock-names:
items:
- const: phy
@ -124,12 +132,17 @@ allOf:
- const: ctrl_aclk
- const: ctrl_pclk
- const: scl_pclk
reg:
minItems: 3
reg-names:
minItems: 3
required:
- reg-names
- orientation-switch
- port
- pll-supply
- dvdd-usb20-supply
- vddh-usb20-supply
@ -149,6 +162,7 @@ allOf:
clocks:
minItems: 5
maxItems: 5
clock-names:
items:
- const: phy
@ -156,8 +170,10 @@ allOf:
- const: phy_utmi
- const: phy_pipe
- const: itp
reg:
maxItems: 1
reg-names:
maxItems: 1
@ -174,16 +190,19 @@ allOf:
clocks:
minItems: 2
maxItems: 2
clock-names:
items:
- const: phy
- const: ref
reg:
maxItems: 1
reg-names:
maxItems: 1
additionalProperties: false
unevaluatedProperties: false
examples:
- |

View File

@ -23,7 +23,7 @@ List of legacy properties and respective binding document
1. "gpio-key,wakeup" Documentation/devicetree/bindings/input/gpio-keys{,-polled}.txt
2. "has-tpo" Documentation/devicetree/bindings/rtc/rtc-opal.txt
3. "linux,wakeup" Documentation/devicetree/bindings/input/gpio-matrix-keypad.txt
3. "linux,wakeup" Documentation/devicetree/bindings/input/gpio-matrix-keypad.yaml
Documentation/devicetree/bindings/mfd/tc3589x.txt
Documentation/devicetree/bindings/input/touchscreen/ti,ads7843.yaml
4. "linux,keypad-wakeup" Documentation/devicetree/bindings/input/qcom,pm8921-keypad.yaml

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