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arm64: dts: meson-axg: add PWRC node
This adds the power controller PWRC node and the corresponding ethernet power domain. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com> Link: https://lore.kernel.org/r/20201120152131.3918814-2-narmstrong@baylibre.com
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@ -12,6 +12,7 @@
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/reset/amlogic,meson-axg-audio-arb.h>
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#include <dt-bindings/reset/amlogic,meson-axg-reset.h>
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#include <dt-bindings/power/meson-axg-power.h>
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/ {
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compatible = "amlogic,meson-axg";
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@ -229,6 +230,7 @@ ethmac: ethernet@ff3f0000 {
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tx-fifo-depth = <2048>;
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resets = <&reset RESET_ETHERNET>;
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reset-names = "stmmaceth";
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power-domains = <&pwrc PWRC_AXG_ETHERNET_MEM_ID>;
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status = "disabled";
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};
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@ -1159,6 +1161,46 @@ clkc: clock-controller {
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clocks = <&xtal>;
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clock-names = "xtal";
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};
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pwrc: power-controller {
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compatible = "amlogic,meson-axg-pwrc";
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#power-domain-cells = <1>;
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amlogic,ao-sysctrl = <&sysctrl_AO>;
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resets = <&reset RESET_VIU>,
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<&reset RESET_VENC>,
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<&reset RESET_VCBUS>,
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<&reset RESET_VENCL>,
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<&reset RESET_VID_LOCK>;
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reset-names = "viu", "venc", "vcbus",
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"vencl", "vid_lock";
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clocks = <&clkc CLKID_VPU>,
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<&clkc CLKID_VAPB>;
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clock-names = "vpu", "vapb";
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/*
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* VPU clocking is provided by two identical clock paths
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* VPU_0 and VPU_1 muxed to a single clock by a glitch
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* free mux to safely change frequency while running.
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* Same for VAPB but with a final gate after the glitch free mux.
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*/
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assigned-clocks = <&clkc CLKID_VPU_0_SEL>,
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<&clkc CLKID_VPU_0>,
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<&clkc CLKID_VPU>, /* Glitch free mux */
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<&clkc CLKID_VAPB_0_SEL>,
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<&clkc CLKID_VAPB_0>,
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<&clkc CLKID_VAPB_SEL>; /* Glitch free mux */
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assigned-clock-parents = <&clkc CLKID_FCLK_DIV4>,
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<0>, /* Do Nothing */
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<&clkc CLKID_VPU_0>,
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<&clkc CLKID_FCLK_DIV4>,
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<0>, /* Do Nothing */
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<&clkc CLKID_VAPB_0>;
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assigned-clock-rates = <0>, /* Do Nothing */
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<250000000>,
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<0>, /* Do Nothing */
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<0>, /* Do Nothing */
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<250000000>,
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<0>; /* Do Nothing */
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};
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};
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};
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