From 95696d292e204073433ed2ef3ff4d3d8f42a8248 Mon Sep 17 00:00:00 2001 From: Marc Zyngier Date: Sat, 1 Jul 2017 15:16:34 +0100 Subject: [PATCH 01/11] ARM64: dts: marvell: armada-37xx: Fix GIC maintenance interrupt The GIC-500 integrated in the Armada-37xx SoCs is compliant with the GICv3 architecture, and thus provides a maintenance interrupt that is required for hypervisors to function correctly. With the interrupt provided in the DT, KVM now works as it should. Tested on an Espressobin system. Fixes: adbc3695d9e4 ("arm64: dts: add the Marvell Armada 3700 family and a development board") Cc: Signed-off-by: Marc Zyngier Signed-off-by: Gregory CLEMENT --- arch/arm64/boot/dts/marvell/armada-37xx.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi index 51763d674050..a92ac63addf0 100644 --- a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi +++ b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi @@ -323,6 +323,7 @@ gic: interrupt-controller@1d00000 { interrupt-controller; reg = <0x1d00000 0x10000>, /* GICD */ <0x1d40000 0x40000>; /* GICR */ + interrupts = ; }; }; From 5f926e889fcdb4aab32caf7ebe1c42dd7c2a4e64 Mon Sep 17 00:00:00 2001 From: Marc Zyngier Date: Sat, 1 Jul 2017 15:16:35 +0100 Subject: [PATCH 02/11] ARM64: dts: marvell: armada-37xx: Enable memory-mapped GIC CPU interface The Cortex-A53s that power the Armada-37xx SoCs are equipped with a GIC CPU interface that gets enabled when coupled with a GICv3 interrupt controller, such as the GIC-500 on the this SoC. Advertise the MMIO ranges provided by the CPUs, which enables (among other things) GICv2 guests to run under a hypervisor such as KVM. Signed-off-by: Marc Zyngier Signed-off-by: Gregory CLEMENT --- arch/arm64/boot/dts/marvell/armada-37xx.dtsi | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi index a92ac63addf0..b6f1e7a5e5ec 100644 --- a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi +++ b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi @@ -322,7 +322,10 @@ gic: interrupt-controller@1d00000 { #interrupt-cells = <3>; interrupt-controller; reg = <0x1d00000 0x10000>, /* GICD */ - <0x1d40000 0x40000>; /* GICR */ + <0x1d40000 0x40000>, /* GICR */ + <0x1d80000 0x2000>, /* GICC */ + <0x1d90000 0x2000>, /* GICH */ + <0x1da0000 0x20000>; /* GICV */ interrupts = ; }; }; From 395e66ba07aaec5ce37b61da158816d96d4b3ce1 Mon Sep 17 00:00:00 2001 From: Marc Zyngier Date: Sat, 1 Jul 2017 15:16:36 +0100 Subject: [PATCH 03/11] ARM64: dts: marvell: armada-37xx: Wire PMUv3 The Cortex-A53s that power the Armada-37xx SoCs are equipped with a PMUv3, just like most ARMv8 cores. Advertise the PMUv3 presence in the device tree, and wire its interrupt. This allows the perf subsystem to work correctly. Signed-off-by: Marc Zyngier Signed-off-by: Gregory CLEMENT --- arch/arm64/boot/dts/marvell/armada-37xx.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi index b6f1e7a5e5ec..8c0cf7efac65 100644 --- a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi +++ b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi @@ -81,6 +81,11 @@ timer { ; }; + pmu { + compatible = "arm,armv8-pmuv3"; + interrupts = ; + }; + soc { compatible = "simple-bus"; #address-cells = <2>; From 48907d0ccbbdd440158fbd205fe1bd66f1a6a97b Mon Sep 17 00:00:00 2001 From: Marc Zyngier Date: Sat, 1 Jul 2017 15:16:37 +0100 Subject: [PATCH 04/11] ARM64: dts: marvell: armada-37xx: Enable USB2 on espressobin The Espressobin SBC has a USB2 interface available on J8. Let's enable it. Signed-off-by: Marc Zyngier Signed-off-by: Gregory CLEMENT --- arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts b/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts index e3a136ed77b0..b1af3f988b29 100644 --- a/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts +++ b/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts @@ -81,6 +81,11 @@ &usb3 { status = "okay"; }; +/* J8 */ +&usb2 { + status = "okay"; +}; + &mdio { switch0: switch0@1 { compatible = "marvell,mv88e6085"; From 2188b396d522ecf71c8ed4d1dc7867112e62039a Mon Sep 17 00:00:00 2001 From: Russell King Date: Sat, 8 Jul 2017 20:16:34 +0100 Subject: [PATCH 05/11] arm64: dts: marvell: cp110: add GPIO interrupts Add the GPIO interrupts for the CP110. Signed-off-by: Russell King Signed-off-by: Gregory CLEMENT --- arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi | 11 ++++++++++- arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi | 11 ++++++++++- 2 files changed, 20 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi b/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi index 4c68605675a8..3cd48552d69f 100644 --- a/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi +++ b/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi @@ -131,8 +131,12 @@ cpm_gpio1: gpio@100 { gpio-controller; #gpio-cells = <2>; gpio-ranges = <&cpm_pinctrl 0 0 32>; + interrupt-controller; + interrupts = , + , + , + ; status = "disabled"; - }; cpm_gpio2: gpio@140 { @@ -142,6 +146,11 @@ cpm_gpio2: gpio@140 { gpio-controller; #gpio-cells = <2>; gpio-ranges = <&cpm_pinctrl 0 32 31>; + interrupt-controller; + interrupts = , + , + , + ; status = "disabled"; }; }; diff --git a/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi b/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi index 923f354b02f0..892b594a62b9 100644 --- a/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi +++ b/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi @@ -138,8 +138,12 @@ cps_gpio1: gpio@100 { gpio-controller; #gpio-cells = <2>; gpio-ranges = <&cps_pinctrl 0 0 32>; + interrupt-controller; + interrupts = , + , + , + ; status = "disabled"; - }; cps_gpio2: gpio@140 { @@ -149,6 +153,11 @@ cps_gpio2: gpio@140 { gpio-controller; #gpio-cells = <2>; gpio-ranges = <&cps_pinctrl 0 32 31>; + interrupt-controller; + interrupts = , + , + , + ; status = "disabled"; }; From 31ec18e02a63a4e80784246ea8ae019cfb2750cb Mon Sep 17 00:00:00 2001 From: Russell King Date: Sat, 8 Jul 2017 20:16:39 +0100 Subject: [PATCH 06/11] arm64: dts: marvell: mcbin: add pinctrl nodes Add pinctrl nodes to describe the CPM I2C0 and CPS SPI1 settings. Signed-off-by: Russell King Signed-off-by: Gregory CLEMENT --- .../boot/dts/marvell/armada-8040-mcbin.dts | 31 +++++++++++++++++++ 1 file changed, 31 insertions(+) diff --git a/arch/arm64/boot/dts/marvell/armada-8040-mcbin.dts b/arch/arm64/boot/dts/marvell/armada-8040-mcbin.dts index 4968e731de61..fe91433d6fcd 100644 --- a/arch/arm64/boot/dts/marvell/armada-8040-mcbin.dts +++ b/arch/arm64/boot/dts/marvell/armada-8040-mcbin.dts @@ -112,10 +112,14 @@ &ap_sdhci0 { &cpm_i2c0 { clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&cpm_i2c0_pins>; status = "okay"; }; &cpm_mdio { + pinctrl-names = "default"; + pinctrl-0 = <&cpm_ge_mdio_pins>; status = "okay"; ge_phy: ethernet-phy@0 { @@ -123,6 +127,22 @@ ge_phy: ethernet-phy@0 { }; }; +&cpm_pinctrl { + cpm_ge_mdio_pins: ge-mdio-pins { + marvell,pins = "mpp32", "mpp34"; + marvell,function = "ge"; + }; + cpm_i2c0_pins: i2c0-pins { + marvell,pins = "mpp37", "mpp38"; + marvell,function = "i2c0"; + }; + cpm_sdhci_pins: sdhci-pins { + marvell,pins = "mpp55", "mpp56", "mpp57", "mpp58", "mpp59", + "mpp60", "mpp61"; + marvell,function = "sdio"; + }; +}; + &cpm_sata0 { /* CPM Lane 0 - U29 */ status = "okay"; @@ -132,6 +152,8 @@ &cpm_sdhci0 { /* U6 */ broken-cd; bus-width = <4>; + pinctrl-names = "default"; + pinctrl-0 = <&cpm_sdhci_pins>; status = "okay"; vqmmc-supply = <&v_3_3>; }; @@ -157,6 +179,13 @@ &cps_eth1 { phy-mode = "sgmii"; }; +&cps_pinctrl { + cps_spi1_pins: spi1-pins { + marvell,pins = "mpp12", "mpp13", "mpp14", "mpp15", "mpp16"; + marvell,function = "spi1"; + }; +}; + &cps_sata0 { /* CPS Lane 1 - U32 */ /* CPS Lane 3 - U31 */ @@ -164,6 +193,8 @@ &cps_sata0 { }; &cps_spi1 { + pinctrl-names = "default"; + pinctrl-0 = <&cps_spi1_pins>; status = "okay"; spi-flash@0 { From 45df70cbd1493b2c57c3397d625050331d1e4daf Mon Sep 17 00:00:00 2001 From: Russell King Date: Wed, 12 Jul 2017 14:56:55 +0200 Subject: [PATCH 07/11] arm64: dts: marvell: fix USB3 regulator definition on MacchiatoBin Due to the lack of GPIO support, the USB3 regulator definition was left unfinished in the MacchiatoBin DT description. Now that GPIO support is available, this commit adjusts the Device Tree to properly describe the USB3 regulator. [gregory.clement@free-electrons.com: use commit log from Thomas] Signed-off-by: Russell King Signed-off-by: Thomas Petazzoni Signed-off-by: Gregory CLEMENT --- arch/arm64/boot/dts/marvell/armada-8040-mcbin.dts | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/marvell/armada-8040-mcbin.dts b/arch/arm64/boot/dts/marvell/armada-8040-mcbin.dts index fe91433d6fcd..da13ab2103aa 100644 --- a/arch/arm64/boot/dts/marvell/armada-8040-mcbin.dts +++ b/arch/arm64/boot/dts/marvell/armada-8040-mcbin.dts @@ -46,6 +46,8 @@ #include "armada-8040.dtsi" +#include + / { model = "Marvell 8040 MACHIATOBin"; compatible = "marvell,armada8040-mcbin", "marvell,armada8040", @@ -77,11 +79,13 @@ v_vddo_h: regulator-1-8v { v_5v0_usb3_hst_vbus: regulator-usb3-vbus0 { compatible = "regulator-fixed"; + enable-active-high; + gpio = <&cpm_gpio2 15 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&cpm_xhci_vbus_pins>; regulator-name = "v_5v0_usb3_hst_vbus"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; - /* actually GPIO controlled, but 8k has no GPIO support yet */ - regulator-always-on; status = "okay"; }; @@ -136,6 +140,10 @@ cpm_i2c0_pins: i2c0-pins { marvell,pins = "mpp37", "mpp38"; marvell,function = "i2c0"; }; + cpm_xhci_vbus_pins: xhci0-vbus-pins { + marvell,pins = "mpp47"; + marvell,function = "gpio"; + }; cpm_sdhci_pins: sdhci-pins { marvell,pins = "mpp55", "mpp56", "mpp57", "mpp58", "mpp59", "mpp60", "mpp61"; From 8a91e1580b98f046a0a792fb20f43dda53955535 Mon Sep 17 00:00:00 2001 From: Russell King Date: Sat, 8 Jul 2017 20:16:50 +0100 Subject: [PATCH 08/11] arm64: dts: marvell: mcbin: add support for i2c mux The MACCHIATOBin board has a PCA9548 I2C mux for the SFP ports on CP100 master I2C bus 1. Add the DT description for it. Signed-off-by: Russell King Signed-off-by: Gregory CLEMENT --- .../boot/dts/marvell/armada-8040-mcbin.dts | 34 +++++++++++++++++++ 1 file changed, 34 insertions(+) diff --git a/arch/arm64/boot/dts/marvell/armada-8040-mcbin.dts b/arch/arm64/boot/dts/marvell/armada-8040-mcbin.dts index da13ab2103aa..77f62e2ebfa4 100644 --- a/arch/arm64/boot/dts/marvell/armada-8040-mcbin.dts +++ b/arch/arm64/boot/dts/marvell/armada-8040-mcbin.dts @@ -121,6 +121,36 @@ &cpm_i2c0 { status = "okay"; }; +&cpm_i2c1 { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&cpm_i2c1_pins>; + status = "okay"; + + i2c-switch@70 { + compatible = "nxp,pca9548"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x70>; + + sfpp0_i2c: i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + }; + sfpp1_i2c: i2c@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + }; + sfp_1g_i2c: i2c@2 { + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + }; + }; +}; + &cpm_mdio { pinctrl-names = "default"; pinctrl-0 = <&cpm_ge_mdio_pins>; @@ -136,6 +166,10 @@ cpm_ge_mdio_pins: ge-mdio-pins { marvell,pins = "mpp32", "mpp34"; marvell,function = "ge"; }; + cpm_i2c1_pins: i2c1-pins { + marvell,pins = "mpp35", "mpp36"; + marvell,function = "i2c1"; + }; cpm_i2c0_pins: i2c0-pins { marvell,pins = "mpp37", "mpp38"; marvell,function = "i2c0"; From b83e1669adce62e3ed4aae344c0a5d8b4b6520aa Mon Sep 17 00:00:00 2001 From: Russell King Date: Sat, 8 Jul 2017 20:16:55 +0100 Subject: [PATCH 09/11] arm64: dts: marvell: mcbin: add support for PCIe Add support for PCIe with the the PCIe reset signal wired up to the appropriate GPIO pin. Signed-off-by: Russell King Tested-by: Gregory CLEMENT (excepted the reset part) Signed-off-by: Gregory CLEMENT --- arch/arm64/boot/dts/marvell/armada-8040-mcbin.dts | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/arm64/boot/dts/marvell/armada-8040-mcbin.dts b/arch/arm64/boot/dts/marvell/armada-8040-mcbin.dts index 77f62e2ebfa4..b9fe9d3c085f 100644 --- a/arch/arm64/boot/dts/marvell/armada-8040-mcbin.dts +++ b/arch/arm64/boot/dts/marvell/armada-8040-mcbin.dts @@ -161,6 +161,15 @@ ge_phy: ethernet-phy@0 { }; }; +&cpm_pcie0 { + pinctrl-names = "default"; + pinctrl-0 = <&cpm_pcie_pins>; + num-lanes = <4>; + num-viewport = <8>; + reset-gpio = <&cpm_gpio1 20 GPIO_ACTIVE_LOW>; + status = "okay"; +}; + &cpm_pinctrl { cpm_ge_mdio_pins: ge-mdio-pins { marvell,pins = "mpp32", "mpp34"; @@ -178,6 +187,10 @@ cpm_xhci_vbus_pins: xhci0-vbus-pins { marvell,pins = "mpp47"; marvell,function = "gpio"; }; + cpm_pcie_pins: pcie-pins { + marvell,pins = "mpp52"; + marvell,function = "gpio"; + }; cpm_sdhci_pins: sdhci-pins { marvell,pins = "mpp55", "mpp56", "mpp57", "mpp58", "mpp59", "mpp60", "mpp61"; From f8c19a881352a646561c64f6b298ef8b7b868c6a Mon Sep 17 00:00:00 2001 From: Antoine Tenart Date: Mon, 17 Jul 2017 09:30:22 +0200 Subject: [PATCH 10/11] arm64: dts: marvell: mcbin: add an stdout-path This patch adds an stdout-path to the mcbin device tree. This allows to use earlycon. Signed-off-by: Antoine Tenart Signed-off-by: Gregory CLEMENT --- arch/arm64/boot/dts/marvell/armada-8040-mcbin.dts | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm64/boot/dts/marvell/armada-8040-mcbin.dts b/arch/arm64/boot/dts/marvell/armada-8040-mcbin.dts index b9fe9d3c085f..21fb721be6cb 100644 --- a/arch/arm64/boot/dts/marvell/armada-8040-mcbin.dts +++ b/arch/arm64/boot/dts/marvell/armada-8040-mcbin.dts @@ -53,6 +53,10 @@ / { compatible = "marvell,armada8040-mcbin", "marvell,armada8040", "marvell,armada-ap806-quad", "marvell,armada-ap806"; + chosen { + stdout-path = "serial0:115200n8"; + }; + memory@00000000 { device_type = "memory"; reg = <0x0 0x0 0x0 0x80000000>; From 249112cef2f323354be61a27be1d6e94507f7587 Mon Sep 17 00:00:00 2001 From: Thomas Petazzoni Date: Tue, 18 Jul 2017 15:10:33 +0200 Subject: [PATCH 11/11] arm64: dts: marvell: re-order RTC nodes in Marvell CP110 description In both the CP110 master and slave description, the node describing the RTC was at the wrong place when taking into account increasing register addresses. Interestingly, it was not even at the same (wrong) place in both files. This commit adjusts that, making the master and slave descriptions more aligned. Signed-off-by: Thomas Petazzoni Signed-off-by: Gregory CLEMENT --- .../boot/dts/marvell/armada-cp110-master.dtsi | 14 +++++++------- .../arm64/boot/dts/marvell/armada-cp110-slave.dtsi | 14 +++++++------- 2 files changed, 14 insertions(+), 14 deletions(-) diff --git a/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi b/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi index 3cd48552d69f..5e559ec88228 100644 --- a/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi +++ b/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi @@ -115,6 +115,13 @@ cpm_icu: interrupt-controller@1e0000 { msi-parent = <&gicp>; }; + cpm_rtc: rtc@284000 { + compatible = "marvell,armada-8k-rtc"; + reg = <0x284000 0x20>, <0x284080 0x24>; + reg-names = "rtc", "rtc-soc"; + interrupts = ; + }; + cpm_syscon0: system-controller@440000 { compatible = "syscon", "simple-mfd"; reg = <0x440000 0x1000>; @@ -155,13 +162,6 @@ cpm_gpio2: gpio@140 { }; }; - cpm_rtc: rtc@284000 { - compatible = "marvell,armada-8k-rtc"; - reg = <0x284000 0x20>, <0x284080 0x24>; - reg-names = "rtc", "rtc-soc"; - interrupts = ; - }; - cpm_sata0: sata@540000 { compatible = "marvell,armada-8k-ahci", "generic-ahci"; diff --git a/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi b/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi index 892b594a62b9..8bf99c24c9f5 100644 --- a/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi +++ b/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi @@ -60,13 +60,6 @@ config-space@f4000000 { compatible = "simple-bus"; ranges = <0x0 0x0 0xf4000000 0x2000000>; - cps_rtc: rtc@284000 { - compatible = "marvell,armada-8k-rtc"; - reg = <0x284000 0x20>, <0x284080 0x24>; - reg-names = "rtc", "rtc-soc"; - interrupts = ; - }; - cps_ethernet: ethernet@0 { compatible = "marvell,armada-7k-pp22"; reg = <0x0 0x100000>, <0x129000 0xb000>; @@ -122,6 +115,13 @@ cps_icu: interrupt-controller@1e0000 { msi-parent = <&gicp>; }; + cps_rtc: rtc@284000 { + compatible = "marvell,armada-8k-rtc"; + reg = <0x284000 0x20>, <0x284080 0x24>; + reg-names = "rtc", "rtc-soc"; + interrupts = ; + }; + cps_syscon0: system-controller@440000 { compatible = "syscon", "simple-mfd"; reg = <0x440000 0x1000>;