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ARM: nxp: lpc32xx: ARM changes for v7.3

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NXP LPC32xx ARM changes for v7.3 contain:
 
 - Karl Mehltretter fixes a multiplatform kernel runtime execution by
   limiting LPC32xx SoC specific init functions to be run on this
   platform only,
 - a stale method of populating DMA, SLC and MLC NAND controllers is
   removed from platform code, this change was announced to happen by
   the end of this year, all touched by the change controllers are
   properly described in the platform device tree for years, and very
   old board dtbs are recommended to be updated.
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Merge tag 'lpc32xx-arm-for-7.3' of https://github.com/vzapolskiy/linux-lpc32xx into soc/arm

ARM: nxp: lpc32xx: ARM changes for v7.3

NXP LPC32xx ARM changes for v7.3 contain:

- Karl Mehltretter fixes a multiplatform kernel runtime execution by
  limiting LPC32xx SoC specific init functions to be run on this
  platform only,
- a stale method of populating DMA, SLC and MLC NAND controllers is
  removed from platform code, this change was announced to happen by
  the end of this year, all touched by the change controllers are
  properly described in the platform device tree for years, and very
  old board dtbs are recommended to be updated.

* tag 'lpc32xx-arm-for-7.3' of https://github.com/vzapolskiy/linux-lpc32xx:
  ARM: lpc32xx: remove a few manually populated OF devices
  ARM: lpc32xx: only run SoC init on LPC32xx hardware

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2026-07-27 09:25:50 +02:00
commit 77d0531ac4
4 changed files with 6 additions and 68 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
arch/arm/mach-lpc32xx/common.c
View File

@ -106,7 +106,7 @@ void __init lpc32xx_map_io(void)
iotable_init(lpc32xx_io_desc, ARRAY_SIZE(lpc32xx_io_desc));
}
static int __init lpc32xx_check_uid(void)
void __init lpc32xx_check_uid(void)
{
u32 uid[4];
@ -119,7 +119,4 @@ static int __init lpc32xx_check_uid(void)
system_serial_low = uid[0];
system_serial_high = uid[1];
}
return 1;
}
arch_initcall(lpc32xx_check_uid);

2
arch/arm/mach-lpc32xx/common.h
View File

@ -16,6 +16,8 @@
* Other arch specific structures and functions
*/
extern void __init lpc32xx_map_io(void);
extern void __init lpc32xx_check_uid(void);
extern void __init lpc32xx_pm_init(void);
extern void __init lpc32xx_serial_init(void);
/*

62
arch/arm/mach-lpc32xx/phy3250.c
View File

@ -8,72 +8,14 @@
* Copyright (C) 2010 NXP Semiconductors
*/
#include <linux/amba/pl08x.h>
#include <linux/mtd/lpc32xx_mlc.h>
#include <linux/mtd/lpc32xx_slc.h>
#include <linux/of_platform.h>
#include <asm/mach/arch.h>
#include "common.h"
static struct pl08x_channel_data pl08x_slave_channels[] = {
{
.bus_id = "nand-slc",
.min_signal = 1, /* SLC NAND Flash */
.max_signal = 1,
.periph_buses = PL08X_AHB1,
},
{
.bus_id = "nand-mlc",
.min_signal = 12, /* MLC NAND Flash */
.max_signal = 12,
.periph_buses = PL08X_AHB1,
},
};
static int pl08x_get_signal(const struct pl08x_channel_data *cd)
{
return cd->min_signal;
}
static void pl08x_put_signal(const struct pl08x_channel_data *cd, int ch)
{
}
static struct pl08x_platform_data pl08x_pd = {
/* Some reasonable memcpy defaults */
.memcpy_burst_size = PL08X_BURST_SZ_256,
.memcpy_bus_width = PL08X_BUS_WIDTH_32_BITS,
.slave_channels = &pl08x_slave_channels[0],
.num_slave_channels = ARRAY_SIZE(pl08x_slave_channels),
.get_xfer_signal = pl08x_get_signal,
.put_xfer_signal = pl08x_put_signal,
.lli_buses = PL08X_AHB1,
.mem_buses = PL08X_AHB1,
};
static struct lpc32xx_slc_platform_data lpc32xx_slc_data = {
.dma_filter = pl08x_filter_id,
};
static struct lpc32xx_mlc_platform_data lpc32xx_mlc_data = {
.dma_filter = pl08x_filter_id,
};
static const struct of_dev_auxdata lpc32xx_auxdata_lookup[] __initconst = {
OF_DEV_AUXDATA("arm,pl080", 0x31000000, "pl08xdmac", &pl08x_pd),
OF_DEV_AUXDATA("nxp,lpc3220-slc", 0x20020000, "20020000.flash",
&lpc32xx_slc_data),
OF_DEV_AUXDATA("nxp,lpc3220-mlc", 0x200a8000, "200a8000.flash",
&lpc32xx_mlc_data),
{ }
};
static void __init lpc3250_machine_init(void)
{
lpc32xx_check_uid();
lpc32xx_pm_init();
lpc32xx_serial_init();
of_platform_default_populate(NULL, lpc32xx_auxdata_lookup, NULL);
}
static const char *const lpc32xx_dt_compat[] __initconst = {

5
arch/arm/mach-lpc32xx/pm.c
View File

@ -120,7 +120,7 @@ static const struct platform_suspend_ops lpc32xx_pm_ops = {
#define EMC_DYN_MEM_CTRL_OFS 0x20
#define EMC_SRMMC (1 << 3)
#define EMC_CTRL_REG io_p2v(LPC32XX_EMC_BASE + EMC_DYN_MEM_CTRL_OFS)
static int __init lpc32xx_pm_init(void)
void __init lpc32xx_pm_init(void)
{
/*
* Setup SDRAM self-refresh clock to automatically disable o
@ -129,7 +129,4 @@ static int __init lpc32xx_pm_init(void)
__raw_writel(__raw_readl(EMC_CTRL_REG) | EMC_SRMMC, EMC_CTRL_REG);
suspend_set_ops(&lpc32xx_pm_ops);
return 0;
}
arch_initcall(lpc32xx_pm_init);