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dt-bindings: pinctrl: tegra264: fix DAP2 DIN/DOUT pin names

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The DAP2_DIN and DAP2_DOUT pins were listed with swapped ball suffixes:
DAP2_DIN as PV7 and DAP2_DOUT as PW0. On silicon DAP2_DIN is on ball PW0
and DAP2_DOUT is on ball PV7. Correct the pin and drive group names to
dap2_din_pw0 and dap2_dout_pv7.

Fixes: 30a9d5162f ("dt-bindings: pinctrl: Document Tegra264 pin controllers")
Signed-off-by: Prathamesh Shete <pshete@nvidia.com>
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Linus Walleij <linusw@kernel.org>
This commit is contained in:
Prathamesh Shete 2026-07-27 14:11:20 +00:00 committed by Linus Walleij
parent aef612f013
commit 77abd038ea
1 changed files with 3 additions and 3 deletions
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6
Documentation/devicetree/bindings/pinctrl/nvidia,tegra264-pinmux-main.yaml
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@ -44,7 +44,7 @@ patternProperties:
soc_gpio173_pu3, soc_gpio174_pu4, soc_gpio175_pu5,
soc_gpio176_pu6, soc_gpio177_pu7, soc_gpio178_pv0,
pwm10_pv1, uart4_tx_pv2, uart4_rx_pv3, uart4_rts_n_pv4,
uart4_cts_n_pv5, dap2_clk_pv6, dap2_din_pv7, dap2_dout_pw0,
uart4_cts_n_pv5, dap2_clk_pv6, dap2_din_pw0, dap2_dout_pv7,
dap2_fs_pw1, gen1_i2c_scl_pw2, gen1_i2c_sda_pw3,
gen0_i2c_scl_pw4, gen0_i2c_sda_pw5, pwr_i2c_scl_pw6,
pwr_i2c_sda_pw7, soc_gpio138_pp0, soc_gpio139_pp1,
@ -111,8 +111,8 @@ patternProperties:
drive_soc_gpio351_ps1, drive_gen0_i2c_scl_pw4,
drive_gen0_i2c_sda_pw5, drive_gen1_i2c_scl_pw2,
drive_gen1_i2c_sda_pw3, drive_dap2_fs_pw1,
drive_dap2_clk_pv6, drive_dap2_din_pv7,
drive_dap2_dout_pw0, drive_pwm10_pv1,
drive_dap2_clk_pv6, drive_dap2_din_pw0,
drive_dap2_dout_pv7, drive_pwm10_pv1,
drive_soc_gpio170_pu0, drive_soc_gpio171_pu1,
drive_soc_gpio172_pu2, drive_soc_gpio173_pu3,
drive_soc_gpio174_pu4, drive_soc_gpio175_pu5,