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arm64: dts: imx8mm-var-dart: Add support for Variscite Sonata board
Add device tree support for the Variscite Sonata carrier board with the DART-MX8M-MINI system on module. The Sonata board includes - uSD Card support - USB ports and OTG - Uart, SPI and I2C interfaces - GPIO Expanders - RTC module - TPM module - CAN peripherals Link: https://variscite.com/carrier-boards/sonata-board/ Signed-off-by: Stefano Radaelli <stefano.r@variscite.com> Signed-off-by: Frank Li <Frank.Li@nxp.com>
This commit is contained in:
parent
5297deef08
commit
770aba46ea
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@ -166,6 +166,7 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mm-prt8mm.dtb
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dtb-$(CONFIG_ARCH_MXC) += imx8mm-tqma8mqml-mba8mx.dtb
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dtb-$(CONFIG_ARCH_MXC) += imx8mm-tx8m-1610-moduline-iv-306-d.dtb
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dtb-$(CONFIG_ARCH_MXC) += imx8mm-tx8m-1610-moduline-mini-111.dtb
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dtb-$(CONFIG_ARCH_MXC) += imx8mm-var-dart-sonata.dtb
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dtb-$(CONFIG_ARCH_MXC) += imx8mm-var-som-symphony.dtb
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dtb-$(CONFIG_ARCH_MXC) += imx8mm-var-som-symphony-legacy.dtb
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dtb-$(CONFIG_ARCH_MXC) += imx8mm-venice-gw71xx-0x.dtb
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516
arch/arm64/boot/dts/freescale/imx8mm-var-dart-sonata.dts
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516
arch/arm64/boot/dts/freescale/imx8mm-var-dart-sonata.dts
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@ -0,0 +1,516 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Variscite Sonata carrier board for DART-MX8M-MINI
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*
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* Link: https://variscite.com/carrier-boards/sonata-board/
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*
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* Copyright (C) 2026 Variscite Ltd. - https://www.variscite.com/
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*
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*/
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/dts-v1/;
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#include <dt-bindings/leds/common.h>
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#include <dt-bindings/phy/phy-imx8-pcie.h>
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#include "imx8mm-var-dart.dtsi"
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/ {
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model = "Variscite DART-MX8M-MINI on Sonata-Board";
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compatible = "variscite,var-dart-mx8mm-sonata",
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"variscite,var-dart-mx8mm",
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"fsl,imx8mm";
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chosen {
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stdout-path = &uart1;
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};
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gpio-keys {
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compatible = "gpio-keys";
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button-home {
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label = "Home";
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linux,code = <KEY_HOME>;
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gpios = <&pca6408_1 4 GPIO_ACTIVE_LOW>;
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wakeup-source;
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};
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button-up {
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label = "Up";
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linux,code = <KEY_UP>;
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gpios = <&pca6408_1 5 GPIO_ACTIVE_LOW>;
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wakeup-source;
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};
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button-down {
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label = "Down";
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linux,code = <KEY_DOWN>;
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gpios = <&pca6408_1 6 GPIO_ACTIVE_LOW>;
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wakeup-source;
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};
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button-back {
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label = "Back";
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linux,code = <KEY_BACK>;
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gpios = <&pca6408_1 7 GPIO_ACTIVE_LOW>;
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wakeup-source;
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};
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};
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gpio-leds {
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compatible = "gpio-leds";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_gpio_leds>;
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led-emmc {
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gpios = <&gpio4 18 GPIO_ACTIVE_HIGH>;
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label = "eMMC";
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linux,default-trigger = "mmc2";
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};
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};
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clk40m: oscillator {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <40000000>;
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clock-output-names = "can_osc";
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};
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pcie0_refclk: pcie0-refclk {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <100000000>;
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};
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reg_usdhc2_vmmc: regulator-vmmc-usdhc2 {
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compatible = "regulator-fixed";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_vmmc_usdhc2>;
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regulator-name = "VSD_3V3";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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startup-delay-us = <100>;
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off-on-delay-us = <12000>;
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};
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};
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&ecspi1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ecspi1>;
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cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>,
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<&gpio1 12 GPIO_ACTIVE_LOW>;
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status = "okay";
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/* Resistive touch controller */
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ads7846: touchscreen@0 {
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compatible = "ti,ads7846";
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reg = <0>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_restouch>;
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interrupt-parent = <&gpio1>;
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interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
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spi-max-frequency = <1500000>;
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pendown-gpio = <&gpio1 3 GPIO_ACTIVE_LOW>;
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ti,x-min = /bits/ 16 <125>;
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ti,x-max = /bits/ 16 <4008>;
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ti,y-min = /bits/ 16 <282>;
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ti,y-max = /bits/ 16 <3864>;
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ti,x-plate-ohms = /bits/ 16 <180>;
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ti,pressure-max = /bits/ 16 <255>;
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ti,debounce-max = /bits/ 16 <10>;
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ti,debounce-tol = /bits/ 16 <3>;
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ti,debounce-rep = /bits/ 16 <1>;
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ti,settle-delay-usec = /bits/ 16 <150>;
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ti,keep-vref-on;
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wakeup-source;
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};
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can0: can@1 {
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compatible = "microchip,mcp251xfd";
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reg = <1>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_can>;
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clocks = <&clk40m>;
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interrupt-parent = <&gpio1>;
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interrupts = <6 IRQ_TYPE_LEVEL_LOW>;
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microchip,rx-int-gpios = <&gpio5 4 GPIO_ACTIVE_LOW>;
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spi-max-frequency = <20000000>;
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};
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};
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ðphy0 {
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leds {
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#address-cells = <1>;
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#size-cells = <0>;
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led@0 {
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reg = <0>;
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color = <LED_COLOR_ID_YELLOW>;
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function = LED_FUNCTION_LAN;
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linux,default-trigger = "netdev";
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};
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led@1 {
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reg = <1>;
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color = <LED_COLOR_ID_GREEN>;
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function = LED_FUNCTION_LAN;
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linux,default-trigger = "netdev";
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};
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};
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};
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&i2c2 {
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clock-frequency = <100000>;
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pinctrl-names = "default", "gpio";
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pinctrl-0 = <&pinctrl_i2c2>;
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pinctrl-1 = <&pinctrl_i2c2_gpio>;
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scl-gpios = <&gpio5 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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sda-gpios = <&gpio5 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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status = "okay";
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pca9534: gpio@22 {
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compatible = "nxp,pca9534";
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reg = <0x22>;
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gpio-controller;
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#gpio-cells = <2>;
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/* RGB_SEL */
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lvds-brg-enable-hog {
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gpio-hog;
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gpios = <7 GPIO_ACTIVE_HIGH>;
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output-low;
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line-name = "rgb_sel";
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};
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};
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/* Capacitive touch controller */
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ft5x06_ts: touchscreen@38 {
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compatible = "edt,edt-ft5206";
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reg = <0x38>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_captouch>;
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reset-gpios = <&pca6408_2 4 GPIO_ACTIVE_LOW>;
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interrupt-parent = <&gpio1>;
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interrupts = <14 IRQ_TYPE_EDGE_FALLING>;
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touchscreen-size-x = <800>;
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touchscreen-size-y = <480>;
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touchscreen-inverted-x;
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touchscreen-inverted-y;
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wakeup-source;
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};
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extcon_ptn5150: typec@3d {
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compatible = "nxp,ptn5150";
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reg = <0x3d>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_extcon>;
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interrupt-parent = <&gpio1>;
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interrupts = <10 IRQ_TYPE_EDGE_FALLING>;
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port {
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typec1_dr_sw: endpoint {
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remote-endpoint = <&usb1_drd_sw>;
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};
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};
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};
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rtc@68 {
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compatible = "dallas,ds1337";
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reg = <0x68>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_rtc>;
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interrupt-parent = <&gpio1>;
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interrupts = <15 IRQ_TYPE_EDGE_FALLING>;
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wakeup-source;
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};
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};
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&i2c4 {
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clock-frequency = <100000>;
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pinctrl-names = "default", "gpio";
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pinctrl-0 = <&pinctrl_i2c4>;
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pinctrl-1 = <&pinctrl_i2c4_gpio>;
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scl-gpios = <&gpio5 20 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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sda-gpios = <&gpio5 21 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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status = "okay";
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pca6408_1: gpio@20 {
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compatible = "nxp,pcal6408";
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reg = <0x20>;
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gpio-controller;
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#gpio-cells = <2>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_pca6408>;
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interrupt-parent = <&gpio1>;
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interrupts = <5 IRQ_TYPE_LEVEL_LOW>;
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};
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pca6408_2: gpio@21 {
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compatible = "nxp,pcal6408";
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reg = <0x21>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-parent = <&gpio1>;
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interrupts = <5 IRQ_TYPE_LEVEL_LOW>;
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};
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st33ktpm2xi2c: tpm@2e {
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compatible = "st,st33ktpm2xi2c", "tcg,tpm-tis-i2c";
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reg = <0x2e>;
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label = "tpm";
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reset-gpios = <&pca9534 0 GPIO_ACTIVE_HIGH>;
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};
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};
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&pcie_phy {
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fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>;
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fsl,tx-deemph-gen1 = <0x2d>;
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fsl,tx-deemph-gen2 = <0xf>;
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clocks = <&pcie0_refclk>;
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status = "okay";
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};
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&pcie0 {
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reset-gpios = <&pca6408_2 3 GPIO_ACTIVE_LOW>;
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clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>, <&pcie0_refclk>,
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<&clk IMX8MM_CLK_PCIE1_AUX>;
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assigned-clocks = <&clk IMX8MM_CLK_PCIE1_AUX>,
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<&clk IMX8MM_CLK_PCIE1_CTRL>;
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assigned-clock-rates = <10000000>, <250000000>;
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assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_50M>,
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<&clk IMX8MM_SYS_PLL2_250M>;
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status = "okay";
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};
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&pwm1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_pwm>;
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status = "okay";
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};
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&snvs_pwrkey {
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status = "okay";
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};
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&snvs_rtc {
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status = "disabled";
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};
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/* Console */
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&uart1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart1>;
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wakeup-source;
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status = "okay";
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};
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/* Header */
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&uart2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart2>;
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status = "okay";
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};
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/* Header */
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&uart3 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart3>;
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status = "okay";
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};
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&usbotg1 {
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dr_mode = "otg";
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hnp-disable;
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srp-disable;
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adp-disable;
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usb-role-switch;
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disable-over-current;
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samsung,picophy-pre-emp-curr-control = <3>;
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samsung,picophy-dc-vol-level-adjust = <7>;
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status = "okay";
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port {
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usb1_drd_sw: endpoint {
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remote-endpoint = <&typec1_dr_sw>;
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};
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};
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};
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&usbotg2 {
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dr_mode = "host";
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samsung,picophy-pre-emp-curr-control = <3>;
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samsung,picophy-dc-vol-level-adjust = <7>;
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disable-over-current;
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status = "okay";
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};
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/* SD */
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&usdhc2 {
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pinctrl-names = "default", "state_100mhz", "state_200mhz";
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pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
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pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
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pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
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cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
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bus-width = <4>;
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vmmc-supply = <®_usdhc2_vmmc>;
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status = "okay";
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};
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&iomuxc {
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pinctrl_can: cangrp {
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fsl,pins = <
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MX8MM_IOMUXC_GPIO1_IO06_GPIO1_IO6 0x16
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MX8MM_IOMUXC_SPDIF_RX_GPIO5_IO4 0x16
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>;
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};
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pinctrl_captouch: captouchgrp {
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fsl,pins = <
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MX8MM_IOMUXC_GPIO1_IO14_GPIO1_IO14 0x16
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>;
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};
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pinctrl_ecspi1: ecspi1grp {
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fsl,pins = <
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MX8MM_IOMUXC_ECSPI1_SCLK_ECSPI1_SCLK 0x13
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MX8MM_IOMUXC_ECSPI1_MOSI_ECSPI1_MOSI 0x13
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MX8MM_IOMUXC_ECSPI1_MISO_ECSPI1_MISO 0x13
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MX8MM_IOMUXC_ECSPI1_SS0_GPIO5_IO9 0x13
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MX8MM_IOMUXC_GPIO1_IO12_GPIO1_IO12 0x13
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>;
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};
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pinctrl_extcon: extcongrp {
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fsl,pins = <
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MX8MM_IOMUXC_GPIO1_IO10_GPIO1_IO10 0x19
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>;
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};
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pinctrl_gpio_leds: ledgrp {
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fsl,pins = <
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MX8MM_IOMUXC_SAI1_TXD6_GPIO4_IO18 0x1c6
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>;
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};
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pinctrl_i2c2: i2c2grp {
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fsl,pins = <
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MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL 0x400001c3
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MX8MM_IOMUXC_I2C2_SDA_I2C2_SDA 0x400001c3
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>;
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};
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pinctrl_i2c2_gpio: i2c2-gpiogrp {
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fsl,pins = <
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MX8MM_IOMUXC_I2C2_SCL_GPIO5_IO16 0x400001c3
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MX8MM_IOMUXC_I2C2_SDA_GPIO5_IO17 0x400001c3
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>;
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};
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pinctrl_i2c4: i2c4grp {
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fsl,pins = <
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MX8MM_IOMUXC_I2C4_SCL_I2C4_SCL 0x400001c3
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MX8MM_IOMUXC_I2C4_SDA_I2C4_SDA 0x400001c3
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>;
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};
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pinctrl_i2c4_gpio: i2c4-gpiogrp {
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fsl,pins = <
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MX8MM_IOMUXC_I2C4_SCL_GPIO5_IO20 0x400001c3
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MX8MM_IOMUXC_I2C4_SDA_GPIO5_IO21 0x400001c3
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>;
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};
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pinctrl_pca6408: pca6408grp {
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fsl,pins = <
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MX8MM_IOMUXC_GPIO1_IO05_GPIO1_IO5 0x1c6
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>;
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};
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pinctrl_pwm: pwmgrp {
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fsl,pins = <
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||||
MX8MM_IOMUXC_GPIO1_IO01_PWM1_OUT 0x06
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_vmmc_usdhc2: regvmmc-usdhc2grp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_SD2_RESET_B_GPIO2_IO19 0xc1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_restouch: restouchgrp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x1c0
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_rtc: rtcgrp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_GPIO1_IO15_GPIO1_IO15 0x1c1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart1: uart1grp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_UART1_RXD_UART1_DCE_RX 0x140
|
||||
MX8MM_IOMUXC_UART1_TXD_UART1_DCE_TX 0x140
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart2: uart2grp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX 0x140
|
||||
MX8MM_IOMUXC_UART2_TXD_UART2_DCE_TX 0x140
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart3: uart3grp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_UART3_RXD_UART3_DCE_RX 0x140
|
||||
MX8MM_IOMUXC_UART3_TXD_UART3_DCE_TX 0x140
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc2: usdhc2grp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x190
|
||||
MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d0
|
||||
MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d0
|
||||
MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d0
|
||||
MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d0
|
||||
MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d0
|
||||
MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x194
|
||||
MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d4
|
||||
MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d4
|
||||
MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d4
|
||||
MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d4
|
||||
MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d4
|
||||
MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x196
|
||||
MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d6
|
||||
MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d6
|
||||
MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d6
|
||||
MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d6
|
||||
MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d6
|
||||
MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc2_gpio: usdhc2-gpiogrp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0xc1
|
||||
>;
|
||||
};
|
||||
};
|
||||
Loading…
Reference in New Issue
Block a user