arm64: dts: rockchip: Add AP6275P wireless support for Khadas Edge 2L

The Khadas Edge 2L uses an Ampak AP6275P (BCM43752) PCIe
Wi-Fi 6 module.

Enable combphy0 and pcie0, add the Wi-Fi regulator and reset
pinctrl, and describe the PCIe Wi-Fi function so it can consume
the 32.768kHz LPO clock provided by the HYM8563 RTC.

Signed-off-by: Gray Huang <gray.huang@wesion.com>
Link: https://patch.msgid.link/20260429063712.2150938-4-gray.huang@wesion.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This commit is contained in:
Gray Huang 2026-04-29 14:37:08 +08:00 committed by Heiko Stuebner
parent e477eff630
commit 76cf96cd9e

View File

@ -58,6 +58,24 @@ vcc_2v0_pldo_s3: regulator-vcc-2v0-pldo-s3 {
regulator-max-microvolt = <2000000>;
vin-supply = <&vcc_sys>;
};
vcc_wifi_reg_on: regulator-wifi-reg-on {
compatible = "regulator-fixed";
enable-active-high;
gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>;
pinctrl-0 = <&wifi_reg_on>;
pinctrl-names = "default";
regulator-name = "wifi_reg_on";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
vin-supply = <&vcc_1v8_s3>;
};
};
&combphy0_ps {
status = "okay";
};
&cpu_l0 {
@ -482,6 +500,48 @@ hym8563: rtc@51 {
};
};
&pcie0 {
pinctrl-names = "default";
pinctrl-0 = <&pcie0_rst>;
reset-gpios = <&gpio4 RK_PB4 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc_3v3_s3>;
status = "okay";
pcie@0,0 {
reg = <0x0 0 0 0 0>;
bus-range = <0x0 0xf>;
device_type = "pci";
ranges;
#address-cells = <3>;
#size-cells = <2>;
wifi: wifi@0,0 {
compatible = "pci14e4,449d";
reg = <0x10000 0 0 0 0>;
clocks = <&hym8563>;
clock-names = "lpo";
};
};
};
&pinctrl {
pcie0 {
pcie0_rst: pcie0-rst {
rockchip,pins = <4 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
wifi {
wifi_reg_on: wifi-reg-on {
rockchip,pins = <4 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
};
wifi_wake_host: wifi-wake-host {
rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_down>;
};
};
};
&sdhci {
bus-width = <8>;
no-sdio;