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input: qcom-hv-haptics: Update RC_CLK_CAL_COUNT calculation

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The equations for calculating RC_CLK_CAL_COUNT need to be updated
when flag SLEEP_CLK_32K_SCALE is not set. Update it by introducing
a coefficient named as SLEEP_CLK_CAL_DIVIDER which is the divider
of the 19.2 MHz system clock to generate the sleep clock.

Change-Id: I75d16eca3fe160c425af5cf3545272e0d1999a8a
Signed-off-by: Fenglin Wu <quic_fenglinw@quicinc.com>
This commit is contained in:
Fenglin Wu 2022-03-14 11:20:15 +08:00 committed by David Collins
parent e8e7d6a836
commit 7644b7452c
1 changed files with 8 additions and 6 deletions
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14
drivers/input/misc/qcom-hv-haptics.c
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@ -966,6 +966,8 @@ static int haptics_adjust_lra_period(struct haptics_chip *chip, u32 *t_lra_us)
((chip->wa_flags & SLEEP_CLK_32K_SCALE) ? 1627700 : 1666667)
#define TLRA_AUTO_RES_AUTO_CAL_STEP_PSEC \
((chip->wa_flags & SLEEP_CLK_32K_SCALE) ? 813850 : 833333)
#define SLEEP_CLK_CAL_DIVIDER \
((chip->wa_flags & SLEEP_CLK_32K_SCALE) ? 600 : 586)
static int haptics_get_closeloop_lra_period(
struct haptics_chip *chip, bool in_boot)
{
@ -1057,10 +1059,10 @@ static int haptics_get_closeloop_lra_period(
if (!config->t_lra_us || !config->cl_t_lra_us)
return -EINVAL;
/*
* RC_CLK_CAL_COUNT = 600 * (CAL_TLRA_OL / TLRA_OL)
* * (600 / 586) * (CL_T_TLRA_US / OL_T_LRA_US)
* RC_CLK_CAL_COUNT = SLEEP_CLK_CAL_DIVIDER * (CAL_TLRA_OL / TLRA_OL)
* * (SLEEP_CLK_CAL_DIVIDER / 586) * (CL_T_TLRA_US / OL_T_LRA_US)
*/
tmp = 360000;
tmp = SLEEP_CLK_CAL_DIVIDER * SLEEP_CLK_CAL_DIVIDER;
tmp *= cal_tlra_cl_sts * config->cl_t_lra_us;
tmp = div_u64(tmp, tlra_ol);
tmp = div_u64(tmp, 586);
@ -1095,10 +1097,10 @@ static int haptics_get_closeloop_lra_period(
/*
* RC_CLK_CAL_COUNT =
* 600 * (CAL_TLRA_CL_STS_AUTO_CAL / LAST_GOOD_TLRA_CL_STS)
* * (600 / 293) * (CL_T_TLRA_US / OL_T_LRA_US)
* SLEEP_CLK_CAL_DIVIDER * (CAL_TLRA_CL_STS_AUTO_CAL / LAST_GOOD_TLRA_CL_STS)
* * (SLEEP_CLK_CAL_DIVIDER / 293) * (CL_T_TLRA_US / OL_T_LRA_US)
*/
tmp = 360000;
tmp = SLEEP_CLK_CAL_DIVIDER * SLEEP_CLK_CAL_DIVIDER;
tmp *= cal_tlra_cl_sts * config->cl_t_lra_us;
tmp = div_u64(tmp, last_good_tlra_cl_sts);
tmp = div_u64(tmp, 293);