github-mirror/linux
1
0
Fork 0
mirror of https://github.com/torvalds/linux.git synced 2026-11-09 05:34:02 +01:00
Code Issues Actions Packages Projects Releases Wiki Activity Graph

drm/amd/display: Guard against empty DCN6 UTM QoS table

Browse Source 
[Why]
The UTM QoS model population indexed into a firmware-provided
table without checking whether it reported any load levels or
SOPs, leaving a malformed table treated as valid instead of absent.

[How]
Bail out early and clear the output model pointer when the load
level count or SOP count is zero.

Reviewed-by: Alvin Lee <alvin.lee2@amd.com>
Signed-off-by: Wenjing Liu <wenjing.liu@amd.com>
Signed-off-by: James Lin <pinglei.lin@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Wenjing Liu 2026-08-04 14:01:54 -04:00 committed by Alex Deucher
parent 3b381dc0ed
commit 762e89c63a
1 changed files with 5 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn60/dcn60_clk_mgr.c
View File

@ -625,6 +625,11 @@ static void dcn60_populate_utm_qos_model(
const SocUtmTable_t *utm_table = &init_table->UtmTable;
unsigned int ll, sop;
if (utm_table->Header.LoadLevelCount == 0 || utm_table->Header.SopCount == 0) {
*qos_model = NULL;
return;
}
memset(dchub, 0, sizeof(*dchub));
dchub->load_level_count = (uint8_t)utm_table->Header.LoadLevelCount;
dchub->sop_count = (uint8_t)utm_table->Header.SopCount;