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KVM: x86: Update guest cpu_caps at runtime for dynamic CPUID-based features
When updating guest CPUID entries to emulate runtime behavior, e.g. when the guest enables a CR4-based feature that is tied to a CPUID flag, also update the vCPU's cpu_caps accordingly. This will allow replacing all usage of guest_cpuid_has() with guest_cpu_cap_has(). Note, this relies on kvm_set_cpuid() taking a snapshot of cpu_caps before invoking kvm_update_cpuid_runtime(), i.e. when KVM is updating CPUID entries that *may* become the vCPU's CPUID, so that unwinding to the old cpu_caps is possible if userspace tries to set bogus CPUID information. Note #2, none of the features in question use guest_cpu_cap_has() at this time, i.e. aside from settings bits in cpu_caps, this is a glorified nop. Cc: Yang Weijiang <weijiang.yang@intel.com> Cc: Robert Hoo <robert.hoo.linux@gmail.com> Reviewed-by: Binbin Wu <binbin.wu@linux.intel.com> Reviewed-by: Maxim Levitsky <mlevitsk@redhat.com> Reviewed-by: Xiaoyao Li <xiaoyao.li@intel.com> Link: https://lore.kernel.org/r/20241128013424.4096668-49-seanjc@google.com Signed-off-by: Sean Christopherson <seanjc@google.com>
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@ -291,28 +291,38 @@ static u64 cpuid_get_supported_xcr0(struct kvm_vcpu *vcpu)
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return (best->eax | ((u64)best->edx << 32)) & kvm_caps.supported_xcr0;
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}
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static __always_inline void kvm_update_feature_runtime(struct kvm_vcpu *vcpu,
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struct kvm_cpuid_entry2 *entry,
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unsigned int x86_feature,
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bool has_feature)
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{
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cpuid_entry_change(entry, x86_feature, has_feature);
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guest_cpu_cap_change(vcpu, x86_feature, has_feature);
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}
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void kvm_update_cpuid_runtime(struct kvm_vcpu *vcpu)
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{
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struct kvm_cpuid_entry2 *best;
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best = kvm_find_cpuid_entry(vcpu, 1);
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if (best) {
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cpuid_entry_change(best, X86_FEATURE_OSXSAVE,
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kvm_is_cr4_bit_set(vcpu, X86_CR4_OSXSAVE));
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kvm_update_feature_runtime(vcpu, best, X86_FEATURE_OSXSAVE,
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kvm_is_cr4_bit_set(vcpu, X86_CR4_OSXSAVE));
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cpuid_entry_change(best, X86_FEATURE_APIC,
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vcpu->arch.apic_base & MSR_IA32_APICBASE_ENABLE);
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kvm_update_feature_runtime(vcpu, best, X86_FEATURE_APIC,
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vcpu->arch.apic_base & MSR_IA32_APICBASE_ENABLE);
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if (!kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT))
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cpuid_entry_change(best, X86_FEATURE_MWAIT,
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vcpu->arch.ia32_misc_enable_msr &
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MSR_IA32_MISC_ENABLE_MWAIT);
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kvm_update_feature_runtime(vcpu, best, X86_FEATURE_MWAIT,
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vcpu->arch.ia32_misc_enable_msr &
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MSR_IA32_MISC_ENABLE_MWAIT);
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}
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best = kvm_find_cpuid_entry_index(vcpu, 7, 0);
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if (best)
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cpuid_entry_change(best, X86_FEATURE_OSPKE,
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kvm_is_cr4_bit_set(vcpu, X86_CR4_PKE));
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kvm_update_feature_runtime(vcpu, best, X86_FEATURE_OSPKE,
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kvm_is_cr4_bit_set(vcpu, X86_CR4_PKE));
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best = kvm_find_cpuid_entry_index(vcpu, 0xD, 0);
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if (best)
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