From abfc18f910d8490e0a29b642e3b1aaba7bfbf204 Mon Sep 17 00:00:00 2001 From: Qiufang Dai Date: Mon, 11 Dec 2017 22:13:47 +0800 Subject: [PATCH 1/5] arm64: dts: meson-axg: add clock DT info for Meson AXG SoC Try to add Hiubus DT info, and also enable clock DT info for the Amlogic's Meson-AXG SoC. Acked-by: Rob Herring Signed-off-by: Qiufang Dai Signed-off-by: Yixun Lan Signed-off-by: Kevin Hilman --- arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi index e7213eb53958..01beb211f442 100644 --- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi @@ -148,6 +148,20 @@ gic: interrupt-controller@ffc01000 { #address-cells = <0>; }; + hiubus: bus@ff63c000 { + compatible = "simple-bus"; + reg = <0x0 0xff63c000 0x0 0x1c00>; + #address-cells = <2>; + #size-cells = <2>; + ranges = <0x0 0x0 0x0 0xff63c000 0x0 0x1c00>; + + clkc: clock-controller@0 { + compatible = "amlogic,axg-clkc"; + #clock-cells = <1>; + reg = <0x0 0x0 0x0 0x320>; + }; + }; + mailbox: mailbox@ff63dc00 { compatible = "amlogic,meson-gx-mhu", "amlogic,meson-gxbb-mhu"; reg = <0 0xff63dc00 0 0x400>; From f3dafaa36b1fb7e50a8eb009d7ff39c3e7bb7756 Mon Sep 17 00:00:00 2001 From: Xingyu Chen Date: Fri, 8 Dec 2017 09:54:17 +0800 Subject: [PATCH 2/5] documentation: Add compatibles for Amlogic Meson AXG pin controllers Add compatibles for Amlogic Meson AXG pin controllers Reviewed-by: Neil Armstrong Acked-by: Rob Herring Signed-off-by: Xingyu Chen Signed-off-by: Yixun Lan Signed-off-by: Kevin Hilman --- Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt index 2392557ede27..2c12f9789116 100644 --- a/Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt +++ b/Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt @@ -9,6 +9,8 @@ Required properties for the root node: "amlogic,meson-gxbb-aobus-pinctrl" "amlogic,meson-gxl-periphs-pinctrl" "amlogic,meson-gxl-aobus-pinctrl" + "amlogic,meson-axg-periphs-pinctrl" + "amlogic,meson-axg-aobus-pinctrl" - reg: address and size of registers controlling irq functionality === GPIO sub-nodes === From de05ded6a99ff4382c9d2d4b746306bb6b9cf907 Mon Sep 17 00:00:00 2001 From: Xingyu Chen Date: Fri, 8 Dec 2017 09:54:18 +0800 Subject: [PATCH 3/5] ARM64: dts: meson-axg: add pinctrl DT info for Meson-AXG SoC Add new pinctrl DT info for the Amlogic's Meson-AXG SoC. Reviewed-by: Neil Armstrong Signed-off-by: Xingyu Chen Signed-off-by: Yixun Lan [khilman: dropped unnecessary include] Signed-off-by: Kevin Hilman --- arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 43 ++++++++++++++++++++++ 1 file changed, 43 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi index 01beb211f442..d356ce74ad89 100644 --- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi @@ -171,6 +171,32 @@ mailbox: mailbox@ff63dc00 { #mbox-cells = <1>; }; + periphs: periphs@ff634000 { + compatible = "simple-bus"; + reg = <0x0 0xff634000 0x0 0x2000>; + #address-cells = <2>; + #size-cells = <2>; + ranges = <0x0 0x0 0x0 0xff634000 0x0 0x2000>; + + pinctrl_periphs: pinctrl@480 { + compatible = "amlogic,meson-axg-periphs-pinctrl"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + gpio: bank@480 { + reg = <0x0 0x00480 0x0 0x40>, + <0x0 0x004e8 0x0 0x14>, + <0x0 0x00520 0x0 0x14>, + <0x0 0x00430 0x0 0x3c>; + reg-names = "mux", "pull", "pull-enable", "gpio"; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pinctrl_periphs 0 0 86>; + }; + }; + }; + sram: sram@fffc0000 { compatible = "amlogic,meson-axg-sram", "mmio-sram"; reg = <0x0 0xfffc0000 0x0 0x20000>; @@ -196,6 +222,23 @@ aobus: bus@ff800000 { #size-cells = <2>; ranges = <0x0 0x0 0x0 0xff800000 0x0 0x100000>; + pinctrl_aobus: pinctrl@14 { + compatible = "amlogic,meson-axg-aobus-pinctrl"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + gpio_ao: bank@14 { + reg = <0x0 0x00014 0x0 0x8>, + <0x0 0x0002c 0x0 0x4>, + <0x0 0x00024 0x0 0x8>; + reg-names = "mux", "pull", "gpio"; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pinctrl_aobus 0 0 15>; + }; + }; + uart_AO: serial@3000 { compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart"; reg = <0x0 0x3000 0x0 0x18>; From 4a81e5ddfb43498729c7e0ac4d35dca6ab32291a Mon Sep 17 00:00:00 2001 From: Jian Hu Date: Fri, 15 Dec 2017 10:47:39 +0800 Subject: [PATCH 4/5] ARM64: dts: meson-axg: add PWM DT info for Meson-Axg SoC Add PWM DT info for the Amlogic's Meson-Axg SoC. Signed-off-by: Jian Hu Signed-off-by: Yixun Lan Signed-off-by: Kevin Hilman --- arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 112 +++++++++++++++++++++ 1 file changed, 112 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi index d356ce74ad89..b35526309577 100644 --- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi @@ -120,6 +120,20 @@ cbus: bus@ffd00000 { #size-cells = <2>; ranges = <0x0 0x0 0x0 0xffd00000 0x0 0x25000>; + pwm_ab: pwm@1b000 { + compatible = "amlogic,meson-axg-ee-pwm"; + reg = <0x0 0x1b000 0x0 0x20>; + #pwm-cells = <3>; + status = "disabled"; + }; + + pwm_cd: pwm@1a000 { + compatible = "amlogic,meson-axg-ee-pwm"; + reg = <0x0 0x1a000 0x0 0x20>; + #pwm-cells = <3>; + status = "disabled"; + }; + uart_A: serial@24000 { compatible = "amlogic,meson-gx-uart", "amlogic,meson-uart"; reg = <0x0 0x24000 0x0 0x14>; @@ -194,6 +208,90 @@ gpio: bank@480 { #gpio-cells = <2>; gpio-ranges = <&pinctrl_periphs 0 0 86>; }; + + pwm_a_a_pins: pwm_a_a { + mux { + groups = "pwm_a_a"; + function = "pwm_a"; + }; + }; + + pwm_a_x18_pins: pwm_a_x18 { + mux { + groups = "pwm_a_x18"; + function = "pwm_a"; + }; + }; + + pwm_a_x20_pins: pwm_a_x20 { + mux { + groups = "pwm_a_x20"; + function = "pwm_a"; + }; + }; + + pwm_a_z_pins: pwm_a_z { + mux { + groups = "pwm_a_z"; + function = "pwm_a"; + }; + }; + + pwm_b_a_pins: pwm_b_a { + mux { + groups = "pwm_b_a"; + function = "pwm_b"; + }; + }; + + pwm_b_x_pins: pwm_b_x { + mux { + groups = "pwm_b_x"; + function = "pwm_b"; + }; + }; + + pwm_b_z_pins: pwm_b_z { + mux { + groups = "pwm_b_z"; + function = "pwm_b"; + }; + }; + + pwm_c_a_pins: pwm_c_a { + mux { + groups = "pwm_c_a"; + function = "pwm_c"; + }; + }; + + pwm_c_x10_pins: pwm_c_x10 { + mux { + groups = "pwm_c_x10"; + function = "pwm_c"; + }; + }; + + pwm_c_x17_pins: pwm_c_x17 { + mux { + groups = "pwm_c_x17"; + function = "pwm_c"; + }; + }; + + pwm_d_x11_pins: pwm_d_x11 { + mux { + groups = "pwm_d_x11"; + function = "pwm_d"; + }; + }; + + pwm_d_x16_pins: pwm_d_x16 { + mux { + groups = "pwm_d_x16"; + function = "pwm_d"; + }; + }; }; }; @@ -239,6 +337,20 @@ gpio_ao: bank@14 { }; }; + pwm_AO_ab: pwm@7000 { + compatible = "amlogic,meson-axg-ao-pwm"; + reg = <0x0 0x07000 0x0 0x20>; + #pwm-cells = <3>; + status = "disabled"; + }; + + pwm_AO_cd: pwm@2000 { + compatible = "amlogic,axg-ao-pwm"; + reg = <0x0 0x02000 0x0 0x20>; + #pwm-cells = <3>; + status = "disabled"; + }; + uart_AO: serial@3000 { compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart"; reg = <0x0 0x3000 0x0 0x18>; From 43b9f617b5f98f2f7abb508fef5e535e5fb66a41 Mon Sep 17 00:00:00 2001 From: Yixun Lan Date: Fri, 10 Nov 2017 16:46:59 +0800 Subject: [PATCH 5/5] arm64: dts: meson-axg: add new reset DT node Add reset DT node for Amlogic's Meson-AXG SoC. Signed-off-by: Yixun Lan Reviewed-by: Neil Armstrong --- arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi index b35526309577..d288d4724ae3 100644 --- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi @@ -134,6 +134,12 @@ pwm_cd: pwm@1a000 { status = "disabled"; }; + reset: reset-controller@1004 { + compatible = "amlogic,meson-axg-reset"; + reg = <0x0 0x01004 0x0 0x9c>; + #reset-cells = <1>; + }; + uart_A: serial@24000 { compatible = "amlogic,meson-gx-uart", "amlogic,meson-uart"; reg = <0x0 0x24000 0x0 0x14>;