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x86/alternatives: Simplify smp_text_poke_batch_process()

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This function is now using the text_poke_array state exclusively,
make that explicit by removing the redundant input parameters.

Signed-off-by: Ingo Molnar <mingo@kernel.org>
Cc: Juergen Gross <jgross@suse.com>
Cc: "H . Peter Anvin" <hpa@zytor.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Link: https://lore.kernel.org/r/20250411054105.2341982-34-mingo@kernel.org
This commit is contained in:
Ingo Molnar 2025-04-11 07:40:45 +02:00
parent 8e35752f0c
commit 74e8e2bf95
1 changed files with 20 additions and 23 deletions
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43
arch/x86/kernel/alternative.c
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@ -2591,8 +2591,8 @@ noinstr int smp_text_poke_int3_handler(struct pt_regs *regs)
/**
* smp_text_poke_batch_process() -- update instructions on live kernel on SMP
* @tp: vector of instructions to patch
* @nr_entries: number of entries in the vector
* @text_poke_array.vec: vector of instructions to patch
* @text_poke_array.nr_entries: number of entries in the vector
*
* Modify multi-byte instruction by using int3 breakpoint on SMP.
* We completely avoid stop_machine() here, and achieve the
@ -2610,7 +2610,7 @@ noinstr int smp_text_poke_int3_handler(struct pt_regs *regs)
* replacing opcode
* - sync cores
*/
static void smp_text_poke_batch_process(struct smp_text_poke_loc *tp, unsigned int nr_entries)
static void smp_text_poke_batch_process(void)
{
unsigned char int3 = INT3_INSN_OPCODE;
unsigned int i;
@ -2618,9 +2618,6 @@ static void smp_text_poke_batch_process(struct smp_text_poke_loc *tp, unsigned i
lockdep_assert_held(&text_mutex);
WARN_ON_ONCE(tp != text_poke_array.vec);
WARN_ON_ONCE(nr_entries != text_poke_array.nr_entries);
/*
* Corresponds to the implicit memory barrier in try_get_text_poke_array() to
* ensure reading a non-zero refcount provides up to date text_poke_array data.
@ -2640,16 +2637,16 @@ static void smp_text_poke_batch_process(struct smp_text_poke_loc *tp, unsigned i
/*
* Corresponding read barrier in int3 notifier for making sure the
* nr_entries and handler are correctly ordered wrt. patching.
* text_poke_array.nr_entries and handler are correctly ordered wrt. patching.
*/
smp_wmb();
/*
* First step: add a int3 trap to the address that will be patched.
*/
for (i = 0; i < nr_entries; i++) {
tp[i].old = *(u8 *)text_poke_addr(&tp[i]);
text_poke(text_poke_addr(&tp[i]), &int3, INT3_INSN_SIZE);
for (i = 0; i < text_poke_array.nr_entries; i++) {
text_poke_array.vec[i].old = *(u8 *)text_poke_addr(&text_poke_array.vec[i]);
text_poke(text_poke_addr(&text_poke_array.vec[i]), &int3, INT3_INSN_SIZE);
}
text_poke_sync();
@ -2657,15 +2654,15 @@ static void smp_text_poke_batch_process(struct smp_text_poke_loc *tp, unsigned i
/*
* Second step: update all but the first byte of the patched range.
*/
for (do_sync = 0, i = 0; i < nr_entries; i++) {
u8 old[POKE_MAX_OPCODE_SIZE+1] = { tp[i].old, };
for (do_sync = 0, i = 0; i < text_poke_array.nr_entries; i++) {
u8 old[POKE_MAX_OPCODE_SIZE+1] = { text_poke_array.vec[i].old, };
u8 _new[POKE_MAX_OPCODE_SIZE+1];
const u8 *new = tp[i].text;
int len = tp[i].len;
const u8 *new = text_poke_array.vec[i].text;
int len = text_poke_array.vec[i].len;
if (len - INT3_INSN_SIZE > 0) {
memcpy(old + INT3_INSN_SIZE,
text_poke_addr(&tp[i]) + INT3_INSN_SIZE,
text_poke_addr(&text_poke_array.vec[i]) + INT3_INSN_SIZE,
len - INT3_INSN_SIZE);
if (len == 6) {
@ -2674,7 +2671,7 @@ static void smp_text_poke_batch_process(struct smp_text_poke_loc *tp, unsigned i
new = _new;
}
text_poke(text_poke_addr(&tp[i]) + INT3_INSN_SIZE,
text_poke(text_poke_addr(&text_poke_array.vec[i]) + INT3_INSN_SIZE,
new + INT3_INSN_SIZE,
len - INT3_INSN_SIZE);
@ -2705,7 +2702,7 @@ static void smp_text_poke_batch_process(struct smp_text_poke_loc *tp, unsigned i
* The old instruction is recorded so that the event can be
* processed forwards or backwards.
*/
perf_event_text_poke(text_poke_addr(&tp[i]), old, len, new, len);
perf_event_text_poke(text_poke_addr(&text_poke_array.vec[i]), old, len, new, len);
}
if (do_sync) {
@ -2721,16 +2718,16 @@ static void smp_text_poke_batch_process(struct smp_text_poke_loc *tp, unsigned i
* Third step: replace the first byte (int3) by the first byte of
* replacing opcode.
*/
for (do_sync = 0, i = 0; i < nr_entries; i++) {
u8 byte = tp[i].text[0];
for (do_sync = 0, i = 0; i < text_poke_array.nr_entries; i++) {
u8 byte = text_poke_array.vec[i].text[0];
if (tp[i].len == 6)
if (text_poke_array.vec[i].len == 6)
byte = 0x0f;
if (byte == INT3_INSN_OPCODE)
continue;
text_poke(text_poke_addr(&tp[i]), &byte, INT3_INSN_SIZE);
text_poke(text_poke_addr(&text_poke_array.vec[i]), &byte, INT3_INSN_SIZE);
do_sync++;
}
@ -2859,7 +2856,7 @@ static bool text_poke_addr_ordered(void *addr)
void smp_text_poke_batch_finish(void)
{
if (text_poke_array.nr_entries) {
smp_text_poke_batch_process(text_poke_array.vec, text_poke_array.nr_entries);
smp_text_poke_batch_process();
text_poke_array.nr_entries = 0;
}
}
@ -2869,7 +2866,7 @@ static void smp_text_poke_batch_flush(void *addr)
lockdep_assert_held(&text_mutex);
if (text_poke_array.nr_entries == TP_ARRAY_NR_ENTRIES_MAX || !text_poke_addr_ordered(addr)) {
smp_text_poke_batch_process(text_poke_array.vec, text_poke_array.nr_entries);
smp_text_poke_batch_process();
text_poke_array.nr_entries = 0;
}
}