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bpf, x86: Fold the PROBE_MEM address computation into a lea
The kernel address check in front of a BPF_PROBE_MEM load computed src_reg + off - VSYSCALL_ADDR with a mov of VSYSCALL_ADDR, a mov of the base register, an add of the offset in imm32 form and a sub, that is 20 bytes and 4 uops. VSYSCALL_ADDR is -10 MiB, so together with the 16-bit instruction offset it fits into a 32-bit displacement and a single lea does the same in 7 bytes and 1 uop on Intel and AMD. Before, for the check on r0 = *(u64 *)(r1 + 16): 49 c7 c2 00 00 60 ff movq $0xffffffffff600000,%r10 49 89 fb movq %rdi,%r11 49 81 c3 10 00 00 00 addq $0x10,%r11 4d 29 d3 subq %r10,%r11 After: 4c 8d 9f 10 00 a0 00 leaq 0xa00010(%rdi),%r11 Signed-off-by: Daniel Borkmann <daniel@iogearbox.net> Link: https://lore.kernel.org/bpf/20261013171230.523677-12-daniel@iogearbox.net Signed-off-by: Kumar Kartikeya Dwivedi <memxor@gmail.com>
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@ -2853,22 +2853,16 @@ static int do_jit(struct bpf_verifier_env *env, struct bpf_prog *bpf_prog, int *
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u64 limit = TASK_SIZE_MAX + PAGE_SIZE - VSYSCALL_ADDR;
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u8 *end_of_jmp;
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/* movabsq r10, VSYSCALL_ADDR */
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emit_mov_imm64(&prog, BPF_REG_AX, (long)VSYSCALL_ADDR >> 32,
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(u32)(long)VSYSCALL_ADDR);
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/* mov src_reg, r11 */
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EMIT_mov(AUX_REG, src_reg);
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if (insn->off) {
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/* add r11, insn->off */
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maybe_emit_1mod(&prog, AUX_REG, true);
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EMIT2_off32(0x81, add_1reg(0xC0, AUX_REG), insn->off);
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}
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/* sub r11, r10 */
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maybe_emit_mod(&prog, AUX_REG, BPF_REG_AX, true);
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EMIT2(0x29, add_2reg(0xC0, AUX_REG, BPF_REG_AX));
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/*
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* lea r11, [src_reg + insn->off - VSYSCALL_ADDR]
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*
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* VSYSCALL_ADDR is a small negative number, so the
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* whole offset fits into the 32-bit displacement.
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*/
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BUILD_BUG_ON((long)(s32)VSYSCALL_ADDR != (long)VSYSCALL_ADDR);
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EMIT2(add_2mod(0x48, src_reg, AUX_REG), 0x8D);
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emit_insn_suffix(&prog, src_reg, AUX_REG,
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insn->off - (s32)VSYSCALL_ADDR);
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/* movabsq r10, limit */
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emit_mov_imm64(&prog, BPF_REG_AX, (long)limit >> 32,
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