diff --git a/Documentation/firmware-guide/acpi/dsd/motorcomm-yt8xxx-phy.rst b/Documentation/firmware-guide/acpi/dsd/motorcomm-yt8xxx-phy.rst new file mode 100644 index 000000000000..d64a396fac81 --- /dev/null +++ b/Documentation/firmware-guide/acpi/dsd/motorcomm-yt8xxx-phy.rst @@ -0,0 +1,107 @@ +.. SPDX-License-Identifier: GPL-2.0 + +====================================== +Motorcomm yt8xxx PHY properties (_DSD) +====================================== + +This document describes ACPI _DSD device properties for Motorcomm yt8xxx +Ethernet PHYs supported by the in-kernel driver in +``drivers/net/phy/motorcomm.c``. + +The properties are exposed on the PHY device object under the MDIO bus ACPI +device (the same objects that are registered via +``fwnode_mdiobus_register_phy()``). MAC-side connection properties such as +``phy-handle`` and ``phy-mode`` are documented in [acpi-mdio-phy]_. + +Property names and semantics are intentionally aligned with the Devicetree +binding [motorcomm-yt8xxx]_ so that the same driver code path +(``device_property_*`` on ``&phydev->mdio.dev``) can consume firmware +described either as Devicetree or ACPI _DSD. + +UUID and placement +================== + +Per [acpi-dsd-properties-rules]_ and [acpi-mdio-phy]_, properties must be +placed in an _DSD package using the standard Device Properties UUID:: + + ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301") + +Properties +========== + +Unless noted otherwise, integer properties use the same allowed values and +defaults as [motorcomm-yt8xxx]_. + +``rx-internal-delay-ps`` (u32, optional) + RGMII RX internal delay in picoseconds. Only meaningful when the link is + using RGMII modes with RX internal delay; see [motorcomm-yt8xxx]_. + +``tx-internal-delay-ps`` (u32, optional) + RGMII TX internal delay in picoseconds. Only meaningful when the link is + using RGMII modes with TX internal delay; see [motorcomm-yt8xxx]_. + +``motorcomm,clk-out-frequency-hz`` (u32, optional) + Clock output frequency on the PHY clock output pin. Allowed values and + default are defined in [motorcomm-yt8xxx]_. + +``motorcomm,keep-pll-enabled`` (boolean, optional) + If true, keep the PLL enabled even when there is no link (useful for using + the clock output without an Ethernet link). See [motorcomm-yt8xxx]_. + +``motorcomm,auto-sleep-disabled`` (boolean, optional) + If true, disable the PHY auto-sleep behavior described in + [motorcomm-yt8xxx]_. + +``motorcomm,rx-clk-drv-microamp`` (u32, optional) + Drive strength for the ``rx_clk`` RGMII pad in microamps. Allowed values + depend on the configured RGMII LDO voltage; see [motorcomm-yt8xxx]_. + +``motorcomm,rx-data-drv-microamp`` (u32, optional) + Drive strength for the ``rx_data`` and ``rx_ctl`` RGMII pads in microamps. + See [motorcomm-yt8xxx]_. + +``motorcomm,tx-clk-adj-enabled`` (boolean, optional) + Enables adjustments related to ``motorcomm,tx-clk-*-inverted`` usage; see + [motorcomm-yt8xxx]_. + +``motorcomm,tx-clk-10-inverted`` (boolean, optional) +``motorcomm,tx-clk-100-inverted`` (boolean, optional) +``motorcomm,tx-clk-1000-inverted`` (boolean, optional) + Per-speed TX clock inversion options; see [motorcomm-yt8xxx]_. + +ASL example (illustrative) +========================== + +The example below only shows PHY-local _DSD properties. A real platform +still needs a MAC ``phy-handle`` and ``phy-mode`` package as in +[acpi-mdio-phy]_. + +.. code-block:: none + + Scope (\_SB.MDI0) + { + Device (PHY4) + { + Name (_ADR, 0x4) + + Name (_DSD, Package () { + ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), + Package () { + Package (2) { "rx-internal-delay-ps", 2100 }, + Package (2) { "tx-internal-delay-ps", 150 }, + Package (2) { "motorcomm,clk-out-frequency-hz", 0 }, + Package (2) { "motorcomm,keep-pll-enabled", 1 }, + Package (2) { "motorcomm,auto-sleep-disabled", 1 }, + } + }) + } + } + +References +========== + +.. [acpi-mdio-phy] Documentation/firmware-guide/acpi/dsd/phy.rst +.. [acpi-dsd-properties-rules] + Documentation/firmware-guide/acpi/DSD-properties-rules.rst +.. [motorcomm-yt8xxx] + Documentation/devicetree/bindings/net/motorcomm,yt8xxx.yaml diff --git a/Documentation/firmware-guide/acpi/index.rst b/Documentation/firmware-guide/acpi/index.rst index b246902f523f..db9eb7229948 100644 --- a/Documentation/firmware-guide/acpi/index.rst +++ b/Documentation/firmware-guide/acpi/index.rst @@ -11,6 +11,7 @@ ACPI Support dsd/graph dsd/data-node-references dsd/leds + dsd/motorcomm-yt8xxx-phy dsd/phy enumeration osi diff --git a/drivers/net/phy/motorcomm.c b/drivers/net/phy/motorcomm.c index 4d62f7b36212..708491bc198a 100644 --- a/drivers/net/phy/motorcomm.c +++ b/drivers/net/phy/motorcomm.c @@ -10,7 +10,7 @@ #include #include #include -#include +#include #define PHY_ID_YT8511 0x0000010a #define PHY_ID_YT8521 0x0000011a @@ -843,12 +843,12 @@ static u32 ytphy_get_delay_reg_value(struct phy_device *phydev, u16 *rxc_dly_en, u32 dflt) { - struct device_node *node = phydev->mdio.dev.of_node; + struct device *dev = &phydev->mdio.dev; int tb_size_half = tb_size / 2; u32 val; int i; - if (of_property_read_u32(node, prop_name, &val)) + if (device_property_read_u32(dev, prop_name, &val)) goto err_dts_val; /* when rxc_dly_en is NULL, it is get the delay for tx, only half of @@ -996,12 +996,12 @@ static int yt8531_get_ds_map(struct phy_device *phydev, u32 cur) static int yt8531_set_ds(struct phy_device *phydev) { - struct device_node *node = phydev->mdio.dev.of_node; + struct device *dev = &phydev->mdio.dev; u32 ds_field_low, ds_field_hi, val; int ret, ds; /* set rgmii rx clk driver strength */ - if (!of_property_read_u32(node, "motorcomm,rx-clk-drv-microamp", &val)) { + if (!device_property_read_u32(dev, "motorcomm,rx-clk-drv-microamp", &val)) { ds = yt8531_get_ds_map(phydev, val); if (ds < 0) return dev_err_probe(&phydev->mdio.dev, ds, @@ -1018,7 +1018,7 @@ static int yt8531_set_ds(struct phy_device *phydev) return ret; /* set rgmii rx data driver strength */ - if (!of_property_read_u32(node, "motorcomm,rx-data-drv-microamp", &val)) { + if (!device_property_read_u32(dev, "motorcomm,rx-data-drv-microamp", &val)) { ds = yt8531_get_ds_map(phydev, val); if (ds < 0) return dev_err_probe(&phydev->mdio.dev, ds, @@ -1051,7 +1051,6 @@ static int yt8531_set_ds(struct phy_device *phydev) */ static int yt8521_probe(struct phy_device *phydev) { - struct device_node *node = phydev->mdio.dev.of_node; struct device *dev = &phydev->mdio.dev; struct yt8521_priv *priv; int chip_config; @@ -1101,7 +1100,7 @@ static int yt8521_probe(struct phy_device *phydev) return ret; } - if (of_property_read_u32(node, "motorcomm,clk-out-frequency-hz", &freq)) + if (device_property_read_u32(dev, "motorcomm,clk-out-frequency-hz", &freq)) freq = YTPHY_DTS_OUTPUT_CLK_DIS; if (phydev->drv->phy_id == PHY_ID_YT8521) { @@ -1169,11 +1168,11 @@ static int yt8521_probe(struct phy_device *phydev) static int yt8531_probe(struct phy_device *phydev) { - struct device_node *node = phydev->mdio.dev.of_node; + struct device *dev = &phydev->mdio.dev; u16 mask, val; u32 freq; - if (of_property_read_u32(node, "motorcomm,clk-out-frequency-hz", &freq)) + if (device_property_read_u32(dev, "motorcomm,clk-out-frequency-hz", &freq)) freq = YTPHY_DTS_OUTPUT_CLK_DIS; switch (freq) { @@ -1665,7 +1664,7 @@ static int yt8521_resume(struct phy_device *phydev) */ static int yt8521_config_init(struct phy_device *phydev) { - struct device_node *node = phydev->mdio.dev.of_node; + struct device *dev = &phydev->mdio.dev; int old_page; int ret = 0; @@ -1680,7 +1679,7 @@ static int yt8521_config_init(struct phy_device *phydev) goto err_restore_page; } - if (of_property_read_bool(node, "motorcomm,auto-sleep-disabled")) { + if (device_property_read_bool(dev, "motorcomm,auto-sleep-disabled")) { /* disable auto sleep */ ret = ytphy_modify_ext(phydev, YT8521_EXTREG_SLEEP_CONTROL1_REG, YT8521_ESC1R_SLEEP_SW, 0); @@ -1688,7 +1687,7 @@ static int yt8521_config_init(struct phy_device *phydev) goto err_restore_page; } - if (of_property_read_bool(node, "motorcomm,keep-pll-enabled")) { + if (device_property_read_bool(dev, "motorcomm,keep-pll-enabled")) { /* enable RXC clock when no wire plug */ ret = ytphy_modify_ext(phydev, YT8521_CLOCK_GATING_REG, YT8521_CGR_RX_CLK_EN, 0); @@ -1801,14 +1800,14 @@ static int yt8521_led_hw_control_get(struct phy_device *phydev, u8 index, static int yt8531_config_init(struct phy_device *phydev) { - struct device_node *node = phydev->mdio.dev.of_node; + struct device *dev = &phydev->mdio.dev; int ret; ret = ytphy_rgmii_clk_delay_config_with_lock(phydev); if (ret < 0) return ret; - if (of_property_read_bool(node, "motorcomm,auto-sleep-disabled")) { + if (device_property_read_bool(dev, "motorcomm,auto-sleep-disabled")) { /* disable auto sleep */ ret = ytphy_modify_ext_with_lock(phydev, YT8521_EXTREG_SLEEP_CONTROL1_REG, @@ -1817,7 +1816,7 @@ static int yt8531_config_init(struct phy_device *phydev) return ret; } - if (of_property_read_bool(node, "motorcomm,keep-pll-enabled")) { + if (device_property_read_bool(dev, "motorcomm,keep-pll-enabled")) { /* enable RXC clock when no wire plug */ ret = ytphy_modify_ext_with_lock(phydev, YT8521_CLOCK_GATING_REG, @@ -1844,7 +1843,7 @@ static int yt8531_config_init(struct phy_device *phydev) */ static void yt8531_link_change_notify(struct phy_device *phydev) { - struct device_node *node = phydev->mdio.dev.of_node; + struct device *dev = &phydev->mdio.dev; bool tx_clk_1000_inverted = false; bool tx_clk_100_inverted = false; bool tx_clk_10_inverted = false; @@ -1852,17 +1851,17 @@ static void yt8531_link_change_notify(struct phy_device *phydev) u16 val = 0; int ret; - if (of_property_read_bool(node, "motorcomm,tx-clk-adj-enabled")) + if (device_property_read_bool(dev, "motorcomm,tx-clk-adj-enabled")) tx_clk_adj_enabled = true; if (!tx_clk_adj_enabled) return; - if (of_property_read_bool(node, "motorcomm,tx-clk-10-inverted")) + if (device_property_read_bool(dev, "motorcomm,tx-clk-10-inverted")) tx_clk_10_inverted = true; - if (of_property_read_bool(node, "motorcomm,tx-clk-100-inverted")) + if (device_property_read_bool(dev, "motorcomm,tx-clk-100-inverted")) tx_clk_100_inverted = true; - if (of_property_read_bool(node, "motorcomm,tx-clk-1000-inverted")) + if (device_property_read_bool(dev, "motorcomm,tx-clk-1000-inverted")) tx_clk_1000_inverted = true; if (phydev->speed < 0)