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SPI NOR changes for 6.16
Notable changes: - Cleanup some Macronix flash entries. - Add SFDP table fixups for Macronix MX25L3255E. -----BEGIN PGP SIGNATURE----- iHUEABYKAB0WIQQTlUWNzXGEo3bFmyIR4drqP028CQUCaCxxLwAKCRAR4drqP028 CRv7AQDnkJx/vaklgCA9Drj3ChyRBHpgvc6aTzKiodWkcyJH6gD/eetfVZTIhcrI 7/NOCsL+ED137MOcS6fvkPNInIb3lQ0= =PuqJ -----END PGP SIGNATURE----- Merge tag 'spi-nor/for-6.16' into mtd/next SPI NOR changes for 6.16 Notable changes: - Cleanup some Macronix flash entries. - Add SFDP table fixups for Macronix MX25L3255E.
This commit is contained in:
Miquel Raynal
commit
73c4699a35
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@ -58,6 +58,31 @@ macronix_qpp4b_post_sfdp_fixups(struct spi_nor *nor)
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return 0;
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}
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static int
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mx25l3255e_late_init_fixups(struct spi_nor *nor)
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{
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struct spi_nor_flash_parameter *params = nor->params;
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/*
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* SFDP of MX25L3255E is JESD216, which does not include the Quad
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* Enable bit Requirement in BFPT. As a result, during BFPT parsing,
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* the quad_enable method is not set to spi_nor_sr1_bit6_quad_enable.
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* Therefore, it is necessary to correct this setting by late_init.
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*/
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params->quad_enable = spi_nor_sr1_bit6_quad_enable;
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/*
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* In addition, MX25L3255E also supports 1-4-4 page program in 3-byte
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* address mode. However, since the 3-byte address 1-4-4 page program
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* is not defined in SFDP, it needs to be configured in late_init.
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*/
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params->hwcaps.mask |= SNOR_HWCAPS_PP_1_4_4;
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spi_nor_set_pp_settings(¶ms->page_programs[SNOR_CMD_PP_1_4_4],
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SPINOR_OP_PP_1_4_4, SNOR_PROTO_1_4_4);
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return 0;
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}
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static const struct spi_nor_fixups mx25l25635_fixups = {
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.post_bfpt = mx25l25635_post_bfpt_fixups,
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.post_sfdp = macronix_qpp4b_post_sfdp_fixups,
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@ -67,6 +92,10 @@ static const struct spi_nor_fixups macronix_qpp4b_fixups = {
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.post_sfdp = macronix_qpp4b_post_sfdp_fixups,
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};
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static const struct spi_nor_fixups mx25l3255e_fixups = {
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.late_init = mx25l3255e_late_init_fixups,
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};
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static const struct flash_info macronix_nor_parts[] = {
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{
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.id = SNOR_ID(0xc2, 0x20, 0x10),
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@ -88,10 +117,8 @@ static const struct flash_info macronix_nor_parts[] = {
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.name = "mx25l8005",
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.size = SZ_1M,
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}, {
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/* MX25L1606E */
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.id = SNOR_ID(0xc2, 0x20, 0x15),
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.name = "mx25l1606e",
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.size = SZ_2M,
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.no_sfdp_flags = SECT_4K,
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}, {
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.id = SNOR_ID(0xc2, 0x20, 0x16),
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.name = "mx25l3205d",
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@ -103,29 +130,21 @@ static const struct flash_info macronix_nor_parts[] = {
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.size = SZ_8M,
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.no_sfdp_flags = SECT_4K,
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}, {
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/* MX25L12805D */
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.id = SNOR_ID(0xc2, 0x20, 0x18),
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.name = "mx25l12805d",
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.size = SZ_16M,
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.flags = SPI_NOR_HAS_LOCK | SPI_NOR_4BIT_BP,
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.no_sfdp_flags = SECT_4K,
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}, {
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/* MX25L25635E, MX25L25645G */
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.id = SNOR_ID(0xc2, 0x20, 0x19),
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.name = "mx25l25635e",
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.size = SZ_32M,
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.no_sfdp_flags = SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
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.fixups = &mx25l25635_fixups
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}, {
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/* MX66L51235F */
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.id = SNOR_ID(0xc2, 0x20, 0x1a),
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.name = "mx66l51235f",
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.size = SZ_64M,
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.no_sfdp_flags = SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
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.fixup_flags = SPI_NOR_4B_OPCODES,
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.fixups = ¯onix_qpp4b_fixups,
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}, {
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/* MX66L1G45G */
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.id = SNOR_ID(0xc2, 0x20, 0x1b),
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.name = "mx66l1g45g",
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.size = SZ_128M,
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.no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
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.fixups = ¯onix_qpp4b_fixups,
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}, {
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/* MX66L2G45G */
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@ -167,29 +186,16 @@ static const struct flash_info macronix_nor_parts[] = {
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.size = SZ_16M,
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.no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
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}, {
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/* MX25U51245G */
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.id = SNOR_ID(0xc2, 0x25, 0x3a),
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.name = "mx25u51245g",
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.size = SZ_64M,
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.no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
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.fixup_flags = SPI_NOR_4B_OPCODES,
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.fixups = ¯onix_qpp4b_fixups,
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}, {
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.id = SNOR_ID(0xc2, 0x25, 0x3a),
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.name = "mx66u51235f",
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.size = SZ_64M,
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.no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
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.fixup_flags = SPI_NOR_4B_OPCODES,
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.fixups = ¯onix_qpp4b_fixups,
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}, {
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/* MX66U1G45G */
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.id = SNOR_ID(0xc2, 0x25, 0x3b),
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.fixups = ¯onix_qpp4b_fixups,
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}, {
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/* MX66U2G45G */
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.id = SNOR_ID(0xc2, 0x25, 0x3c),
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.name = "mx66u2g45g",
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.size = SZ_256M,
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.no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
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.fixup_flags = SPI_NOR_4B_OPCODES,
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.fixups = ¯onix_qpp4b_fixups,
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}, {
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.id = SNOR_ID(0xc2, 0x26, 0x18),
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@ -215,15 +221,14 @@ static const struct flash_info macronix_nor_parts[] = {
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.size = SZ_4M,
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.no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
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}, {
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/* MX25UW51245G */
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.id = SNOR_ID(0xc2, 0x81, 0x3a),
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.name = "mx25uw51245g",
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.n_banks = 4,
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.flags = SPI_NOR_RWW,
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}, {
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/* MX25L3255E */
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.id = SNOR_ID(0xc2, 0x9e, 0x16),
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.name = "mx25l3255e",
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.size = SZ_4M,
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.no_sfdp_flags = SECT_4K,
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.fixups = &mx25l3255e_fixups,
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},
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/*
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* This spares us of adding new flash entries for flashes that can be
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