github-mirror/linux
1
0
Fork 0
mirror of https://github.com/torvalds/linux.git synced 2026-05-29 17:43:52 +02:00
Code Issues Actions Packages Projects Releases Wiki Activity Graph

ARM: dts: imx6ul/imx6ull: add boot phase properties

Browse Source 
dtschema/schemas/bootph.yaml describe various node usage during
boot phases with DT.

All SoCs require buses (aips and spba), clock, iomuxc and SOC access
during boot process.

Signed-off-by: Max Merchel <Max.Merchel@ew.tq-group.com>
Signed-off-by: Frank Li <Frank.Li@nxp.com>
This commit is contained in:
Max Merchel 2026-02-20 15:31:02 +01:00 committed by Frank Li
parent 24d209d1a1
commit 72d47f32fd
2 changed files with 8 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

7
arch/arm/boot/dts/nxp/imx/imx6ul.dtsi
View File

@ -115,6 +115,7 @@ osc: clock-osc {
#clock-cells = <0>;
clock-frequency = <24000000>;
clock-output-names = "osc";
bootph-pre-ram;
};
ipp_di0: clock-di0 {
@ -143,6 +144,7 @@ soc: soc {
compatible = "simple-bus";
interrupt-parent = <&gpc>;
ranges;
bootph-pre-ram;
ocram: sram@900000 {
compatible = "mmio-sram";
@ -202,6 +204,7 @@ aips1: bus@2000000 {
#size-cells = <1>;
reg = <0x02000000 0x100000>;
ranges;
bootph-pre-ram;
spba-bus@2000000 {
compatible = "fsl,spba-bus", "simple-bus";
@ -209,6 +212,7 @@ spba-bus@2000000 {
#size-cells = <1>;
reg = <0x02000000 0x40000>;
ranges;
bootph-pre-ram;
ecspi1: spi@2008000 {
#address-cells = <1>;
@ -580,6 +584,7 @@ clks: clock-controller@20c4000 {
#clock-cells = <1>;
clocks = <&ckil>, <&osc>, <&ipp_di0>, <&ipp_di1>;
clock-names = "ckil", "osc", "ipp_di0", "ipp_di1";
bootph-pre-ram;
};
anatop: anatop@20c8000 {
@ -745,6 +750,7 @@ power-domain@0 {
iomuxc: pinctrl@20e0000 {
compatible = "fsl,imx6ul-iomuxc";
reg = <0x020e0000 0x4000>;
bootph-pre-ram;
};
gpr: iomuxc-gpr@20e4000 {
@ -826,6 +832,7 @@ aips2: bus@2100000 {
#size-cells = <1>;
reg = <0x02100000 0x100000>;
ranges;
bootph-pre-ram;
crypto: crypto@2140000 {
compatible = "fsl,imx6ul-caam", "fsl,sec-v4.0";

1
arch/arm/boot/dts/nxp/imx/imx6ull.dtsi
View File

@ -57,6 +57,7 @@ aips3: bus@2200000 {
#size-cells = <1>;
reg = <0x02200000 0x100000>;
ranges;
bootph-pre-ram;
dcp: crypto@2280000 {
compatible = "fsl,imx6ull-dcp", "fsl,imx28-dcp";