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pmdomain: renesas: rcar-sys: Add r8a774a3 support
Add support for Renesas RZ/G2M v3.0 (a.k.a. R8A774A3) SoC power areas to the R-Car SYSC driver. The RZ/G2M v3.0 SYSC is similar to the RZ/G2M v1.3 SYSC, however it lacks the A2VC0 power area. Signed-off-by: Ayman Chaudhry <ayman.chaudhry.kc@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Ulf Hansson <ulfh@kernel.org>
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@ -37,6 +37,10 @@ config SYSC_R8A774A1
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bool "System Controller support for R8A774A1 (RZ/G2M)" if COMPILE_TEST
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select SYSC_RCAR
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config SYSC_R8A774A3
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bool "System Controller support for R8A774A3 (RZ/G2M v3.0)" if COMPILE_TEST
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select SYSC_RCAR
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config SYSC_R8A774B1
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bool "System Controller support for R8A774B1 (RZ/G2N)" if COMPILE_TEST
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select SYSC_RCAR
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@ -6,6 +6,7 @@ obj-$(CONFIG_SYSC_R8A7743) += r8a7743-sysc.o
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obj-$(CONFIG_SYSC_R8A7745) += r8a7745-sysc.o
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obj-$(CONFIG_SYSC_R8A77470) += r8a77470-sysc.o
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obj-$(CONFIG_SYSC_R8A774A1) += r8a774a1-sysc.o
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obj-$(CONFIG_SYSC_R8A774A3) += r8a774a3-sysc.o
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obj-$(CONFIG_SYSC_R8A774B1) += r8a774b1-sysc.o
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obj-$(CONFIG_SYSC_R8A774C0) += r8a774c0-sysc.o
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obj-$(CONFIG_SYSC_R8A774E1) += r8a774e1-sysc.o
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45
drivers/pmdomain/renesas/r8a774a3-sysc.c
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45
drivers/pmdomain/renesas/r8a774a3-sysc.c
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@ -0,0 +1,45 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Renesas RZ/G2M v3.0 System Controller
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* Copyright (C) 2026 Renesas Electronics Corp.
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*
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* Based on Renesas R-Car M3-W System Controller
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* Copyright (C) 2016 Glider bvba
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*/
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#include <linux/kernel.h>
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#include <dt-bindings/power/renesas,r8a774a3-sysc.h>
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#include "rcar-sysc.h"
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static const struct rcar_sysc_area r8a774a3_areas[] __initconst = {
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{ "always-on", 0, 0, R8A774A3_PD_ALWAYS_ON, -1, PD_ALWAYS_ON },
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{ "ca57-scu", 0x1c0, 0, R8A774A3_PD_CA57_SCU, R8A774A3_PD_ALWAYS_ON,
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PD_SCU },
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{ "ca57-cpu0", 0x80, 0, R8A774A3_PD_CA57_CPU0, R8A774A3_PD_CA57_SCU,
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PD_CPU_NOCR },
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{ "ca57-cpu1", 0x80, 1, R8A774A3_PD_CA57_CPU1, R8A774A3_PD_CA57_SCU,
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PD_CPU_NOCR },
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{ "ca53-scu", 0x140, 0, R8A774A3_PD_CA53_SCU, R8A774A3_PD_ALWAYS_ON,
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PD_SCU },
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{ "ca53-cpu0", 0x200, 0, R8A774A3_PD_CA53_CPU0, R8A774A3_PD_CA53_SCU,
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PD_CPU_NOCR },
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{ "ca53-cpu1", 0x200, 1, R8A774A3_PD_CA53_CPU1, R8A774A3_PD_CA53_SCU,
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PD_CPU_NOCR },
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{ "ca53-cpu2", 0x200, 2, R8A774A3_PD_CA53_CPU2, R8A774A3_PD_CA53_SCU,
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PD_CPU_NOCR },
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{ "ca53-cpu3", 0x200, 3, R8A774A3_PD_CA53_CPU3, R8A774A3_PD_CA53_SCU,
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PD_CPU_NOCR },
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{ "a3vc", 0x380, 0, R8A774A3_PD_A3VC, R8A774A3_PD_ALWAYS_ON },
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{ "a2vc1", 0x3c0, 1, R8A774A3_PD_A2VC1, R8A774A3_PD_A3VC },
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{ "3dg-a", 0x100, 0, R8A774A3_PD_3DG_A, R8A774A3_PD_ALWAYS_ON },
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{ "3dg-b", 0x100, 1, R8A774A3_PD_3DG_B, R8A774A3_PD_3DG_A },
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};
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const struct rcar_sysc_info r8a774a3_sysc_info __initconst = {
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.areas = r8a774a3_areas,
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.num_areas = ARRAY_SIZE(r8a774a3_areas),
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.extmask_offs = 0x2f8,
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.extmask_val = BIT(0),
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};
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@ -284,6 +284,9 @@ static const struct of_device_id rcar_sysc_matches[] __initconst = {
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#ifdef CONFIG_SYSC_R8A774A1
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{ .compatible = "renesas,r8a774a1-sysc", .data = &r8a774a1_sysc_info },
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#endif
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#ifdef CONFIG_SYSC_R8A774A3
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{ .compatible = "renesas,r8a774a3-sysc", .data = &r8a774a3_sysc_info },
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#endif
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#ifdef CONFIG_SYSC_R8A774B1
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{ .compatible = "renesas,r8a774b1-sysc", .data = &r8a774b1_sysc_info },
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#endif
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@ -61,6 +61,7 @@ extern const struct rcar_sysc_info r8a7743_sysc_info;
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extern const struct rcar_sysc_info r8a7745_sysc_info;
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extern const struct rcar_sysc_info r8a77470_sysc_info;
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extern const struct rcar_sysc_info r8a774a1_sysc_info;
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extern const struct rcar_sysc_info r8a774a3_sysc_info;
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extern const struct rcar_sysc_info r8a774b1_sysc_info;
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extern const struct rcar_sysc_info r8a774c0_sysc_info;
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extern const struct rcar_sysc_info r8a774e1_sysc_info;
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