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drm/amd/display: enable the new fast update path for supported ASICs

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The new fast update sequence is now supported on some ASICs. So, enable
it by default for all applicable ASICs.

Reviewed-by: Samson Tam <samson.tam@amd.com>
Acked-by: Hamza Mahfooz <hamza.mahfooz@amd.com>
Signed-off-by: Alvin Lee <alvin.lee2@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Alvin Lee 2023-06-06 17:51:32 -04:00 committed by Alex Deucher
parent 873bbf2da2
commit 724617b94b
4 changed files with 6 additions and 2 deletions
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3
drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c
View File

@ -725,7 +725,8 @@ static const struct dc_debug_options debug_defaults_drv = {
.dwb_fi_phase = -1, // -1 = disable,
.dmub_command_table = true,
.use_max_lb = true,
.exit_idle_opt_for_cursor_updates = true
.exit_idle_opt_for_cursor_updates = true,
.enable_legacy_fast_update = false,
};
static const struct dc_panel_config panel_config_defaults = {

3
drivers/gpu/drm/amd/display/dc/dcn302/dcn302_resource.c
View File

@ -95,7 +95,8 @@ static const struct dc_debug_options debug_defaults_drv = {
.dwb_fi_phase = -1, // -1 = disable,
.dmub_command_table = true,
.use_max_lb = true,
.exit_idle_opt_for_cursor_updates = true
.exit_idle_opt_for_cursor_updates = true,
.enable_legacy_fast_update = false,
};
static const struct dc_panel_config panel_config_defaults = {

1
drivers/gpu/drm/amd/display/dc/dcn32/dcn32_resource.c
View File

@ -732,6 +732,7 @@ static const struct dc_debug_options debug_defaults_drv = {
.disable_dp_plus_plus_wa = true,
.fpo_vactive_min_active_margin_us = 200,
.fpo_vactive_max_blank_us = 1000,
.enable_legacy_fast_update = false,
};
static struct dce_aux *dcn32_aux_engine_create(

1
drivers/gpu/drm/amd/display/dc/dcn321/dcn321_resource.c
View File

@ -730,6 +730,7 @@ static const struct dc_debug_options debug_defaults_drv = {
.disable_subvp_high_refresh = false,
.fpo_vactive_min_active_margin_us = 200,
.fpo_vactive_max_blank_us = 1000,
.enable_legacy_fast_update = false,
};
static struct dce_aux *dcn321_aux_engine_create(