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ASoC: NXP/Freescale: sort the reg_defaults tables

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Peter Ujfalusi <peter.ujfalusi@linux.intel.com> says:

reg_defaults must be sorted by ascending register address, since
regcache_lookup_reg() locates entries in it with bsearch().  When a table is
not sorted, bsearch() cannot find the entries which follow a descending step,
so regcache_reg_needs_sync() falls back to reporting that a sync is needed for
them.  Those registers are then written to the device on every regcache_sync()
even when they were never touched.

See commit fd80df352b ("regcache: Add support for sorting defaults arrays")
for the same problem in a different context.

The series is based on broonie/for-linus (05eebef3c7).

Affected tables:
  sgtl5000_reg_defaults    1 of 35 entries unreachable
  fsl_easrc_reg_defaults   3 of 120 entries unreachable

Link: https://patch.msgid.link/20260805122728.12362-1-peter.ujfalusi@linux.intel.com
This commit is contained in:
Mark Brown 2026-08-07 15:53:42 +01:00
commit 7225501594
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2 changed files with 4 additions and 4 deletions
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2
sound/soc/codecs/sgtl5000.c
View File

@ -56,8 +56,8 @@ static const struct reg_default sgtl5000_reg_defaults[] = {
{ SGTL5000_CHIP_PLL_CTRL, 0x5000 },
{ SGTL5000_CHIP_CLK_TOP_CTRL, 0x0000 },
{ SGTL5000_CHIP_ANA_STATUS, 0x0000 },
{ SGTL5000_CHIP_SHORT_CTRL, 0x0000 },
{ SGTL5000_CHIP_ANA_TEST2, 0x0000 },
{ SGTL5000_CHIP_SHORT_CTRL, 0x0000 },
{ SGTL5000_DAP_CTRL, 0x0000 },
{ SGTL5000_DAP_PEQ, 0x0000 },
{ SGTL5000_DAP_BASS_ENHANCE, 0x0040 },

6
sound/soc/fsl/fsl_easrc.c
View File

@ -1703,12 +1703,12 @@ static const struct reg_default fsl_easrc_reg_defaults[] = {
{REG_EASRC_SFS(2), 0x00000000},
{REG_EASRC_SFS(3), 0x00000000},
{REG_EASRC_RRL(0), 0x00000000},
{REG_EASRC_RRL(1), 0x00000000},
{REG_EASRC_RRL(2), 0x00000000},
{REG_EASRC_RRL(3), 0x00000000},
{REG_EASRC_RRH(0), 0x00000000},
{REG_EASRC_RRL(1), 0x00000000},
{REG_EASRC_RRH(1), 0x00000000},
{REG_EASRC_RRL(2), 0x00000000},
{REG_EASRC_RRH(2), 0x00000000},
{REG_EASRC_RRL(3), 0x00000000},
{REG_EASRC_RRH(3), 0x00000000},
{REG_EASRC_RUC(0), 0x00000000},
{REG_EASRC_RUC(1), 0x00000000},