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arm64: dts: rockchip: Enable USB for Khadas Edge 2L

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The Khadas Edge 2L board provides one USB 3.0 Host port and
one USB 2.0 port (connected via an internal hub). Enable the
corresponding DWC3 controllers and PHYs.

Signed-off-by: Gray Huang <gray.huang@wesion.com>
Link: https://patch.msgid.link/20260507033541.2576335-2-gray.huang@wesion.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This commit is contained in:
Gray Huang 2026-05-07 11:35:40 +08:00 committed by Heiko Stuebner
parent 8333fe46b0
commit 720fe68fd9
1 changed files with 47 additions and 0 deletions
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47
arch/arm64/boot/dts/rockchip/rk3576-khadas-edge-2l.dts
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@ -30,6 +30,29 @@ hdmi_con_in: endpoint {
};
};
vcc5v0_device: regulator-vcc5v0-device {
compatible = "regulator-fixed";
regulator-name = "vcc5v0_device";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
};
vcc5v0_host: regulator-vcc5v0-host {
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio2 RK_PD3 GPIO_ACTIVE_HIGH>;
regulator-name = "vcc5v0_host";
regulator-boot-on;
regulator-always-on;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
pinctrl-names = "default";
pinctrl-0 = <&usb_host_pwren>;
vin-supply = <&vcc5v0_device>;
};
vcc_sys: regulator-vcc5v0-sys {
compatible = "regulator-fixed";
regulator-name = "vcc_sys";
@ -78,6 +101,10 @@ &combphy0_ps {
status = "okay";
};
&combphy1_psu {
status = "okay";
};
&cpu_l0 {
cpu-supply = <&vdd_cpu_lit_s0>;
};
@ -531,6 +558,12 @@ pcie0_rst: pcie0-rst {
};
};
usb {
usb_host_pwren: usb-host-pwren {
rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
wifi {
wifi_reg_on: wifi-reg-on {
rockchip,pins = <4 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
@ -552,10 +585,24 @@ &sdhci {
status = "okay";
};
&u2phy1 {
status = "okay";
};
&u2phy1_otg {
phy-supply = <&vcc5v0_host>;
status = "okay";
};
&uart0 {
status = "okay";
};
&usb_drd1_dwc3 {
dr_mode = "host";
status = "okay";
};
&vop {
status = "okay";
};