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ACPI: CPPC: Add support for CPPC v4
CPPC v4 (ACPI 6.6, Section 8.4.6) adds two optional entries to the _CPC package: 1. OSPM Nominal Performance (8.4.6.1.2.6): A write-only register that lets OSPM inform the platform what it considers nominal performance. The platform classifies performance above this level as boost and below as throttle for its power/thermal decisions. 2. Resource Priority (8.4.6.1.2.7): A Package of Resource Priority Register Descriptor sub-packages that allow OSPM to set relative priority among processors for shared resources (boost, throttle, L2/L3 cache, memory bandwidth). Parsing the full structure is not yet supported; such entries are marked as unsupported. Add v4 _CPC table parsing (25 entries) and update REG_OPTIONAL to mark the two new registers as optional. Signed-off-by: Sumit Gupta <sumitg@nvidia.com> Reviewed-by: Mario Limonciello (AMD) <superm1@kernel.org> Reviewed-by: Pierre Gondois <pierre.gondois@arm.com> Link: https://patch.msgid.link/20260527194626.185286-2-sumitg@nvidia.com Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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@ -134,7 +134,7 @@ static DEFINE_PER_CPU(struct cpc_desc *, cpc_desc_ptr);
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* cpc_regs[] with the corresponding index. 0 means mandatory and 1
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* cpc_regs[] with the corresponding index. 0 means mandatory and 1
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* means optional.
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* means optional.
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*/
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*/
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#define REG_OPTIONAL (0x1FC7D0)
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#define REG_OPTIONAL (0x7FC7D0)
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/*
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/*
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* Use the index of the register in per-cpu cpc_regs[] to check if
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* Use the index of the register in per-cpu cpc_regs[] to check if
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@ -751,18 +751,19 @@ int acpi_cppc_processor_probe(struct acpi_processor *pr)
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/*
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/*
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* Disregard _CPC if the number of entries in the return package is not
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* Disregard _CPC if the number of entries in the return package is not
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* as expected, but support future revisions being proper supersets of
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* as expected, but support future revisions being proper supersets of
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* the v3 and only causing more entries to be returned by _CPC.
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* the v4 and only causing more entries to be returned by _CPC.
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*/
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*/
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if ((cpc_rev == CPPC_V2_REV && num_ent != CPPC_V2_NUM_ENT) ||
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if ((cpc_rev == CPPC_V2_REV && num_ent != CPPC_V2_NUM_ENT) ||
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(cpc_rev == CPPC_V3_REV && num_ent != CPPC_V3_NUM_ENT) ||
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(cpc_rev == CPPC_V3_REV && num_ent != CPPC_V3_NUM_ENT) ||
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(cpc_rev > CPPC_V3_REV && num_ent <= CPPC_V3_NUM_ENT)) {
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(cpc_rev == CPPC_V4_REV && num_ent != CPPC_V4_NUM_ENT) ||
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(cpc_rev > CPPC_V4_REV && num_ent <= CPPC_V4_NUM_ENT)) {
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pr_debug("Unexpected number of _CPC return package entries (%d) for CPU:%d\n",
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pr_debug("Unexpected number of _CPC return package entries (%d) for CPU:%d\n",
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num_ent, pr->id);
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num_ent, pr->id);
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goto out_free;
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goto out_free;
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}
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}
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if (cpc_rev > CPPC_V3_REV) {
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if (cpc_rev > CPPC_V4_REV) {
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num_ent = CPPC_V3_NUM_ENT;
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num_ent = CPPC_V4_NUM_ENT;
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cpc_rev = CPPC_V3_REV;
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cpc_rev = CPPC_V4_REV;
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}
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}
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cpc_ptr->num_entries = num_ent;
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cpc_ptr->num_entries = num_ent;
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@ -845,6 +846,16 @@ int acpi_cppc_processor_probe(struct acpi_processor *pr)
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cpc_ptr->cpc_regs[i-2].type = ACPI_TYPE_BUFFER;
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cpc_ptr->cpc_regs[i-2].type = ACPI_TYPE_BUFFER;
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memcpy(&cpc_ptr->cpc_regs[i-2].cpc_entry.reg, gas_t, sizeof(*gas_t));
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memcpy(&cpc_ptr->cpc_regs[i-2].cpc_entry.reg, gas_t, sizeof(*gas_t));
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} else if (cpc_obj->type == ACPI_TYPE_PACKAGE && (i - 2) == RESOURCE_PRIORITY) {
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/*
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* ACPI 6.6, s8.4.6.1.2.7 defines Resource Priority as a
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* Package of Resource Priority Register Descriptor sub-packages.
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* Parsing the full structure is not yet supported.
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* Mark the register as unsupported for now.
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*/
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pr_debug("CPU:%d Resource Priority not supported\n", pr->id);
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cpc_ptr->cpc_regs[i-2].type = ACPI_TYPE_INTEGER;
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cpc_ptr->cpc_regs[i-2].cpc_entry.int_value = 0;
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} else {
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} else {
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pr_debug("Invalid entry type (%d) in _CPC for CPU:%d\n",
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pr_debug("Invalid entry type (%d) in _CPC for CPU:%d\n",
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i, pr->id);
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i, pr->id);
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@ -17,16 +17,18 @@
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#include <acpi/pcc.h>
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#include <acpi/pcc.h>
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#include <acpi/processor.h>
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#include <acpi/processor.h>
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/* CPPCv2 and CPPCv3 support */
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/* CPPCv2, CPPCv3 and CPPCv4 support */
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#define CPPC_V2_REV 2
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#define CPPC_V2_REV 2
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#define CPPC_V3_REV 3
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#define CPPC_V3_REV 3
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#define CPPC_V4_REV 4
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#define CPPC_V2_NUM_ENT 21
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#define CPPC_V2_NUM_ENT 21
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#define CPPC_V3_NUM_ENT 23
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#define CPPC_V3_NUM_ENT 23
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#define CPPC_V4_NUM_ENT 25
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#define PCC_CMD_COMPLETE_MASK (1 << 0)
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#define PCC_CMD_COMPLETE_MASK (1 << 0)
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#define PCC_ERROR_MASK (1 << 2)
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#define PCC_ERROR_MASK (1 << 2)
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#define MAX_CPC_REG_ENT 21
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#define MAX_CPC_REG_ENT 23
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/* CPPC specific PCC commands. */
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/* CPPC specific PCC commands. */
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#define CMD_READ 0
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#define CMD_READ 0
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@ -109,6 +111,8 @@ enum cppc_regs {
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REFERENCE_PERF,
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REFERENCE_PERF,
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LOWEST_FREQ,
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LOWEST_FREQ,
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NOMINAL_FREQ,
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NOMINAL_FREQ,
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OSPM_NOMINAL_PERF,
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RESOURCE_PRIORITY,
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};
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};
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/*
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/*
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