github-mirror/linux
1
0
Fork 0
mirror of https://github.com/torvalds/linux.git synced 2026-09-22 20:54:03 +02:00
Code Issues Actions Packages Projects Releases Wiki Activity Graph

drm/amd/pm: drop unused smu pptable callbacks

Browse Source 
struct pptable_funcs still carries callback slots that no longer have
call paths, drop the following unused callback slots:

- baco_get_state()
- baco_set_state()
- set_power_state()
- get_clock_by_type_with_voltage()
- set_azalia_d3_pme()

Signed-off-by: Yang Wang <kevinyang.wang@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Yang Wang 2026-06-24 13:47:18 +08:00 committed by Alex Deucher
parent afd7c94353
commit 719f83f3c6
11 changed files with 0 additions and 54 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

29
drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
View File

@ -849,8 +849,6 @@ struct pptable_funcs {
*/
int (*set_default_dpm_table)(struct smu_context *smu);
int (*set_power_state)(struct smu_context *smu);
/**
* @populate_umd_state_clk: Populate the UMD power state table with
* defaults.
@ -903,16 +901,6 @@ struct pptable_funcs {
struct
pp_clock_levels_with_latency
*clocks);
/**
* @get_clock_by_type_with_voltage: Get the speed and voltage of a clock
* domain.
*/
int (*get_clock_by_type_with_voltage)(struct smu_context *smu,
enum amd_pp_clock_type type,
struct
pp_clock_levels_with_voltage
*clocks);
/**
* @get_power_profile_mode: Print all power profile modes to
* buffer. Star current mode.
@ -1354,11 +1342,6 @@ struct pptable_funcs {
*/
int (*register_irq_handler)(struct smu_context *smu);
/**
* @set_azalia_d3_pme: Wake the audio decode engine from d3 sleep.
*/
int (*set_azalia_d3_pme)(struct smu_context *smu);
/**
* @get_max_sustainable_clocks_by_dc: Get a copy of the max sustainable
* clock speeds table.
@ -1375,18 +1358,6 @@ struct pptable_funcs {
*/
int (*get_bamaco_support)(struct smu_context *smu);
/**
* @baco_get_state: Get the current BACO state.
*
* Return: Current BACO state.
*/
enum smu_baco_state (*baco_get_state)(struct smu_context *smu);
/**
* @baco_set_state: Enter/exit BACO.
*/
int (*baco_set_state)(struct smu_context *smu, enum smu_baco_state state);
/**
* @baco_enter: Enter BACO.
*/

2
drivers/gpu/drm/amd/pm/swsmu/inc/smu_v11_0.h
View File

@ -199,8 +199,6 @@ int smu_v11_0_gfx_off_control(struct smu_context *smu, bool enable);
int smu_v11_0_register_irq_handler(struct smu_context *smu);
int smu_v11_0_set_azalia_d3_pme(struct smu_context *smu);
int smu_v11_0_get_max_sustainable_clocks_by_dc(struct smu_context *smu,
struct pp_smu_nv_clock_table *max_clocks);

2
drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h
View File

@ -180,8 +180,6 @@ int smu_v13_0_gfx_off_control(struct smu_context *smu, bool enable);
int smu_v13_0_register_irq_handler(struct smu_context *smu);
int smu_v13_0_set_azalia_d3_pme(struct smu_context *smu);
int smu_v13_0_get_max_sustainable_clocks_by_dc(struct smu_context *smu,
struct pp_smu_nv_clock_table *max_clocks);

1
drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c
View File

@ -1933,7 +1933,6 @@ static const struct pptable_funcs arcturus_ppt_funcs = {
.set_xgmi_pstate = smu_v11_0_set_xgmi_pstate,
.gfx_off_control = smu_v11_0_gfx_off_control,
.register_irq_handler = smu_v11_0_register_irq_handler,
.set_azalia_d3_pme = smu_v11_0_set_azalia_d3_pme,
.get_max_sustainable_clocks_by_dc = smu_v11_0_get_max_sustainable_clocks_by_dc,
.get_bamaco_support = smu_v11_0_get_bamaco_support,
.baco_enter = smu_v11_0_baco_enter,

1
drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
View File

@ -3338,7 +3338,6 @@ static const struct pptable_funcs navi10_ppt_funcs = {
.set_xgmi_pstate = smu_v11_0_set_xgmi_pstate,
.gfx_off_control = smu_v11_0_gfx_off_control,
.register_irq_handler = smu_v11_0_register_irq_handler,
.set_azalia_d3_pme = smu_v11_0_set_azalia_d3_pme,
.get_max_sustainable_clocks_by_dc = smu_v11_0_get_max_sustainable_clocks_by_dc,
.get_bamaco_support = smu_v11_0_get_bamaco_support,
.baco_enter = navi10_baco_enter,

1
drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
View File

@ -3145,7 +3145,6 @@ static const struct pptable_funcs sienna_cichlid_ppt_funcs = {
.set_xgmi_pstate = smu_v11_0_set_xgmi_pstate,
.gfx_off_control = smu_v11_0_gfx_off_control,
.register_irq_handler = smu_v11_0_register_irq_handler,
.set_azalia_d3_pme = smu_v11_0_set_azalia_d3_pme,
.get_max_sustainable_clocks_by_dc = smu_v11_0_get_max_sustainable_clocks_by_dc,
.get_bamaco_support = smu_v11_0_get_bamaco_support,
.baco_enter = sienna_cichlid_baco_enter,

5
drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c
View File

@ -1417,11 +1417,6 @@ int smu_v11_0_get_max_sustainable_clocks_by_dc(struct smu_context *smu,
return 0;
}
int smu_v11_0_set_azalia_d3_pme(struct smu_context *smu)
{
return smu_cmn_send_smc_msg(smu, SMU_MSG_BacoAudioD3PME, NULL);
}
int smu_v11_0_baco_set_armd3_sequence(struct smu_context *smu,
enum smu_baco_seq baco_seq)
{

1
drivers/gpu/drm/amd/pm/swsmu/smu12/renoir_ppt.c
View File

@ -1444,7 +1444,6 @@ static int renoir_get_enabled_mask(struct smu_context *smu,
}
static const struct pptable_funcs renoir_ppt_funcs = {
.set_power_state = NULL,
.emit_clk_levels = renoir_emit_clk_levels,
.get_current_power_state = renoir_get_current_power_state,
.dpm_set_vcn_enable = renoir_dpm_set_vcn_enable,

1
drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c
View File

@ -2004,7 +2004,6 @@ static const struct pptable_funcs aldebaran_ppt_funcs = {
.disable_thermal_alert = smu_v13_0_disable_thermal_alert,
.set_xgmi_pstate = smu_v13_0_set_xgmi_pstate,
.register_irq_handler = smu_v13_0_register_irq_handler,
.set_azalia_d3_pme = smu_v13_0_set_azalia_d3_pme,
.get_max_sustainable_clocks_by_dc = smu_v13_0_get_max_sustainable_clocks_by_dc,
.get_bamaco_support = aldebaran_get_bamaco_support,
.get_dpm_ultimate_freq = aldebaran_get_dpm_ultimate_freq,

9
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c
View File

@ -1320,15 +1320,6 @@ int smu_v13_0_get_max_sustainable_clocks_by_dc(struct smu_context *smu,
return 0;
}
int smu_v13_0_set_azalia_d3_pme(struct smu_context *smu)
{
int ret = 0;
ret = smu_cmn_send_smc_msg(smu, SMU_MSG_BacoAudioD3PME, NULL);
return ret;
}
static int smu_v13_0_wait_for_reset_complete(struct smu_context *smu,
uint64_t event_arg)
{

2
drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c
View File

@ -2890,8 +2890,6 @@ static const struct pptable_funcs smu_v14_0_2_ppt_funcs = {
.deep_sleep_control = smu_v14_0_deep_sleep_control,
.gfx_ulv_control = smu_v14_0_gfx_ulv_control,
.get_bamaco_support = smu_v14_0_get_bamaco_support,
.baco_get_state = smu_v14_0_baco_get_state,
.baco_set_state = smu_v14_0_baco_set_state,
.baco_enter = smu_v14_0_2_baco_enter,
.baco_exit = smu_v14_0_2_baco_exit,
.mode1_reset_is_support = smu_v14_0_2_is_mode1_reset_supported,