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phy: lynx-28g: common probe() and remove()
Factor the device-agnostic logic from lynx_28g_probe() and lynx_28g_remove() into lynx_probe() and lynx_remove() inside phy-fsl-lynx-core.c. These will be shared with the 10G Lynx driver. Since the PLL configuration, lane configuration and CDR lock detection procedure are going to be different, introduce lynx_info function pointers so that this code remains in the 28G Lynx driver. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Link: https://patch.msgid.link/20260610151952.2141019-11-vladimir.oltean@nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
This commit is contained in:
Vladimir Oltean
Vinod Koul
parent
b1c4d866ed
commit
719a2da392
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@ -12,7 +12,6 @@
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#include "phy-fsl-lynx-core.h"
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#define LYNX_28G_NUM_LANE 8
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#define LYNX_28G_NUM_PLL LYNX_NUM_PLL
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/* SoC IP wrapper for protocol converters */
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#define PCC8 0x10a0
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@ -781,6 +780,30 @@ static bool lynx_28g_compat_lane_supports_mode(int lane,
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}
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}
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static void lynx_28g_cdr_lock_check(struct lynx_lane *lane)
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{
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u32 rrstctl;
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int err;
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rrstctl = lynx_28g_lane_read(lane, LNaRRSTCTL);
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if (!!(rrstctl & LNaRRSTCTL_CDR_LOCK))
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return;
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lynx_28g_lane_rmw(lane, LNaRRSTCTL, LNaRRSTCTL_RST_REQ,
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LNaRRSTCTL_RST_REQ);
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err = read_poll_timeout(lynx_28g_lane_read, rrstctl,
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!!(rrstctl & LNaRRSTCTL_RST_DONE),
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LYNX_28G_LANE_RESET_SLEEP_US,
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LYNX_28G_LANE_RESET_TIMEOUT_US,
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false, lane, LNaRRSTCTL);
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if (err) {
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dev_warn_once(&lane->phy->dev,
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"Lane %c receiver reset failed: %pe\n",
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'A' + lane->id, ERR_PTR(err));
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}
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}
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static void lynx_28g_lane_remap_pll(struct lynx_lane *lane,
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enum lynx_lane_mode lane_mode)
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{
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@ -1088,50 +1111,6 @@ static void lynx_28g_pll_read_configuration(struct lynx_pll *pll)
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}
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}
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#define work_to_lynx(w) container_of((w), struct lynx_28g_priv, cdr_check.work)
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static void lynx_28g_cdr_lock_check(struct work_struct *work)
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{
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struct lynx_28g_priv *priv = work_to_lynx(work);
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struct lynx_28g_lane *lane;
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u32 rrstctl;
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int err, i;
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for (i = priv->info->first_lane; i < LYNX_28G_NUM_LANE; i++) {
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lane = &priv->lane[i];
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if (!lane->phy)
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continue;
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mutex_lock(&lane->phy->mutex);
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if (!lane->init || !lane->powered_up) {
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mutex_unlock(&lane->phy->mutex);
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continue;
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}
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rrstctl = lynx_28g_lane_read(lane, LNaRRSTCTL);
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if (!(rrstctl & LNaRRSTCTL_CDR_LOCK)) {
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lynx_28g_lane_rmw(lane, LNaRRSTCTL, LNaRRSTCTL_RST_REQ,
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LNaRRSTCTL_RST_REQ);
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err = read_poll_timeout(lynx_28g_lane_read, rrstctl,
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!!(rrstctl & LNaRRSTCTL_RST_DONE),
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LYNX_28G_LANE_RESET_SLEEP_US,
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LYNX_28G_LANE_RESET_TIMEOUT_US,
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false, lane, LNaRRSTCTL);
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if (err) {
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dev_warn_once(&lane->phy->dev,
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"Lane %c receiver reset failed: %pe\n",
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'A' + lane->id, ERR_PTR(err));
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}
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}
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mutex_unlock(&lane->phy->mutex);
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}
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queue_delayed_work(system_power_efficient_wq, &priv->cdr_check,
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msecs_to_jiffies(1000));
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}
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static void lynx_28g_lane_read_configuration(struct lynx_28g_lane *lane)
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{
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u32 pccr, pss, protocol;
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@ -1157,49 +1136,13 @@ static void lynx_28g_lane_read_configuration(struct lynx_28g_lane *lane)
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}
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}
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static struct phy *lynx_28g_xlate(struct device *dev,
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const struct of_phandle_args *args)
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{
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struct lynx_28g_priv *priv = dev_get_drvdata(dev);
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int idx;
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if (args->args_count == 0)
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return of_phy_simple_xlate(dev, args);
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else if (args->args_count != 1)
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return ERR_PTR(-ENODEV);
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idx = args->args[0];
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if (WARN_ON(idx >= LYNX_28G_NUM_LANE ||
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idx < priv->info->first_lane))
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return ERR_PTR(-EINVAL);
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return priv->lane[idx].phy ?: ERR_PTR(-ENODEV);
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}
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static int lynx_28g_probe_lane(struct lynx_28g_priv *priv, int id,
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struct device_node *dn)
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{
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struct lynx_28g_lane *lane = &priv->lane[id];
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struct phy *phy;
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phy = devm_phy_create(priv->dev, dn, &lynx_28g_ops);
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if (IS_ERR(phy))
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return PTR_ERR(phy);
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lane->priv = priv;
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lane->phy = phy;
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lane->id = id;
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phy_set_drvdata(phy, lane);
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lynx_28g_lane_read_configuration(lane);
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return 0;
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}
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static const struct lynx_info lynx_info_compat = {
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.get_pccr = lynx_28g_get_pccr,
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.get_pcvt_offset = lynx_28g_get_pcvt_offset,
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.lane_supports_mode = lynx_28g_compat_lane_supports_mode,
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.pll_read_configuration = lynx_28g_pll_read_configuration,
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.lane_read_configuration = lynx_28g_lane_read_configuration,
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.cdr_lock_check = lynx_28g_cdr_lock_check,
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.num_lanes = LYNX_28G_NUM_LANE,
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};
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@ -1207,6 +1150,9 @@ static const struct lynx_info lynx_info_lx2160a_serdes1 = {
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.get_pccr = lynx_28g_get_pccr,
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.get_pcvt_offset = lynx_28g_get_pcvt_offset,
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.lane_supports_mode = lx2160a_serdes1_lane_supports_mode,
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.pll_read_configuration = lynx_28g_pll_read_configuration,
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.lane_read_configuration = lynx_28g_lane_read_configuration,
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.cdr_lock_check = lynx_28g_cdr_lock_check,
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.num_lanes = LYNX_28G_NUM_LANE,
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};
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@ -1214,6 +1160,9 @@ static const struct lynx_info lynx_info_lx2160a_serdes2 = {
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.get_pccr = lynx_28g_get_pccr,
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.get_pcvt_offset = lynx_28g_get_pcvt_offset,
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.lane_supports_mode = lx2160a_serdes2_lane_supports_mode,
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.pll_read_configuration = lynx_28g_pll_read_configuration,
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.lane_read_configuration = lynx_28g_lane_read_configuration,
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.cdr_lock_check = lynx_28g_cdr_lock_check,
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.num_lanes = LYNX_28G_NUM_LANE,
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};
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@ -1221,6 +1170,9 @@ static const struct lynx_info lynx_info_lx2160a_serdes3 = {
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.get_pccr = lynx_28g_get_pccr,
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.get_pcvt_offset = lynx_28g_get_pcvt_offset,
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.lane_supports_mode = lx2160a_serdes3_lane_supports_mode,
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.pll_read_configuration = lynx_28g_pll_read_configuration,
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.lane_read_configuration = lynx_28g_lane_read_configuration,
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.cdr_lock_check = lynx_28g_cdr_lock_check,
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.num_lanes = LYNX_28G_NUM_LANE,
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};
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@ -1228,6 +1180,9 @@ static const struct lynx_info lynx_info_lx2162a_serdes1 = {
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.get_pccr = lynx_28g_get_pccr,
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.get_pcvt_offset = lynx_28g_get_pcvt_offset,
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.lane_supports_mode = lx2162a_serdes1_lane_supports_mode,
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.pll_read_configuration = lynx_28g_pll_read_configuration,
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.lane_read_configuration = lynx_28g_lane_read_configuration,
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.cdr_lock_check = lynx_28g_cdr_lock_check,
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.first_lane = 4,
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.num_lanes = LYNX_28G_NUM_LANE,
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};
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@ -1236,112 +1191,26 @@ static const struct lynx_info lynx_info_lx2162a_serdes2 = {
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.get_pccr = lynx_28g_get_pccr,
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.get_pcvt_offset = lynx_28g_get_pcvt_offset,
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.lane_supports_mode = lx2162a_serdes2_lane_supports_mode,
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.pll_read_configuration = lynx_28g_pll_read_configuration,
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.lane_read_configuration = lynx_28g_lane_read_configuration,
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.cdr_lock_check = lynx_28g_cdr_lock_check,
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.num_lanes = LYNX_28G_NUM_LANE,
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};
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static int lynx_28g_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct phy_provider *provider;
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struct lynx_28g_priv *priv;
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struct device_node *dn;
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int err;
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dn = dev_of_node(dev);
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if (!dn) {
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dev_err(dev, "Device requires an OF node\n");
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return -EINVAL;
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}
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priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
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if (!priv)
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return -ENOMEM;
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priv->dev = dev;
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priv->info = of_device_get_match_data(dev);
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if (!priv->info)
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return -ENODEV;
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dev_set_drvdata(dev, priv);
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spin_lock_init(&priv->pcc_lock);
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INIT_DELAYED_WORK(&priv->cdr_check, lynx_28g_cdr_lock_check);
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const struct lynx_info *info;
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/*
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* If we get here it means we probed on a device tree where
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* "fsl,lynx-28g" wasn't the fallback, but the sole compatible string.
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*/
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if (priv->info == &lynx_info_compat)
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info = of_device_get_match_data(dev);
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if (info == &lynx_info_compat)
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dev_warn(dev, "Please update device tree to use per-device compatible strings\n");
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priv->lane = devm_kcalloc(dev, priv->info->num_lanes,
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sizeof(*priv->lane), GFP_KERNEL);
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if (!priv->lane)
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return -ENOMEM;
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priv->base = devm_platform_ioremap_resource(pdev, 0);
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if (IS_ERR(priv->base))
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return PTR_ERR(priv->base);
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for (int i = 0; i < LYNX_28G_NUM_PLL; i++) {
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struct lynx_28g_pll *pll = &priv->pll[i];
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pll->priv = priv;
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pll->id = i;
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lynx_28g_pll_read_configuration(pll);
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}
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if (of_get_child_count(dn)) {
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struct device_node *child;
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for_each_available_child_of_node(dn, child) {
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u32 reg;
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/* PHY subnode name must be 'phy'. */
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if (!(of_node_name_eq(child, "phy")))
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continue;
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if (of_property_read_u32(child, "reg", ®)) {
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dev_err(dev, "No \"reg\" property for %pOF\n", child);
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of_node_put(child);
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return -EINVAL;
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}
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if (reg < priv->info->first_lane || reg >= LYNX_28G_NUM_LANE) {
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dev_err(dev, "\"reg\" property out of range for %pOF\n", child);
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of_node_put(child);
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return -EINVAL;
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}
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err = lynx_28g_probe_lane(priv, reg, child);
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if (err) {
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of_node_put(child);
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return err;
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}
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}
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} else {
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for (int i = priv->info->first_lane; i < LYNX_28G_NUM_LANE; i++) {
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err = lynx_28g_probe_lane(priv, i, NULL);
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if (err)
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return err;
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}
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}
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provider = devm_of_phy_provider_register(dev, lynx_28g_xlate);
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if (IS_ERR(provider))
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return PTR_ERR(provider);
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queue_delayed_work(system_power_efficient_wq, &priv->cdr_check,
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msecs_to_jiffies(1000));
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return 0;
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}
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static void lynx_28g_remove(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct lynx_28g_priv *priv = dev_get_drvdata(dev);
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cancel_delayed_work_sync(&priv->cdr_check);
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return lynx_probe(pdev, info, &lynx_28g_ops);
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}
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static const struct of_device_id lynx_28g_of_match_table[] = {
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@ -1357,7 +1226,7 @@ MODULE_DEVICE_TABLE(of, lynx_28g_of_match_table);
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static struct platform_driver lynx_28g_driver = {
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.probe = lynx_28g_probe,
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.remove = lynx_28g_remove,
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.remove = lynx_remove,
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.driver = {
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.name = "lynx-28g",
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.of_match_table = lynx_28g_of_match_table,
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@ -2,6 +2,7 @@
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/* Copyright 2025-2026 NXP */
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include "phy-fsl-lynx-core.h"
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@ -202,5 +203,174 @@ int lynx_pcvt_rmw(struct lynx_lane *lane, enum lynx_lane_mode mode, int cr,
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}
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EXPORT_SYMBOL_NS_GPL(lynx_pcvt_rmw, "PHY_FSL_LYNX");
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#define work_to_lynx(w) container_of((w), struct lynx_priv, cdr_check.work)
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static void lynx_cdr_lock_check(struct work_struct *work)
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{
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struct lynx_priv *priv = work_to_lynx(work);
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struct lynx_lane *lane;
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for (int i = priv->info->first_lane; i < priv->info->num_lanes; i++) {
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lane = &priv->lane[i];
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if (!lane->phy)
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continue;
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mutex_lock(&lane->phy->mutex);
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if (!lane->init || !lane->powered_up) {
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mutex_unlock(&lane->phy->mutex);
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continue;
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}
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priv->info->cdr_lock_check(lane);
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mutex_unlock(&lane->phy->mutex);
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}
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queue_delayed_work(system_power_efficient_wq, &priv->cdr_check,
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msecs_to_jiffies(1000));
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}
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static struct phy *lynx_xlate(struct device *dev,
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const struct of_phandle_args *args)
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{
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struct lynx_priv *priv = dev_get_drvdata(dev);
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int idx;
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if (args->args_count == 0)
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return of_phy_simple_xlate(dev, args);
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else if (args->args_count != 1)
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return ERR_PTR(-ENODEV);
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idx = args->args[0];
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if (WARN_ON(idx >= priv->info->num_lanes ||
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idx < priv->info->first_lane))
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return ERR_PTR(-EINVAL);
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return priv->lane[idx].phy ?: ERR_PTR(-ENODEV);
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}
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static int lynx_probe_lane(struct lynx_priv *priv, int id,
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struct device_node *dn,
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const struct phy_ops *phy_ops)
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{
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struct lynx_lane *lane = &priv->lane[id];
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struct phy *phy;
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phy = devm_phy_create(priv->dev, dn, phy_ops);
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if (IS_ERR(phy))
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return PTR_ERR(phy);
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lane->priv = priv;
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lane->phy = phy;
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lane->id = id;
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phy_set_drvdata(phy, lane);
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priv->info->lane_read_configuration(lane);
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return 0;
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}
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int lynx_probe(struct platform_device *pdev, const struct lynx_info *info,
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const struct phy_ops *phy_ops)
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{
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struct device *dev = &pdev->dev;
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struct phy_provider *provider;
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struct device_node *dn;
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struct lynx_priv *priv;
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int err;
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dn = dev_of_node(dev);
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if (!dn) {
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dev_err(dev, "Device requires an OF node\n");
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return -EINVAL;
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}
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if (!info)
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return -ENODEV;
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priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
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if (!priv)
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return -ENOMEM;
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priv->dev = dev;
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priv->info = info;
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dev_set_drvdata(dev, priv);
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spin_lock_init(&priv->pcc_lock);
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INIT_DELAYED_WORK(&priv->cdr_check, lynx_cdr_lock_check);
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priv->lane = devm_kcalloc(dev, priv->info->num_lanes,
|
||||
sizeof(*priv->lane), GFP_KERNEL);
|
||||
if (!priv->lane)
|
||||
return -ENOMEM;
|
||||
|
||||
priv->base = devm_platform_ioremap_resource(pdev, 0);
|
||||
if (IS_ERR(priv->base))
|
||||
return PTR_ERR(priv->base);
|
||||
|
||||
for (int i = 0; i < LYNX_NUM_PLL; i++) {
|
||||
struct lynx_pll *pll = &priv->pll[i];
|
||||
|
||||
pll->priv = priv;
|
||||
pll->id = i;
|
||||
priv->info->pll_read_configuration(pll);
|
||||
}
|
||||
|
||||
if (of_get_child_count(dn)) {
|
||||
struct device_node *child;
|
||||
|
||||
for_each_available_child_of_node(dn, child) {
|
||||
u32 reg;
|
||||
|
||||
/* PHY subnode name must be 'phy'. */
|
||||
if (!(of_node_name_eq(child, "phy")))
|
||||
continue;
|
||||
|
||||
if (of_property_read_u32(child, "reg", ®)) {
|
||||
dev_err(dev, "No \"reg\" property for %pOF\n", child);
|
||||
of_node_put(child);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
if (reg < priv->info->first_lane || reg >= priv->info->num_lanes) {
|
||||
dev_err(dev, "\"reg\" property out of range for %pOF\n", child);
|
||||
of_node_put(child);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
err = lynx_probe_lane(priv, reg, child, phy_ops);
|
||||
if (err) {
|
||||
of_node_put(child);
|
||||
return err;
|
||||
}
|
||||
}
|
||||
} else {
|
||||
for (int i = priv->info->first_lane; i < priv->info->num_lanes; i++) {
|
||||
err = lynx_probe_lane(priv, i, NULL, phy_ops);
|
||||
if (err)
|
||||
return err;
|
||||
}
|
||||
}
|
||||
|
||||
provider = devm_of_phy_provider_register(dev, lynx_xlate);
|
||||
if (IS_ERR(provider))
|
||||
return PTR_ERR(provider);
|
||||
|
||||
queue_delayed_work(system_power_efficient_wq, &priv->cdr_check,
|
||||
msecs_to_jiffies(1000));
|
||||
|
||||
return 0;
|
||||
}
|
||||
EXPORT_SYMBOL_NS_GPL(lynx_probe, "PHY_FSL_LYNX");
|
||||
|
||||
void lynx_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct device *dev = &pdev->dev;
|
||||
struct lynx_priv *priv = dev_get_drvdata(dev);
|
||||
|
||||
cancel_delayed_work_sync(&priv->cdr_check);
|
||||
}
|
||||
EXPORT_SYMBOL_NS_GPL(lynx_remove, "PHY_FSL_LYNX");
|
||||
|
||||
MODULE_LICENSE("GPL");
|
||||
MODULE_DESCRIPTION("Freescale Lynx SerDes core functionality");
|
||||
|
|
|
|||
|
|
@ -10,14 +10,15 @@
|
|||
|
||||
#define LYNX_NUM_PLL 2
|
||||
|
||||
struct lynx_priv;
|
||||
struct lynx_lane;
|
||||
|
||||
struct lynx_pccr {
|
||||
int offset;
|
||||
int width;
|
||||
int shift;
|
||||
};
|
||||
|
||||
struct lynx_priv;
|
||||
|
||||
struct lynx_pll {
|
||||
struct lynx_priv *priv;
|
||||
int id;
|
||||
|
|
@ -42,6 +43,9 @@ struct lynx_info {
|
|||
struct lynx_pccr *pccr);
|
||||
int (*get_pcvt_offset)(int lane, enum lynx_lane_mode mode);
|
||||
bool (*lane_supports_mode)(int lane, enum lynx_lane_mode mode);
|
||||
void (*pll_read_configuration)(struct lynx_pll *pll);
|
||||
void (*lane_read_configuration)(struct lynx_lane *lane);
|
||||
void (*cdr_lock_check)(struct lynx_lane *lane);
|
||||
int first_lane;
|
||||
int num_lanes;
|
||||
};
|
||||
|
|
@ -85,6 +89,10 @@ static inline void lynx_rmw(struct lynx_priv *priv, unsigned long off, u32 val,
|
|||
#define lynx_pll_read(pll, reg) \
|
||||
ioread32((pll)->priv->base + reg((pll)->id))
|
||||
|
||||
int lynx_probe(struct platform_device *pdev, const struct lynx_info *info,
|
||||
const struct phy_ops *phy_ops);
|
||||
void lynx_remove(struct platform_device *pdev);
|
||||
|
||||
const char *lynx_lane_mode_str(enum lynx_lane_mode lane_mode);
|
||||
enum lynx_lane_mode phy_interface_to_lane_mode(phy_interface_t intf);
|
||||
bool lynx_lane_supports_mode(struct lynx_lane *lane, enum lynx_lane_mode mode);
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user