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arm64: dts: rockchip: add GPU powerdomain, opps, and cooling to rk3328
Add GPU powerdomain, opp-table, and cooling map nodes for the Mali GPU on the RK3328 SoC. Opp-table frequencies are sourced from the Rockchip Linux v4.4 vendor kernel while voltages have been derived from practical use and support work: keeping voltage above 1075mV and disabling the 500MHz opp-point avoids instability and crashes. Signed-off-by: Alex Bee <knaerzche@gmail.com> Signed-off-by: Christian Hewitt <christianshewitt@gmail.com> Tested-by: Diederik de Haas <didi.debian@cknow.org> # Rock64 Link: https://lore.kernel.org/r/20250906120810.1833016-1-christianshewitt@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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@ -331,6 +331,11 @@ power: power-controller {
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#address-cells = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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#size-cells = <0>;
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power-domain@RK3328_PD_GPU {
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reg = <RK3328_PD_GPU>;
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clocks = <&cru ACLK_GPU>;
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#power-domain-cells = <0>;
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};
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power-domain@RK3328_PD_HEVC {
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power-domain@RK3328_PD_HEVC {
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reg = <RK3328_PD_HEVC>;
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reg = <RK3328_PD_HEVC>;
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clocks = <&cru SCLK_VENC_CORE>;
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clocks = <&cru SCLK_VENC_CORE>;
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@ -570,9 +575,13 @@ map0 {
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<&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
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<&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
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contribution = <4096>;
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contribution = <4096>;
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};
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};
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map1 {
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trip = <&target>;
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cooling-device = <&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
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contribution = <4096>;
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};
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};
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};
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};
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};
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};
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};
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tsadc: tsadc@ff250000 {
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tsadc: tsadc@ff250000 {
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@ -651,7 +660,36 @@ gpu: gpu@ff300000 {
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"ppmmu1";
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"ppmmu1";
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clocks = <&cru ACLK_GPU>, <&cru ACLK_GPU>;
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clocks = <&cru ACLK_GPU>, <&cru ACLK_GPU>;
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clock-names = "bus", "core";
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clock-names = "bus", "core";
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operating-points-v2 = <&gpu_opp_table>;
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power-domains = <&power RK3328_PD_GPU>;
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resets = <&cru SRST_GPU_A>;
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resets = <&cru SRST_GPU_A>;
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#cooling-cells = <2>;
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};
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gpu_opp_table: opp-table-gpu {
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compatible = "operating-points-v2";
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opp-200000000 {
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opp-hz = /bits/ 64 <200000000>;
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opp-microvolt = <1075000>;
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};
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opp-300000000 {
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opp-hz = /bits/ 64 <300000000>;
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opp-microvolt = <1075000>;
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};
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opp-400000000 {
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opp-hz = /bits/ 64 <400000000>;
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opp-microvolt = <1075000>;
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};
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opp-500000000 {
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/* causes stability issues */
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opp-hz = /bits/ 64 <500000000>;
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opp-microvolt = <1150000>;
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status = "disabled";
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};
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};
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};
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h265e_mmu: iommu@ff330200 {
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h265e_mmu: iommu@ff330200 {
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