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dt-bindings: pinctrl: tegra238: add missing AON pin groups
Add 24 pin groups, and their matching drive groups, on ports EE, FF,
GG and HH to the Tegra238 AON pinmux binding. These groups are present
on the AON pin controller, so device trees that mux these pins through
it validate against the schema.
Fixes: 9323f8a0e1 ("dt-bindings: pinctrl: Document Tegra238 pin controllers")
Signed-off-by: Prathamesh Shete <pshete@nvidia.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Linus Walleij <linusw@kernel.org>
This commit is contained in:
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@ -38,8 +38,16 @@ patternProperties:
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gen2_i2c_sda_pdd0, gen8_i2c_scl_pdd1,
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gen8_i2c_sda_pdd2, touch_clk_pdd3, dmic1_clk_pdd4,
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dmic1_dat_pdd5, soc_gpio19_pdd6, pwm2_pdd7,
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pwm3_pee0, pwm7_pee1,
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# drive groups (ordered PAA, PBB, PCC, PDD, PEE)
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pwm3_pee0, pwm7_pee1, soc_gpio49_pee2,
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soc_gpio82_pee3, soc_gpio50_pee4, soc_gpio83_pee5,
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soc_gpio69_pff0, soc_gpio70_pff1, soc_gpio71_pff2,
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soc_gpio72_pff3, soc_gpio73_pff4, soc_gpio74_pff5,
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soc_gpio80_pff6, soc_gpio76_pff7, soc_gpio77_pgg0,
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soc_gpio84_pgg1, uart2_tx_pgg2, uart2_rx_pgg3,
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uart2_rts_pgg4, uart2_cts_pgg5, soc_gpio85_pgg6,
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uart5_tx_pgg7, uart5_rx_phh0, uart5_rts_phh1,
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uart5_cts_phh2, soc_gpio86_phh3,
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# drive groups (ordered PAA, PBB, PCC, PDD, PEE, PFF, PGG, PHH)
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drive_bootv_ctl_n_paa0, drive_soc_gpio00_paa1,
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drive_vcomp_alert_paa2, drive_pwm1_paa3,
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drive_batt_oc_paa4, drive_soc_gpio04_paa5,
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@ -53,7 +61,19 @@ patternProperties:
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drive_gen8_i2c_sda_pdd2, drive_touch_clk_pdd3,
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drive_dmic1_clk_pdd4, drive_dmic1_dat_pdd5,
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drive_soc_gpio19_pdd6, drive_pwm2_pdd7,
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drive_pwm3_pee0, drive_pwm7_pee1 ]
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drive_pwm3_pee0, drive_pwm7_pee1,
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drive_soc_gpio49_pee2, drive_soc_gpio50_pee4,
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drive_soc_gpio82_pee3, drive_soc_gpio71_pff2,
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drive_soc_gpio76_pff7, drive_soc_gpio74_pff5,
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drive_soc_gpio86_phh3, drive_soc_gpio72_pff3,
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drive_soc_gpio77_pgg0, drive_soc_gpio80_pff6,
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drive_soc_gpio84_pgg1, drive_soc_gpio83_pee5,
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drive_soc_gpio73_pff4, drive_soc_gpio70_pff1,
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drive_soc_gpio85_pgg6, drive_soc_gpio69_pff0,
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drive_uart5_tx_pgg7, drive_uart5_rx_phh0,
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drive_uart2_tx_pgg2, drive_uart2_rx_pgg3,
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drive_uart2_cts_pgg5, drive_uart2_rts_pgg4,
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drive_uart5_cts_phh2, drive_uart5_rts_phh1 ]
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required:
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- compatible
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