Renesas R-Mobile A1 Coresight Clock DT Binding Definitions

ZT trace bus and ZTR trace clock DT binding definitions for the Renesas
 R-Mobile A1 (R8A7740) SoC, shared by driver and DT source files.
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Merge tag 'renesas-r8a7740-dt-binding-defs-tag1' into renesas-clk-for-v7.2

Renesas R-Mobile A1 Coresight Clock DT Binding Definitions

ZT trace bus and ZTR trace clock DT binding definitions for the Renesas
R-Mobile A1 (R8A7740) SoC, shared by driver and DT source files.

Documentation/devicetree/bindings/clock/renesas,cpg-clocks.yaml

@@ -41,7 +41,7 @@ properties:
 
   clock-output-names:
     minItems: 3
-    maxItems: 17
+    maxItems: 19
 
   renesas,mode:
     description: Board-specific settings of the MD_CK* bits on R-Mobile A1
@@ -123,6 +123,8 @@ allOf:
             - const: zb
             - const: m3
             - const: cp
+            - const: ztr
+            - const: zt
 
       required:
         - renesas,mode
@@ -240,6 +242,6 @@ examples:
             #clock-cells = <1>;
             clock-output-names = "system", "pllc0", "pllc1", "pllc2", "r",
                                  "usb24s", "i", "zg", "b", "m1", "hp", "hpp",
-                                 "usbp", "s", "zb", "m3", "cp";
+                                 "usbp", "s", "zb", "m3", "cp", "ztr", "zt";
             renesas,mode = <0x05>;
     };

include/dt-bindings/clock/r8a7740-clock.h

@@ -24,6 +24,8 @@
 #define R8A7740_CLK_ZB		14
 #define R8A7740_CLK_M3		15
 #define R8A7740_CLK_CP		16
+#define R8A7740_CLK_ZTR		17
+#define R8A7740_CLK_ZT		18
 
 /* MSTP1 */
 #define R8A7740_CLK_CEU21	28