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media: qcom: camss: Add common TPG support
Introduce a new common Test Pattern Generator (TPG) implementation for Qualcomm CAMSS. This module provides a generic interface for pattern generation that can be reused by multiple platforms. Unlike CSID-integrated TPG, this TPG acts as a standalone block that emulates both CSIPHY and sensor behavior, enabling flexible test patterns without external hardware. Signed-off-by: Wenmeng Liu <wenmeng.liu@oss.qualcomm.com> Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Tested-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> # Dell Inpsiron14p Signed-off-by: Bryan O'Donoghue <bod@kernel.org>
This commit is contained in:
Wenmeng Liu
Bryan O'Donoghue
parent
f1db681090
commit
70b193987c
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@ -10,10 +10,13 @@ qcom-camss-objs += \
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camss-csid-680.o \
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camss-csid-gen2.o \
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camss-csid-gen3.o \
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camss-csiphy.o \
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camss-csiphy-2ph-1-0.o \
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camss-csiphy-3ph-1-0.o \
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camss-csiphy.o \
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camss-format.o \
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camss-ispif.o \
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camss-tpg.o \
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camss-vfe.o \
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camss-vfe-4-1.o \
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camss-vfe-4-7.o \
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camss-vfe-4-8.o \
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@ -21,11 +24,9 @@ qcom-camss-objs += \
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camss-vfe-340.o \
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camss-vfe-480.o \
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camss-vfe-680.o \
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camss-vfe-gen3.o \
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camss-vfe-gen1.o \
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camss-vfe-gen3.o \
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camss-vfe-vbif.o \
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camss-vfe.o \
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camss-video.o \
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camss-format.o \
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camss-video.o
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obj-$(CONFIG_VIDEO_QCOM_CAMSS) += qcom-camss.o
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519
drivers/media/platform/qcom/camss/camss-tpg.c
Normal file
519
drivers/media/platform/qcom/camss/camss-tpg.c
Normal file
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@ -0,0 +1,519 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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*
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* Qualcomm MSM Camera Subsystem - TPG Module
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*
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* Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
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*/
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#include <linux/clk.h>
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#include <linux/io.h>
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#include <linux/kernel.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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#include <linux/pm_runtime.h>
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#include <media/media-entity.h>
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#include <media/v4l2-device.h>
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#include <media/v4l2-subdev.h>
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#include <media/mipi-csi2.h>
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#include "camss-tpg.h"
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#include "camss.h"
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static const struct tpg_format_info formats_gen1[] = {
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{
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MEDIA_BUS_FMT_SBGGR8_1X8,
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MIPI_CSI2_DT_RAW8,
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ENCODE_FORMAT_UNCOMPRESSED_8_BIT,
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8,
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},
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{
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MEDIA_BUS_FMT_SGBRG8_1X8,
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MIPI_CSI2_DT_RAW8,
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ENCODE_FORMAT_UNCOMPRESSED_8_BIT,
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8,
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},
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{
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MEDIA_BUS_FMT_SGRBG8_1X8,
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MIPI_CSI2_DT_RAW8,
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ENCODE_FORMAT_UNCOMPRESSED_8_BIT,
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8,
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},
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{
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MEDIA_BUS_FMT_SRGGB8_1X8,
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MIPI_CSI2_DT_RAW8,
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ENCODE_FORMAT_UNCOMPRESSED_8_BIT,
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8,
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},
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{
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MEDIA_BUS_FMT_SBGGR10_1X10,
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MIPI_CSI2_DT_RAW10,
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ENCODE_FORMAT_UNCOMPRESSED_10_BIT,
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10,
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},
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{
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MEDIA_BUS_FMT_SGBRG10_1X10,
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MIPI_CSI2_DT_RAW10,
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ENCODE_FORMAT_UNCOMPRESSED_10_BIT,
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10,
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},
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{
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MEDIA_BUS_FMT_SGRBG10_1X10,
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MIPI_CSI2_DT_RAW10,
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ENCODE_FORMAT_UNCOMPRESSED_10_BIT,
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10,
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},
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{
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MEDIA_BUS_FMT_SRGGB10_1X10,
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MIPI_CSI2_DT_RAW10,
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ENCODE_FORMAT_UNCOMPRESSED_10_BIT,
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10,
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},
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{
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MEDIA_BUS_FMT_SBGGR12_1X12,
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MIPI_CSI2_DT_RAW12,
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ENCODE_FORMAT_UNCOMPRESSED_12_BIT,
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12,
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},
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{
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MEDIA_BUS_FMT_SGBRG12_1X12,
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MIPI_CSI2_DT_RAW12,
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ENCODE_FORMAT_UNCOMPRESSED_12_BIT,
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12,
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},
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{
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MEDIA_BUS_FMT_SGRBG12_1X12,
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MIPI_CSI2_DT_RAW12,
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ENCODE_FORMAT_UNCOMPRESSED_12_BIT,
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12,
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},
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{
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MEDIA_BUS_FMT_SRGGB12_1X12,
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MIPI_CSI2_DT_RAW12,
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ENCODE_FORMAT_UNCOMPRESSED_12_BIT,
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12,
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},
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{
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MEDIA_BUS_FMT_Y8_1X8,
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MIPI_CSI2_DT_RAW8,
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ENCODE_FORMAT_UNCOMPRESSED_8_BIT,
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8,
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},
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{
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MEDIA_BUS_FMT_Y10_1X10,
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MIPI_CSI2_DT_RAW10,
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ENCODE_FORMAT_UNCOMPRESSED_10_BIT,
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10,
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},
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};
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const struct tpg_formats tpg_formats_gen1 = {
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.nformats = ARRAY_SIZE(formats_gen1),
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.formats = formats_gen1
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};
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const struct tpg_format_info *tpg_get_fmt_entry(const struct tpg_format_info *formats,
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unsigned int nformats,
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u32 code)
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{
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unsigned int i;
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for (i = 0; i < nformats; i++)
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if (code == formats[i].code)
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return &formats[i];
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return ERR_PTR(-EINVAL);
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}
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static int tpg_set_clock_rates(struct tpg_device *tpg)
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{
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struct device *dev = tpg->camss->dev;
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int i, ret;
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for (i = 0; i < tpg->nclocks; i++) {
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struct camss_clock *clock = &tpg->clock[i];
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long round_rate;
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if (clock->freq) {
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round_rate = clk_round_rate(clock->clk, clock->freq[0]);
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if (round_rate < 0) {
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dev_err(dev, "clk round rate failed: %ld\n",
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round_rate);
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return -EINVAL;
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}
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ret = clk_set_rate(clock->clk, round_rate);
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if (ret < 0) {
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dev_err(dev, "clk set rate failed: %d\n", ret);
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return ret;
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}
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}
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}
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return 0;
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}
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static int tpg_set_power(struct v4l2_subdev *sd, int on)
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{
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struct tpg_device *tpg = v4l2_get_subdevdata(sd);
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struct device *dev = tpg->camss->dev;
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if (on) {
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int ret;
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ret = pm_runtime_resume_and_get(dev);
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if (ret < 0)
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return ret;
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ret = tpg_set_clock_rates(tpg);
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if (ret < 0) {
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pm_runtime_put_sync(dev);
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return ret;
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}
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ret = camss_enable_clocks(tpg->nclocks, tpg->clock, dev);
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if (ret < 0) {
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pm_runtime_put_sync(dev);
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return ret;
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}
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tpg->res->hw_ops->reset(tpg);
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tpg->res->hw_ops->hw_version(tpg);
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} else {
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camss_disable_clocks(tpg->nclocks, tpg->clock);
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pm_runtime_put_sync(dev);
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}
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return 0;
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}
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static int tpg_set_stream(struct v4l2_subdev *sd, int enable)
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{
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struct tpg_device *tpg = v4l2_get_subdevdata(sd);
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int ret;
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if (enable) {
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ret = v4l2_ctrl_handler_setup(&tpg->ctrls);
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if (ret < 0) {
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dev_err(tpg->camss->dev,
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"could not sync v4l2 controls: %d\n", ret);
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return ret;
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}
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}
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return tpg->res->hw_ops->configure_stream(tpg, enable);
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}
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static struct v4l2_mbus_framefmt *
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__tpg_get_format(struct tpg_device *tpg,
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struct v4l2_subdev_state *sd_state,
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unsigned int pad,
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enum v4l2_subdev_format_whence which)
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{
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if (which == V4L2_SUBDEV_FORMAT_TRY)
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return v4l2_subdev_state_get_format(sd_state,
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pad);
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return &tpg->fmt;
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}
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static void tpg_try_format(struct tpg_device *tpg,
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struct v4l2_mbus_framefmt *fmt)
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{
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unsigned int i;
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for (i = 0; i < tpg->res->formats->nformats; i++)
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if (tpg->res->formats->formats[i].code == fmt->code)
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break;
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if (i >= tpg->res->formats->nformats)
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fmt->code = MEDIA_BUS_FMT_SBGGR8_1X8;
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fmt->width = clamp_t(u32, fmt->width, TPG_MIN_WIDTH, TPG_MAX_WIDTH);
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fmt->height = clamp_t(u32, fmt->height, TPG_MIN_HEIGHT, TPG_MAX_HEIGHT);
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fmt->field = V4L2_FIELD_NONE;
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fmt->colorspace = V4L2_COLORSPACE_SRGB;
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}
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static int tpg_enum_mbus_code(struct v4l2_subdev *sd,
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struct v4l2_subdev_state *sd_state,
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struct v4l2_subdev_mbus_code_enum *code)
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{
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struct tpg_device *tpg = v4l2_get_subdevdata(sd);
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if (code->index >= tpg->res->formats->nformats)
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return -EINVAL;
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code->code = tpg->res->formats->formats[code->index].code;
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return 0;
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}
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static int tpg_enum_frame_size(struct v4l2_subdev *sd,
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struct v4l2_subdev_state *sd_state,
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struct v4l2_subdev_frame_size_enum *fse)
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{
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struct tpg_device *tpg = v4l2_get_subdevdata(sd);
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unsigned int i;
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if (fse->index != 0)
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return -EINVAL;
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for (i = 0; i < tpg->res->formats->nformats; i++)
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if (tpg->res->formats->formats[i].code == fse->code)
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break;
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if (i >= tpg->res->formats->nformats)
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return -EINVAL;
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fse->min_width = TPG_MIN_WIDTH;
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fse->min_height = TPG_MIN_HEIGHT;
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fse->max_width = TPG_MAX_WIDTH;
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fse->max_height = TPG_MAX_HEIGHT;
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return 0;
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}
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static int tpg_get_format(struct v4l2_subdev *sd,
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struct v4l2_subdev_state *sd_state,
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struct v4l2_subdev_format *fmt)
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{
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struct tpg_device *tpg = v4l2_get_subdevdata(sd);
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struct v4l2_mbus_framefmt *format;
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format = __tpg_get_format(tpg, sd_state, fmt->pad, fmt->which);
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if (!format)
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return -EINVAL;
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fmt->format = *format;
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return 0;
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}
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static int tpg_set_format(struct v4l2_subdev *sd,
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struct v4l2_subdev_state *sd_state,
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struct v4l2_subdev_format *fmt)
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{
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struct tpg_device *tpg = v4l2_get_subdevdata(sd);
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struct v4l2_mbus_framefmt *format;
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format = __tpg_get_format(tpg, sd_state, fmt->pad, fmt->which);
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if (!format)
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return -EINVAL;
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tpg_try_format(tpg, &fmt->format);
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*format = fmt->format;
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return 0;
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}
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static int tpg_init_formats(struct v4l2_subdev *sd,
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struct v4l2_subdev_fh *fh)
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{
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struct v4l2_subdev_format format = {
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.pad = MSM_TPG_PAD_SRC,
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.which = fh ? V4L2_SUBDEV_FORMAT_TRY :
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V4L2_SUBDEV_FORMAT_ACTIVE,
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.format = {
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.code = MEDIA_BUS_FMT_SBGGR8_1X8,
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.width = 1920,
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.height = 1080,
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}
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};
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return tpg_set_format(sd, fh ? fh->state : NULL, &format);
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}
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static int tpg_s_ctrl(struct v4l2_ctrl *ctrl)
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{
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struct tpg_device *tpg = container_of(ctrl->handler,
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struct tpg_device, ctrls);
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int ret = -EINVAL;
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switch (ctrl->id) {
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case V4L2_CID_TEST_PATTERN:
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ret = tpg->res->hw_ops->configure_testgen_pattern(tpg, ctrl->val);
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break;
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}
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return ret;
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}
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static const struct v4l2_ctrl_ops tpg_ctrl_ops = {
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.s_ctrl = tpg_s_ctrl,
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};
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int msm_tpg_subdev_init(struct camss *camss,
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struct tpg_device *tpg,
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const struct camss_subdev_resources *res, u8 id)
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{
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struct platform_device *pdev;
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struct device *dev;
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int i, j;
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dev = camss->dev;
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pdev = to_platform_device(dev);
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tpg->camss = camss;
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tpg->id = id;
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tpg->res = &res->tpg;
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tpg->res->hw_ops->subdev_init(tpg);
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tpg->base = devm_platform_ioremap_resource_byname(pdev, res->reg[0]);
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if (IS_ERR(tpg->base))
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return PTR_ERR(tpg->base);
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tpg->nclocks = 0;
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while (res->clock[tpg->nclocks])
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tpg->nclocks++;
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if (!tpg->nclocks)
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return 0;
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tpg->clock = devm_kcalloc(dev, tpg->nclocks,
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sizeof(*tpg->clock), GFP_KERNEL);
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if (!tpg->clock)
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return -ENOMEM;
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for (i = 0; i < tpg->nclocks; i++) {
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struct camss_clock *clock = &tpg->clock[i];
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clock->clk = devm_clk_get(dev, res->clock[i]);
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if (IS_ERR(clock->clk))
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return PTR_ERR(clock->clk);
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clock->name = res->clock[i];
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clock->nfreqs = 0;
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while (res->clock_rate[i][clock->nfreqs])
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clock->nfreqs++;
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if (!clock->nfreqs) {
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clock->freq = NULL;
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continue;
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}
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clock->freq = devm_kcalloc(dev, clock->nfreqs,
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sizeof(*clock->freq), GFP_KERNEL);
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if (!clock->freq)
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return -ENOMEM;
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for (j = 0; j < clock->nfreqs; j++)
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clock->freq[j] = res->clock_rate[i][j];
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}
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return 0;
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}
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static int tpg_link_setup(struct media_entity *entity,
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const struct media_pad *local,
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const struct media_pad *remote, u32 flags)
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{
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if (flags & MEDIA_LNK_FL_ENABLED)
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if (media_pad_remote_pad_first(local))
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return -EBUSY;
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return 0;
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}
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static const struct v4l2_subdev_core_ops tpg_core_ops = {
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.s_power = tpg_set_power,
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};
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static const struct v4l2_subdev_video_ops tpg_video_ops = {
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.s_stream = tpg_set_stream,
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};
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static const struct v4l2_subdev_pad_ops tpg_pad_ops = {
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.enum_mbus_code = tpg_enum_mbus_code,
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.enum_frame_size = tpg_enum_frame_size,
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.get_fmt = tpg_get_format,
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.set_fmt = tpg_set_format,
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};
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|
||||
static const struct v4l2_subdev_ops tpg_v4l2_ops = {
|
||||
.core = &tpg_core_ops,
|
||||
.video = &tpg_video_ops,
|
||||
.pad = &tpg_pad_ops,
|
||||
};
|
||||
|
||||
static const struct v4l2_subdev_internal_ops tpg_v4l2_internal_ops = {
|
||||
.open = tpg_init_formats,
|
||||
};
|
||||
|
||||
static const struct media_entity_operations tpg_media_ops = {
|
||||
.link_setup = tpg_link_setup,
|
||||
.link_validate = v4l2_subdev_link_validate,
|
||||
};
|
||||
|
||||
int msm_tpg_register_entity(struct tpg_device *tpg,
|
||||
struct v4l2_device *v4l2_dev)
|
||||
{
|
||||
struct v4l2_subdev *sd = &tpg->subdev;
|
||||
struct device *dev = tpg->camss->dev;
|
||||
int ret;
|
||||
|
||||
v4l2_subdev_init(sd, &tpg_v4l2_ops);
|
||||
sd->internal_ops = &tpg_v4l2_internal_ops;
|
||||
sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE |
|
||||
V4L2_SUBDEV_FL_HAS_EVENTS;
|
||||
snprintf(sd->name, ARRAY_SIZE(sd->name), "%s%d",
|
||||
"msm_tpg", tpg->id);
|
||||
sd->grp_id = TPG_GRP_ID;
|
||||
v4l2_set_subdevdata(sd, tpg);
|
||||
|
||||
ret = v4l2_ctrl_handler_init(&tpg->ctrls, 1);
|
||||
if (ret < 0) {
|
||||
dev_err(dev, "Failed to init ctrl handler: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
tpg->testgen_mode = v4l2_ctrl_new_std_menu_items(&tpg->ctrls,
|
||||
&tpg_ctrl_ops, V4L2_CID_TEST_PATTERN,
|
||||
tpg->testgen.nmodes, 0, 0,
|
||||
tpg->testgen.modes);
|
||||
if (tpg->ctrls.error) {
|
||||
dev_err(dev, "Failed to init ctrl: %d\n", tpg->ctrls.error);
|
||||
ret = tpg->ctrls.error;
|
||||
goto free_ctrl;
|
||||
}
|
||||
|
||||
tpg->subdev.ctrl_handler = &tpg->ctrls;
|
||||
|
||||
ret = tpg_init_formats(sd, NULL);
|
||||
if (ret < 0) {
|
||||
dev_err(dev, "Failed to init format: %d\n", ret);
|
||||
goto free_ctrl;
|
||||
}
|
||||
|
||||
tpg->pad.flags = MEDIA_PAD_FL_SOURCE;
|
||||
|
||||
sd->entity.ops = &tpg_media_ops;
|
||||
ret = media_entity_pads_init(&sd->entity, 1, &tpg->pad);
|
||||
if (ret < 0) {
|
||||
dev_err(dev, "Failed to init media entity: %d\n", ret);
|
||||
goto free_ctrl;
|
||||
}
|
||||
|
||||
ret = v4l2_device_register_subdev(v4l2_dev, sd);
|
||||
if (ret < 0) {
|
||||
dev_err(dev, "Failed to register subdev: %d\n", ret);
|
||||
media_entity_cleanup(&sd->entity);
|
||||
goto free_ctrl;
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
||||
free_ctrl:
|
||||
v4l2_ctrl_handler_free(&tpg->ctrls);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
void msm_tpg_unregister_entity(struct tpg_device *tpg)
|
||||
{
|
||||
v4l2_device_unregister_subdev(&tpg->subdev);
|
||||
media_entity_cleanup(&tpg->subdev.entity);
|
||||
v4l2_ctrl_handler_free(&tpg->ctrls);
|
||||
}
|
||||
118
drivers/media/platform/qcom/camss/camss-tpg.h
Normal file
118
drivers/media/platform/qcom/camss/camss-tpg.h
Normal file
|
|
@ -0,0 +1,118 @@
|
|||
/* SPDX-License-Identifier: GPL-2.0 */
|
||||
/*
|
||||
* camss-tpg.h
|
||||
*
|
||||
* Qualcomm MSM Camera Subsystem - TPG Module
|
||||
*
|
||||
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||
*/
|
||||
#ifndef QC_MSM_CAMSS_TPG_H
|
||||
#define QC_MSM_CAMSS_TPG_H
|
||||
|
||||
#include <linux/clk.h>
|
||||
#include <linux/bitfield.h>
|
||||
#include <media/media-entity.h>
|
||||
#include <media/v4l2-ctrls.h>
|
||||
#include <media/v4l2-device.h>
|
||||
#include <media/v4l2-mediabus.h>
|
||||
#include <media/v4l2-subdev.h>
|
||||
|
||||
#define ENCODE_FORMAT_UNCOMPRESSED_8_BIT 0x1
|
||||
#define ENCODE_FORMAT_UNCOMPRESSED_10_BIT 0x2
|
||||
#define ENCODE_FORMAT_UNCOMPRESSED_12_BIT 0x3
|
||||
#define ENCODE_FORMAT_UNCOMPRESSED_14_BIT 0x4
|
||||
#define ENCODE_FORMAT_UNCOMPRESSED_16_BIT 0x5
|
||||
#define ENCODE_FORMAT_UNCOMPRESSED_20_BIT 0x6
|
||||
#define ENCODE_FORMAT_UNCOMPRESSED_24_BIT 0x7
|
||||
|
||||
#define MSM_TPG_PAD_SRC 0
|
||||
#define MSM_TPG_ACTIVE_VC 0
|
||||
#define MSM_TPG_ACTIVE_DT 0
|
||||
|
||||
#define TPG_MIN_WIDTH 1
|
||||
#define TPG_MIN_HEIGHT 1
|
||||
#define TPG_MAX_WIDTH 8191
|
||||
#define TPG_MAX_HEIGHT 8191
|
||||
|
||||
#define TPG_GRP_ID 0
|
||||
|
||||
enum tpg_testgen_mode {
|
||||
TPG_PAYLOAD_MODE_DISABLED = 0,
|
||||
TPG_PAYLOAD_MODE_INCREMENTING = 1,
|
||||
TPG_PAYLOAD_MODE_ALTERNATING_55_AA = 2,
|
||||
TPG_PAYLOAD_MODE_RANDOM = 5,
|
||||
TPG_PAYLOAD_MODE_USER_SPECIFIED = 6,
|
||||
TPG_PAYLOAD_MODE_COLOR_BARS = 9,
|
||||
TPG_PAYLOAD_MODE_NUM_SUPPORTED_GEN1 = 9,
|
||||
};
|
||||
|
||||
struct tpg_testgen_config {
|
||||
enum tpg_testgen_mode mode;
|
||||
const char * const*modes;
|
||||
u8 nmodes;
|
||||
};
|
||||
|
||||
struct tpg_format_info {
|
||||
u32 code;
|
||||
u8 data_type;
|
||||
u8 encode_format;
|
||||
u8 bpp;
|
||||
};
|
||||
|
||||
struct tpg_formats {
|
||||
unsigned int nformats;
|
||||
const struct tpg_format_info *formats;
|
||||
};
|
||||
|
||||
struct tpg_device;
|
||||
|
||||
struct tpg_hw_ops {
|
||||
int (*configure_stream)(struct tpg_device *tpg, u8 enable);
|
||||
int (*configure_testgen_pattern)(struct tpg_device *tpg, s32 val);
|
||||
u32 (*hw_version)(struct tpg_device *tpg);
|
||||
int (*reset)(struct tpg_device *tpg);
|
||||
void (*subdev_init)(struct tpg_device *tpg);
|
||||
};
|
||||
|
||||
struct tpg_subdev_resources {
|
||||
u8 lane_cnt;
|
||||
const struct tpg_formats *formats;
|
||||
const struct tpg_hw_ops *hw_ops;
|
||||
};
|
||||
|
||||
struct tpg_device {
|
||||
struct camss *camss;
|
||||
u8 id;
|
||||
struct v4l2_subdev subdev;
|
||||
struct media_pad pad;
|
||||
void __iomem *base;
|
||||
struct camss_clock *clock;
|
||||
int nclocks;
|
||||
struct tpg_testgen_config testgen;
|
||||
struct v4l2_mbus_framefmt fmt;
|
||||
struct v4l2_ctrl_handler ctrls;
|
||||
struct v4l2_ctrl *testgen_mode;
|
||||
const struct tpg_subdev_resources *res;
|
||||
u32 hw_version;
|
||||
};
|
||||
|
||||
struct camss_subdev_resources;
|
||||
|
||||
const struct tpg_format_info *tpg_get_fmt_entry(const struct tpg_format_info *formats,
|
||||
unsigned int nformats,
|
||||
u32 code);
|
||||
|
||||
int msm_tpg_subdev_init(struct camss *camss,
|
||||
struct tpg_device *tpg,
|
||||
const struct camss_subdev_resources *res, u8 id);
|
||||
|
||||
int msm_tpg_register_entity(struct tpg_device *tpg,
|
||||
struct v4l2_device *v4l2_dev);
|
||||
|
||||
void msm_tpg_unregister_entity(struct tpg_device *tpg);
|
||||
|
||||
extern const struct tpg_formats tpg_formats_gen1;
|
||||
|
||||
extern const struct tpg_hw_ops tpg_ops_gen1;
|
||||
|
||||
#endif /* QC_MSM_CAMSS_TPG_H */
|
||||
|
|
@ -21,6 +21,7 @@
|
|||
#include "camss-csid.h"
|
||||
#include "camss-csiphy.h"
|
||||
#include "camss-ispif.h"
|
||||
#include "camss-tpg.h"
|
||||
#include "camss-vfe.h"
|
||||
#include "camss-format.h"
|
||||
|
||||
|
|
@ -52,6 +53,7 @@ struct camss_subdev_resources {
|
|||
char *interrupt[CAMSS_RES_MAX];
|
||||
union {
|
||||
struct csiphy_subdev_resources csiphy;
|
||||
struct tpg_subdev_resources tpg;
|
||||
struct csid_subdev_resources csid;
|
||||
struct vfe_subdev_resources vfe;
|
||||
};
|
||||
|
|
@ -106,6 +108,7 @@ struct camss_resources {
|
|||
enum camss_version version;
|
||||
const char *pd_name;
|
||||
const struct camss_subdev_resources *csiphy_res;
|
||||
const struct camss_subdev_resources *tpg_res;
|
||||
const struct camss_subdev_resources *csid_res;
|
||||
const struct camss_subdev_resources *ispif_res;
|
||||
const struct camss_subdev_resources *vfe_res;
|
||||
|
|
@ -113,6 +116,7 @@ struct camss_resources {
|
|||
const struct resources_icc *icc_res;
|
||||
const unsigned int icc_path_num;
|
||||
const unsigned int csiphy_num;
|
||||
const unsigned int tpg_num;
|
||||
const unsigned int csid_num;
|
||||
const unsigned int vfe_num;
|
||||
};
|
||||
|
|
@ -123,6 +127,7 @@ struct camss {
|
|||
struct media_device media_dev;
|
||||
struct device *dev;
|
||||
struct csiphy_device *csiphy;
|
||||
struct tpg_device *tpg;
|
||||
struct csid_device *csid;
|
||||
struct ispif_device *ispif;
|
||||
struct vfe_device *vfe;
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user