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drm/amd/display: Fix white screen on boot with OLED panel

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[Why]
During mode change, replay_event_general_ui may remain set on the old
stream while replay_event_hw_programming is set. This can re-enable
Replay too early before hardware programming is complete.

[How]
Clear replay_event_general_ui in the mode-change path when setting
replay_event_hw_programming to keep Replay blocked until programming
finishes, avoiding white screen on OLED panels after boot.

Reviewed-by: Sunpeng Li <sunpeng.li@amd.com>
Signed-off-by: Ray Wu <ray.wu@amd.com>
Signed-off-by: James Lin <pinglei.lin@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Ray Wu 2026-04-23 15:06:12 +08:00 committed by Alex Deucher
parent 4be20905ba
commit 70840d7000
1 changed files with 14 additions and 2 deletions
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16
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
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@ -10090,8 +10090,6 @@ static void amdgpu_dm_enable_self_refresh(struct amdgpu_display_manager *dm,
amdgpu_dm_psr_set_event(dm, acrtc_state->stream, false,
psr_event_hw_programming, false);
amdgpu_dm_replay_set_event(dm, acrtc_state->stream, true,
replay_event_general_ui, true);
amdgpu_dm_replay_set_event(dm, acrtc_state->stream, false,
replay_event_hw_programming, false);
}
@ -10620,6 +10618,8 @@ static void amdgpu_dm_mod_power_update_streams(struct drm_atomic_commit *state,
psr_event_hw_programming, true);
amdgpu_dm_replay_set_event(dm, dm_old_crtc_state->stream, true,
replay_event_hw_programming, true);
amdgpu_dm_replay_set_event(dm, dm_old_crtc_state->stream, false,
replay_event_general_ui, false);
}
}
@ -10673,6 +10673,18 @@ static void amdgpu_dm_mod_power_setup_streams(struct drm_atomic_commit *state,
mod_power_notify_mode_change(dm->power_module,
dm_new_crtc_state->stream,
false);
/*
* Block PSR / Replay on the new stream until display settles post-modeset.
* These events will be cleared by amdgpu_dm_enable_self_refresh() once
* allow_sr_entry becomes true.
*/
amdgpu_dm_psr_set_event(dm, dm_new_crtc_state->stream, true,
psr_event_hw_programming, true);
amdgpu_dm_replay_set_event(dm, dm_new_crtc_state->stream, true,
replay_event_hw_programming | replay_event_general_ui,
true);
}
}