From 7071ae1d8a7623e4a83ada61f7e68761f6bef0e0 Mon Sep 17 00:00:00 2001 From: Junhui Liu Date: Sun, 18 Jan 2026 22:25:07 +0800 Subject: [PATCH] riscv: dts: canaan: k230: Add "b" ISA extension "b" is ratified (Apr/2024) much later than its components zba/zbb/zbs (Jun/2021). With "b" added into riscv/extensions.yaml, a dependency checking rule is now enforced, which requires that when zba, zbb, and zbs are all specified, "b" must be added as well. Failing to do this will cause dtbs_check schema check warnings. According to uabi.rst, as a single-letter extension, "b" should be added after "c" in canonical order. Update k230.dtsi to conform to this rule. Also synchronize "riscv,isa" with "riscv,isa-extensions". Signed-off-by: Junhui Liu Signed-off-by: Conor Dooley --- arch/riscv/boot/dts/canaan/k230.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/riscv/boot/dts/canaan/k230.dtsi b/arch/riscv/boot/dts/canaan/k230.dtsi index 5a1bf8a15abe..041c9947a8fa 100644 --- a/arch/riscv/boot/dts/canaan/k230.dtsi +++ b/arch/riscv/boot/dts/canaan/k230.dtsi @@ -21,9 +21,9 @@ cpu@0 { compatible = "thead,c908", "riscv"; device_type = "cpu"; reg = <0>; - riscv,isa = "rv64imafdcv_zicbom_zicbop_zicboz_zfh_zba_zbb_zbc_zbs_zvfh_svpbmt"; + riscv,isa = "rv64imafdcbv_zicbom_zicbop_zicboz_zicntr_zicsr_zifencei_zihpm_zfh_zba_zbb_zbc_zbs_zvfh_svpbmt"; riscv,isa-base = "rv64i"; - riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "v", "zicbom", + riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "b", "v", "zicbom", "zicbop", "zicboz", "zicntr", "zicsr", "zifencei", "zihpm", "zfh", "zba", "zbb", "zbc", "zbs", "zvfh", "svpbmt";