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scsi: mpt3sas: Update MPI headers to 02.00.62 version
Updated MPI header files to version 02.00.62. Signed-off-by: Shivasharan S <shivasharan.srikanteshwara@broadcom.com> Link: https://lore.kernel.org/r/1739410016-27503-2-git-send-email-shivasharan.srikanteshwara@broadcom.com Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
This commit is contained in:
Shivasharan S
Martin K. Petersen
parent
2014c95afe
commit
70684dcbec
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@ -125,6 +125,12 @@
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* 06-24-19 02.00.55 Bumped MPI2_HEADER_VERSION_UNIT
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* 08-01-19 02.00.56 Bumped MPI2_HEADER_VERSION_UNIT
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* 10-02-19 02.00.57 Bumped MPI2_HEADER_VERSION_UNIT
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* 07-20-20 02.00.58 Bumped MPI2_HEADER_VERSION_UNIT
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* 03-30-21 02.00.59 Bumped MPI2_HEADER_VERSION_UNIT
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* 06-03-22 02.00.60 Bumped MPI2_HEADER_VERSION_UNIT
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* 09-20-23 02.00.61 Bumped MPI2_HEADER_VERSION_UNIT
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* 09-13-24 02.00.62 Bumped MPI2_HEADER_VERSION_UNIT
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* Added MPI2_FUNCTION_MCTP_PASSTHROUGH
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* --------------------------------------------------------------------------
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*/
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@ -165,7 +171,7 @@
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/* Unit and Dev versioning for this MPI header set */
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#define MPI2_HEADER_VERSION_UNIT (0x39)
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#define MPI2_HEADER_VERSION_UNIT (0x3E)
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#define MPI2_HEADER_VERSION_DEV (0x00)
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#define MPI2_HEADER_VERSION_UNIT_MASK (0xFF00)
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#define MPI2_HEADER_VERSION_UNIT_SHIFT (8)
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@ -669,6 +675,7 @@ typedef union _MPI2_REPLY_DESCRIPTORS_UNION {
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#define MPI2_FUNCTION_PWR_MGMT_CONTROL (0x30)
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#define MPI2_FUNCTION_SEND_HOST_MESSAGE (0x31)
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#define MPI2_FUNCTION_NVME_ENCAPSULATED (0x33)
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#define MPI2_FUNCTION_MCTP_PASSTHROUGH (0x34)
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#define MPI2_FUNCTION_MIN_PRODUCT_SPECIFIC (0xF0)
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#define MPI2_FUNCTION_MAX_PRODUCT_SPECIFIC (0xFF)
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@ -251,6 +251,7 @@
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* 12-17-18 02.00.47 Swap locations of Slotx2 and Slotx4 in ManPage 7.
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* 08-01-19 02.00.49 Add MPI26_MANPAGE7_FLAG_X2_X4_SLOT_INFO_VALID
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* Add MPI26_IOUNITPAGE1_NVME_WRCACHE_SHIFT
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* 09-13-24 02.00.50 Added PCIe 32 GT/s link rate
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*/
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#ifndef MPI2_CNFG_H
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@ -1121,6 +1122,7 @@ typedef struct _MPI2_CONFIG_PAGE_IO_UNIT_7 {
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#define MPI2_IOUNITPAGE7_PCIE_SPEED_5_0_GBPS (0x01)
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#define MPI2_IOUNITPAGE7_PCIE_SPEED_8_0_GBPS (0x02)
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#define MPI2_IOUNITPAGE7_PCIE_SPEED_16_0_GBPS (0x03)
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#define MPI2_IOUNITPAGE7_PCIE_SPEED_32_0_GBPS (0x04)
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/*defines for IO Unit Page 7 ProcessorState field */
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#define MPI2_IOUNITPAGE7_PSTATE_MASK_SECOND (0x0000000F)
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@ -2301,6 +2303,7 @@ typedef struct _MPI2_CONFIG_PAGE_SASIOUNIT_1 {
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#define MPI2_SASIOUNIT1_CONTROL_CLEAR_AFFILIATION (0x0001)
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/*values for SAS IO Unit Page 1 AdditionalControlFlags */
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#define MPI2_SASIOUNIT1_ACONTROL_PROD_SPECIFIC_1 (0x8000)
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#define MPI2_SASIOUNIT1_ACONTROL_DA_PERSIST_CONNECT (0x0100)
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#define MPI2_SASIOUNIT1_ACONTROL_MULTI_PORT_DOMAIN_ILLEGAL (0x0080)
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#define MPI2_SASIOUNIT1_ACONTROL_SATA_ASYNCHROUNOUS_NOTIFICATION (0x0040)
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@ -3591,6 +3594,7 @@ typedef struct _MPI2_CONFIG_PAGE_EXT_MAN_PS {
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#define MPI26_PCIE_NEG_LINK_RATE_5_0 (0x03)
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#define MPI26_PCIE_NEG_LINK_RATE_8_0 (0x04)
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#define MPI26_PCIE_NEG_LINK_RATE_16_0 (0x05)
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#define MPI26_PCIE_NEG_LINK_RATE_32_0 (0x06)
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/****************************************************************************
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@ -3700,6 +3704,7 @@ typedef struct _MPI26_CONFIG_PAGE_PIOUNIT_1 {
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#define MPI26_PCIEIOUNIT1_MAX_RATE_5_0 (0x30)
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#define MPI26_PCIEIOUNIT1_MAX_RATE_8_0 (0x40)
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#define MPI26_PCIEIOUNIT1_MAX_RATE_16_0 (0x50)
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#define MPI26_PCIEIOUNIT1_MAX_RATE_32_0 (0x60)
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/*values for PCIe IO Unit Page 1 DMDReportPCIe */
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#define MPI26_PCIEIOUNIT1_DMDRPT_UNIT_MASK (0x80)
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@ -179,6 +179,7 @@
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* Added MPI26_IOCFACTS_CAPABILITY_COREDUMP_ENABLED
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* Added MPI2_FW_DOWNLOAD_ITYPE_COREDUMP
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* Added MPI2_FW_UPLOAD_ITYPE_COREDUMP
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* 9-13-24 02.00.39 Added MPI26_MCTP_PASSTHROUGH messages
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* --------------------------------------------------------------------------
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*/
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@ -382,6 +383,7 @@ typedef struct _MPI2_IOC_FACTS_REPLY {
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/*ProductID field uses MPI2_FW_HEADER_PID_ */
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/*IOCCapabilities */
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#define MPI26_IOCFACTS_CAPABILITY_MCTP_PASSTHRU (0x00800000)
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#define MPI26_IOCFACTS_CAPABILITY_COREDUMP_ENABLED (0x00200000)
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#define MPI26_IOCFACTS_CAPABILITY_PCIE_SRIOV (0x00100000)
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#define MPI26_IOCFACTS_CAPABILITY_ATOMIC_REQ (0x00080000)
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@ -1798,5 +1800,57 @@ typedef struct _MPI26_IOUNIT_CONTROL_REPLY {
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Mpi26IoUnitControlReply_t,
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*pMpi26IoUnitControlReply_t;
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/****************************************************************************
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* MCTP Passthrough messages (MPI v2.6 and later only.)
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****************************************************************************/
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/* MCTP Passthrough Request Message */
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typedef struct _MPI26_MCTP_PASSTHROUGH_REQUEST {
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U8 MsgContext; /* 0x00 */
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U8 Reserved1[2]; /* 0x01 */
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U8 Function; /* 0x03 */
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U8 Reserved2[3]; /* 0x04 */
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U8 MsgFlags; /* 0x07 */
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U8 VP_ID; /* 0x08 */
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U8 VF_ID; /* 0x09 */
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U16 Reserved3; /* 0x0A */
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U32 Reserved4; /* 0x0C */
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U8 Flags; /* 0x10 */
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U8 Reserved5[3]; /* 0x11 */
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U32 Reserved6; /* 0x14 */
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U32 H2DLength; /* 0x18 */
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U32 D2HLength; /* 0x1C */
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MPI25_SGE_IO_UNION H2DSGL; /* 0x20 */
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MPI25_SGE_IO_UNION D2HSGL; /* 0x30 */
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} MPI26_MCTP_PASSTHROUGH_REQUEST,
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*PTR_MPI26_MCTP_PASSTHROUGH_REQUEST,
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Mpi26MctpPassthroughRequest_t,
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*pMpi26MctpPassthroughRequest_t;
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/* values for the MsgContext field */
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#define MPI26_MCTP_MSG_CONEXT_UNUSED (0x00)
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/* values for the Flags field */
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#define MPI26_MCTP_FLAGS_MSG_FORMAT_MPT (0x01)
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/* MCTP Passthrough Reply Message */
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typedef struct _MPI26_MCTP_PASSTHROUGH_REPLY {
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U8 MsgContext; /* 0x00 */
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U8 Reserved1; /* 0x01 */
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U8 MsgLength; /* 0x02 */
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U8 Function; /* 0x03 */
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U8 Reserved2[3]; /* 0x04 */
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U8 MsgFlags; /* 0x07 */
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U8 VP_ID; /* 0x08 */
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U8 VF_ID; /* 0x09 */
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U16 Reserved3; /* 0x0A */
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U16 Reserved4; /* 0x0C */
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U16 IOCStatus; /* 0x0E */
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U32 IOCLogInfo; /* 0x10 */
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U32 ResponseDataLength; /* 0x14 */
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} MPI26_MCTP_PASSTHROUGH_REPLY,
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*PTR_MPI26_MCTP_PASSTHROUGH_REPLY,
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Mpi26MctpPassthroughReply_t,
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*pMpi26MctpPassthroughReply_t;
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#endif
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