arm64: dts: exynos850: Add CPU clocks

Define CPU cluster 0 and CPU cluster 1 CMUs, which generate CPU clocks,
and add corresponding CPU clocks to CPU nodes.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Link: https://lore.kernel.org/r/20240301015118.30072-3-semen.protsenko@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
This commit is contained in:
Sam Protsenko 2024-02-29 19:51:18 -06:00 committed by Krzysztof Kozlowski
parent b115751fdd
commit 704094c598

View File

@ -93,6 +93,8 @@ cpu0: cpu@0 {
compatible = "arm,cortex-a55";
reg = <0x0>;
enable-method = "psci";
clocks = <&cmu_cpucl0 CLK_CLUSTER0_SCLK>;
clock-names = "cluster0_clk";
};
cpu1: cpu@1 {
device_type = "cpu";
@ -117,6 +119,8 @@ cpu4: cpu@100 {
compatible = "arm,cortex-a55";
reg = <0x100>;
enable-method = "psci";
clocks = <&cmu_cpucl1 CLK_CLUSTER1_SCLK>;
clock-names = "cluster1_clk";
};
cpu5: cpu@101 {
device_type = "cpu";
@ -254,6 +258,28 @@ cmu_peri: clock-controller@10030000 {
"dout_peri_uart", "dout_peri_ip";
};
cmu_cpucl1: clock-controller@10800000 {
compatible = "samsung,exynos850-cmu-cpucl1";
reg = <0x10800000 0x8000>;
#clock-cells = <1>;
clocks = <&oscclk>, <&cmu_top CLK_DOUT_CPUCL1_SWITCH>,
<&cmu_top CLK_DOUT_CPUCL1_DBG>;
clock-names = "oscclk", "dout_cpucl1_switch",
"dout_cpucl1_dbg";
};
cmu_cpucl0: clock-controller@10900000 {
compatible = "samsung,exynos850-cmu-cpucl0";
reg = <0x10900000 0x8000>;
#clock-cells = <1>;
clocks = <&oscclk>, <&cmu_top CLK_DOUT_CPUCL0_SWITCH>,
<&cmu_top CLK_DOUT_CPUCL0_DBG>;
clock-names = "oscclk", "dout_cpucl0_switch",
"dout_cpucl0_dbg";
};
cmu_g3d: clock-controller@11400000 {
compatible = "samsung,exynos850-cmu-g3d";
reg = <0x11400000 0x8000>;