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drm/rockchip: inno-hdmi: switch to FIELD_PREP_WM16 macro

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The era of hand-rolled HIWORD_UPDATE macros is over, at least for those
drivers that use constant masks.

The inno-hdmi driver's own HIWORD_UPDATE macro is instantiated only
twice. Remove it, and replace its uses with FIELD_PREP_WM16. Since
FIELD_PREP_WM16 shifts the value for us, we replace using the mask as
the value by simply using 1 instead.

With the new FIELD_PREP_WM16 macro, we gain better error checking and a
central shared definition.

This has been compile-tested only as I lack hardware this old, but the
change is trivial enough that I am fairly certain it's equivalent.

Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Yury Norov (NVIDIA) <yury.norov@gmail.com>
This commit is contained in:
Nicolas Frattaroli 2025-08-25 10:28:31 +02:00 committed by Yury Norov
parent ad24f6e10a
commit 6fd524c3f8
1 changed files with 5 additions and 6 deletions
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11
drivers/gpu/drm/rockchip/inno_hdmi.c
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@ -10,6 +10,7 @@
#include <linux/delay.h>
#include <linux/err.h>
#include <linux/hdmi.h>
#include <linux/hw_bitfield.h>
#include <linux/mfd/syscon.h>
#include <linux/mod_devicetable.h>
#include <linux/module.h>
@ -382,8 +383,6 @@ enum {
#define HDMI_CEC_BUSFREETIME_H 0xdd
#define HDMI_CEC_LOGICADDR 0xde
#define HIWORD_UPDATE(val, mask) ((val) | (mask) << 16)
#define RK3036_GRF_SOC_CON2 0x148
#define RK3036_HDMI_PHSYNC BIT(4)
#define RK3036_HDMI_PVSYNC BIT(5)
@ -756,10 +755,10 @@ static int inno_hdmi_config_video_timing(struct inno_hdmi *hdmi,
int value, psync;
if (hdmi->variant->dev_type == RK3036_HDMI) {
psync = mode->flags & DRM_MODE_FLAG_PHSYNC ? RK3036_HDMI_PHSYNC : 0;
value = HIWORD_UPDATE(psync, RK3036_HDMI_PHSYNC);
psync = mode->flags & DRM_MODE_FLAG_PVSYNC ? RK3036_HDMI_PVSYNC : 0;
value |= HIWORD_UPDATE(psync, RK3036_HDMI_PVSYNC);
psync = mode->flags & DRM_MODE_FLAG_PHSYNC ? 1 : 0;
value = FIELD_PREP_WM16(RK3036_HDMI_PHSYNC, psync);
psync = mode->flags & DRM_MODE_FLAG_PVSYNC ? 1 : 0;
value |= FIELD_PREP_WM16(RK3036_HDMI_PVSYNC, psync);
regmap_write(hdmi->grf, RK3036_GRF_SOC_CON2, value);
}