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dt-bindings: serial: Convert lantiq,asc to DT schema
Convert the Lantiq SoC ASC UART binding to DT schema. There are no such clock identifier defines nor a user with clocks, so drop the example with clocks. Signed-off-by: "Rob Herring (Arm)" <robh@kernel.org> Reviewed-by: Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/20250506220029.2546179-1-robh@kernel.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Documentation/devicetree/bindings/serial/lantiq,asc.yaml
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Documentation/devicetree/bindings/serial/lantiq,asc.yaml
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/serial/lantiq,asc.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Lantiq SoC ASC serial controller
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maintainers:
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- John Crispin <john@phrozen.org>
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- Songjun Wu <songjun.wu@linux.intel.com>
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allOf:
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- $ref: /schemas/serial/serial.yaml#
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properties:
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compatible:
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const: lantiq,asc
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reg:
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maxItems: 1
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interrupts:
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items:
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- description: TX interrupt
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- description: RX interrupt
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- description: Error interrupt
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clocks:
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items:
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- description: Frequency clock
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- description: Gate clock
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clock-names:
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items:
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- const: freq
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- const: asc
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required:
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- compatible
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- reg
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- interrupts
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/mips-gic.h>
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serial@16600000 {
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compatible = "lantiq,asc";
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reg = <0x16600000 0x100000>;
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interrupts = <GIC_SHARED 103 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SHARED 105 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SHARED 106 IRQ_TYPE_LEVEL_HIGH>;
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};
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@ -1,31 +0,0 @@
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Lantiq SoC ASC serial controller
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Required properties:
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- compatible : Should be "lantiq,asc"
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- reg : Address and length of the register set for the device
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- interrupts: the 3 (tx rx err) interrupt numbers. The interrupt specifier
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depends on the interrupt-parent interrupt controller.
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Optional properties:
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- clocks: Should contain frequency clock and gate clock
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- clock-names: Should be "freq" and "asc"
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Example:
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asc0: serial@16600000 {
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compatible = "lantiq,asc";
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reg = <0x16600000 0x100000>;
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interrupt-parent = <&gic>;
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interrupts = <GIC_SHARED 103 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SHARED 105 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SHARED 106 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cgu CLK_SSX4>, <&cgu GCLK_UART>;
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clock-names = "freq", "asc";
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};
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asc1: serial@e100c00 {
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compatible = "lantiq,asc";
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reg = <0xE100C00 0x400>;
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interrupt-parent = <&icu0>;
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interrupts = <112 113 114>;
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};
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