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drm/i915: add Wa_14010594013: icl,ehl
The bspec tells us we need to set this bit to avoid potential underruns. v2: use new register write convention (Anshuman) add bspec 7386 ref. Bspec: 7386 Bspec: 33450 Bspec: 33451 Cc: Anshuman Gupta <anshuman.gupta@intel.com> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Matt Atwood <matthew.s.atwood@intel.com> Reviewed-by: Anshuman Gupta <anshuman.gupta@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200114041128.11211-1-matthew.s.atwood@intel.com
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@ -7769,6 +7769,7 @@ enum {
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#define GEN8_CHICKEN_DCPR_1 _MMIO(0x46430)
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#define SKL_SELECT_ALTERNATE_DC_EXIT (1 << 30)
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#define CNL_DELAY_PMRSP (1 << 22)
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#define MASK_WAKEMEM (1 << 13)
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#define CNL_DDI_CLOCK_REG_ACCESS_ON (1 << 7)
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@ -6643,6 +6643,10 @@ static void icl_init_clock_gating(struct drm_i915_private *dev_priv)
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/* Wa_1407352427:icl,ehl */
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intel_uncore_rmw(&dev_priv->uncore, UNSLICE_UNIT_LEVEL_CLKGATE2,
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0, PSDUNIT_CLKGATE_DIS);
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/*Wa_14010594013:icl, ehl */
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intel_uncore_rmw(&dev_priv->uncore, GEN8_CHICKEN_DCPR_1,
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0, CNL_DELAY_PMRSP);
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}
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static void tgl_init_clock_gating(struct drm_i915_private *dev_priv)
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