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https://github.com/torvalds/linux.git
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regmap: Updates for v6.14
There's one big bit of work this time around, the addition of support for a greater range of MBQ access sizes to SoundWire devices together with support for deferred read/write. The MBQ register maps generally have variable register sizes, the variable regiseter size support allows them to be handled much more naturally within regmap with less open coding in drivers. The deferred read/write support avoids spurious errors when devices make use of a bus feature allowing them to indicate they're busy. These changes pull in a supporting SoundWire change, and there's an ASoC change building off the new code. The remainder of the changes are code cleanups. -----BEGIN PGP SIGNATURE----- iQEzBAABCgAdFiEEreZoqmdXGLWf4p/qJNaLcl1Uh9AFAmeOXxIACgkQJNaLcl1U h9Bktwf/ZG6r01FNIw7PTDFQoZ2YipaFffqyJZco7zj2kyK1SqPt9jRQuPD5K8CE gXwxhIDu/Z7XXhTBOQ42shtOAyhw6FQDXdfULYvVl0kZ6JIUtz/J7JCuh3v/UBMo PWvFCIutDsgte0ru7jdQCTxgGgc39sobEQQOyznlNP+If7+aRpWW6B95YqakTzCc zDy8aDE4YxpFy6Wgg+t4xuO1KGdltHBoNFgtUNuaQtfkQP38JlMo9Ma/BEVu8INK WlGYPjo3eo/oRCohN+MByq15qvbVheAFg0B9h3mNcTOGFGhvNLBkqc4DE85UBk6g JH/QY1LEqTqHKEpi3oRAgwUUgy3Tog== =6vTg -----END PGP SIGNATURE----- Merge tag 'regmap-v6.14' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regmap Pull regmap updates from Mark Brown: "There's one big bit of work this time around, the addition of support for a greater range of MBQ access sizes to SoundWire devices together with support for deferred read/write. The MBQ register maps generally have variable register sizes, the variable regiseter size support allows them to be handled much more naturally within regmap with less open coding in drivers. The deferred read/write support avoids spurious errors when devices make use of a bus feature allowing them to indicate they're busy. These changes pull in a supporting SoundWire change, and there's an ASoC change building off the new code. The remainder of the changes are code cleanups" * tag 'regmap-v6.14' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regmap: regmap: sdw-mbq: Add support for SDCA deferred controls regmap: sdw-mbq: Add support for further MBQ register sizes ASoC: SDCA: Update list of entity_0 controls soundwire: SDCA: Add additional SDCA address macros regmap: regmap_multi_reg_read(): make register list const regmap: cache: rbtree: use krealloc_array() to replace krealloc() regmap: cache: mapple: use kmalloc_array() to replace kmalloc() regmap: place foo / 8 and foo % 8 closer to each other regmap: Use BITS_TO_BYTES() regmap: cache: Use BITS_TO_BYTES()
This commit is contained in:
Linus Torvalds
commit
6f10810ccd
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@ -73,8 +73,7 @@ static int regcache_maple_write(struct regmap *map, unsigned int reg,
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rcu_read_unlock();
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entry = kmalloc((last - index + 1) * sizeof(unsigned long),
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map->alloc_flags);
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entry = kmalloc_array(last - index + 1, sizeof(*entry), map->alloc_flags);
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if (!entry)
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return -ENOMEM;
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@ -204,7 +203,7 @@ static int regcache_maple_sync_block(struct regmap *map, unsigned long *entry,
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* overheads.
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*/
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if (max - min > 1 && regmap_can_raw_write(map)) {
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buf = kmalloc(val_bytes * (max - min), map->alloc_flags);
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buf = kmalloc_array(max - min, val_bytes, map->alloc_flags);
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if (!buf) {
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ret = -ENOMEM;
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goto out;
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@ -320,7 +319,7 @@ static int regcache_maple_insert_block(struct regmap *map, int first,
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unsigned long *entry;
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int i, ret;
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entry = kcalloc(last - first + 1, sizeof(unsigned long), map->alloc_flags);
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entry = kmalloc_array(last - first + 1, sizeof(*entry), map->alloc_flags);
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if (!entry)
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return -ENOMEM;
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@ -275,18 +275,16 @@ static int regcache_rbtree_insert_to_block(struct regmap *map,
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pos = (reg - base_reg) / map->reg_stride;
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offset = (rbnode->base_reg - base_reg) / map->reg_stride;
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blk = krealloc(rbnode->block,
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blklen * map->cache_word_size,
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map->alloc_flags);
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blk = krealloc_array(rbnode->block, blklen, map->cache_word_size, map->alloc_flags);
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if (!blk)
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return -ENOMEM;
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rbnode->block = blk;
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if (BITS_TO_LONGS(blklen) > BITS_TO_LONGS(rbnode->blklen)) {
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present = krealloc(rbnode->cache_present,
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BITS_TO_LONGS(blklen) * sizeof(*present),
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map->alloc_flags);
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present = krealloc_array(rbnode->cache_present,
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BITS_TO_LONGS(blklen), sizeof(*present),
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map->alloc_flags);
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if (!present)
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return -ENOMEM;
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@ -154,7 +154,7 @@ int regcache_init(struct regmap *map, const struct regmap_config *config)
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map->num_reg_defaults = config->num_reg_defaults;
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map->num_reg_defaults_raw = config->num_reg_defaults_raw;
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map->reg_defaults_raw = config->reg_defaults_raw;
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map->cache_word_size = DIV_ROUND_UP(config->val_bits, 8);
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map->cache_word_size = BITS_TO_BYTES(config->val_bits);
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map->cache_size_raw = map->cache_word_size * config->num_reg_defaults_raw;
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map->cache = NULL;
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@ -1,45 +1,187 @@
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// SPDX-License-Identifier: GPL-2.0
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// Copyright(c) 2020 Intel Corporation.
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#include <linux/bits.h>
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#include <linux/delay.h>
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#include <linux/device.h>
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#include <linux/errno.h>
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#include <linux/iopoll.h>
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#include <linux/module.h>
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#include <linux/regmap.h>
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#include <linux/soundwire/sdw.h>
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#include <linux/soundwire/sdw_registers.h>
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#include <sound/sdca_function.h>
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#include "internal.h"
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struct regmap_mbq_context {
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struct device *dev;
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struct regmap_sdw_mbq_cfg cfg;
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int val_size;
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bool (*readable_reg)(struct device *dev, unsigned int reg);
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};
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static int regmap_sdw_mbq_size(struct regmap_mbq_context *ctx, unsigned int reg)
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{
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int size = ctx->val_size;
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if (ctx->cfg.mbq_size) {
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size = ctx->cfg.mbq_size(ctx->dev, reg);
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if (!size || size > ctx->val_size)
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return -EINVAL;
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}
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return size;
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}
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static bool regmap_sdw_mbq_deferrable(struct regmap_mbq_context *ctx, unsigned int reg)
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{
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if (ctx->cfg.deferrable)
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return ctx->cfg.deferrable(ctx->dev, reg);
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return false;
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}
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static int regmap_sdw_mbq_poll_busy(struct sdw_slave *slave, unsigned int reg,
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struct regmap_mbq_context *ctx)
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{
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struct device *dev = &slave->dev;
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int val, ret = 0;
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dev_dbg(dev, "Deferring transaction for 0x%x\n", reg);
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reg = SDW_SDCA_CTL(SDW_SDCA_CTL_FUNC(reg), 0,
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SDCA_CTL_ENTITY_0_FUNCTION_STATUS, 0);
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if (ctx->readable_reg(dev, reg)) {
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ret = read_poll_timeout(sdw_read_no_pm, val,
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val < 0 || !(val & SDCA_CTL_ENTITY_0_FUNCTION_BUSY),
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ctx->cfg.timeout_us, ctx->cfg.retry_us,
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false, slave, reg);
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if (val < 0)
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return val;
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if (ret)
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dev_err(dev, "Function busy timed out 0x%x: %d\n", reg, val);
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} else {
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fsleep(ctx->cfg.timeout_us);
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}
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return ret;
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}
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static int regmap_sdw_mbq_write_impl(struct sdw_slave *slave,
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unsigned int reg, unsigned int val,
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int mbq_size, bool deferrable)
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{
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int shift = mbq_size * BITS_PER_BYTE;
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int ret;
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while (--mbq_size > 0) {
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shift -= BITS_PER_BYTE;
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ret = sdw_write_no_pm(slave, SDW_SDCA_MBQ_CTL(reg),
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(val >> shift) & 0xff);
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if (ret < 0)
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return ret;
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}
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ret = sdw_write_no_pm(slave, reg, val & 0xff);
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if (deferrable && ret == -ENODATA)
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return -EAGAIN;
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return ret;
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}
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static int regmap_sdw_mbq_write(void *context, unsigned int reg, unsigned int val)
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{
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struct device *dev = context;
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struct regmap_mbq_context *ctx = context;
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struct device *dev = ctx->dev;
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struct sdw_slave *slave = dev_to_sdw_dev(dev);
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bool deferrable = regmap_sdw_mbq_deferrable(ctx, reg);
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int mbq_size = regmap_sdw_mbq_size(ctx, reg);
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int ret;
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ret = sdw_write_no_pm(slave, SDW_SDCA_MBQ_CTL(reg), (val >> 8) & 0xff);
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if (ret < 0)
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return ret;
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if (mbq_size < 0)
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return mbq_size;
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return sdw_write_no_pm(slave, reg, val & 0xff);
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/*
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* Technically the spec does allow a device to set itself to busy for
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* internal reasons, but since it doesn't provide any information on
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* how to handle timeouts in that case, for now the code will only
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* process a single wait/timeout on function busy and a single retry
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* of the transaction.
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*/
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ret = regmap_sdw_mbq_write_impl(slave, reg, val, mbq_size, deferrable);
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if (ret == -EAGAIN) {
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ret = regmap_sdw_mbq_poll_busy(slave, reg, ctx);
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if (ret)
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return ret;
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ret = regmap_sdw_mbq_write_impl(slave, reg, val, mbq_size, false);
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}
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return ret;
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}
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static int regmap_sdw_mbq_read_impl(struct sdw_slave *slave,
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unsigned int reg, unsigned int *val,
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int mbq_size, bool deferrable)
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{
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int shift = BITS_PER_BYTE;
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int read;
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read = sdw_read_no_pm(slave, reg);
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if (read < 0) {
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if (deferrable && read == -ENODATA)
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return -EAGAIN;
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return read;
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}
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*val = read;
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while (--mbq_size > 0) {
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read = sdw_read_no_pm(slave, SDW_SDCA_MBQ_CTL(reg));
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if (read < 0)
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return read;
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*val |= read << shift;
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shift += BITS_PER_BYTE;
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}
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return 0;
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}
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static int regmap_sdw_mbq_read(void *context, unsigned int reg, unsigned int *val)
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{
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struct device *dev = context;
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struct regmap_mbq_context *ctx = context;
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struct device *dev = ctx->dev;
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struct sdw_slave *slave = dev_to_sdw_dev(dev);
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int read0;
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int read1;
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bool deferrable = regmap_sdw_mbq_deferrable(ctx, reg);
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int mbq_size = regmap_sdw_mbq_size(ctx, reg);
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int ret;
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read0 = sdw_read_no_pm(slave, reg);
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if (read0 < 0)
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return read0;
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if (mbq_size < 0)
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return mbq_size;
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read1 = sdw_read_no_pm(slave, SDW_SDCA_MBQ_CTL(reg));
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if (read1 < 0)
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return read1;
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/*
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* Technically the spec does allow a device to set itself to busy for
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* internal reasons, but since it doesn't provide any information on
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* how to handle timeouts in that case, for now the code will only
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* process a single wait/timeout on function busy and a single retry
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* of the transaction.
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*/
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ret = regmap_sdw_mbq_read_impl(slave, reg, val, mbq_size, deferrable);
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if (ret == -EAGAIN) {
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ret = regmap_sdw_mbq_poll_busy(slave, reg, ctx);
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if (ret)
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return ret;
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*val = (read1 << 8) | read0;
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ret = regmap_sdw_mbq_read_impl(slave, reg, val, mbq_size, false);
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}
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return 0;
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return ret;
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}
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static const struct regmap_bus regmap_sdw_mbq = {
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@ -51,8 +193,7 @@ static const struct regmap_bus regmap_sdw_mbq = {
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static int regmap_sdw_mbq_config_check(const struct regmap_config *config)
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{
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/* MBQ-based controls are only 16-bits for now */
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if (config->val_bits != 16)
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if (config->val_bits > (sizeof(unsigned int) * BITS_PER_BYTE))
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return -ENOTSUPP;
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/* Registers are 32 bits wide */
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@ -65,35 +206,69 @@ static int regmap_sdw_mbq_config_check(const struct regmap_config *config)
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return 0;
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}
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static struct regmap_mbq_context *
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regmap_sdw_mbq_gen_context(struct device *dev,
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const struct regmap_config *config,
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const struct regmap_sdw_mbq_cfg *mbq_config)
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{
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struct regmap_mbq_context *ctx;
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ctx = devm_kzalloc(dev, sizeof(*ctx), GFP_KERNEL);
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if (!ctx)
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return ERR_PTR(-ENOMEM);
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ctx->dev = dev;
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if (mbq_config)
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ctx->cfg = *mbq_config;
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ctx->val_size = config->val_bits / BITS_PER_BYTE;
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ctx->readable_reg = config->readable_reg;
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return ctx;
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}
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struct regmap *__regmap_init_sdw_mbq(struct sdw_slave *sdw,
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const struct regmap_config *config,
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const struct regmap_sdw_mbq_cfg *mbq_config,
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struct lock_class_key *lock_key,
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const char *lock_name)
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{
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struct regmap_mbq_context *ctx;
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int ret;
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ret = regmap_sdw_mbq_config_check(config);
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if (ret)
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return ERR_PTR(ret);
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return __regmap_init(&sdw->dev, ®map_sdw_mbq,
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&sdw->dev, config, lock_key, lock_name);
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ctx = regmap_sdw_mbq_gen_context(&sdw->dev, config, mbq_config);
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if (IS_ERR(ctx))
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return ERR_CAST(ctx);
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return __regmap_init(&sdw->dev, ®map_sdw_mbq, ctx,
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config, lock_key, lock_name);
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}
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EXPORT_SYMBOL_GPL(__regmap_init_sdw_mbq);
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struct regmap *__devm_regmap_init_sdw_mbq(struct sdw_slave *sdw,
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const struct regmap_config *config,
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const struct regmap_sdw_mbq_cfg *mbq_config,
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struct lock_class_key *lock_key,
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const char *lock_name)
|
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{
|
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struct regmap_mbq_context *ctx;
|
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int ret;
|
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|
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ret = regmap_sdw_mbq_config_check(config);
|
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if (ret)
|
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return ERR_PTR(ret);
|
||||
|
||||
return __devm_regmap_init(&sdw->dev, ®map_sdw_mbq,
|
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&sdw->dev, config, lock_key, lock_name);
|
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ctx = regmap_sdw_mbq_gen_context(&sdw->dev, config, mbq_config);
|
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if (IS_ERR(ctx))
|
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return ERR_CAST(ctx);
|
||||
|
||||
return __devm_regmap_init(&sdw->dev, ®map_sdw_mbq, ctx,
|
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config, lock_key, lock_name);
|
||||
}
|
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EXPORT_SYMBOL_GPL(__devm_regmap_init_sdw_mbq);
|
||||
|
||||
|
|
|
|||
|
|
@ -769,14 +769,13 @@ struct regmap *__regmap_init(struct device *dev,
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map->alloc_flags = GFP_KERNEL;
|
||||
|
||||
map->reg_base = config->reg_base;
|
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map->reg_shift = config->pad_bits % 8;
|
||||
|
||||
map->format.reg_bytes = DIV_ROUND_UP(config->reg_bits, 8);
|
||||
map->format.pad_bytes = config->pad_bits / 8;
|
||||
map->format.reg_shift = config->reg_shift;
|
||||
map->format.val_bytes = DIV_ROUND_UP(config->val_bits, 8);
|
||||
map->format.buf_size = DIV_ROUND_UP(config->reg_bits +
|
||||
config->val_bits + config->pad_bits, 8);
|
||||
map->reg_shift = config->pad_bits % 8;
|
||||
map->format.reg_bytes = BITS_TO_BYTES(config->reg_bits);
|
||||
map->format.val_bytes = BITS_TO_BYTES(config->val_bits);
|
||||
map->format.buf_size = BITS_TO_BYTES(config->reg_bits + config->val_bits + config->pad_bits);
|
||||
if (config->reg_stride)
|
||||
map->reg_stride = config->reg_stride;
|
||||
else
|
||||
|
|
@ -3116,7 +3115,7 @@ int regmap_fields_read(struct regmap_field *field, unsigned int id,
|
|||
EXPORT_SYMBOL_GPL(regmap_fields_read);
|
||||
|
||||
static int _regmap_bulk_read(struct regmap *map, unsigned int reg,
|
||||
unsigned int *regs, void *val, size_t val_count)
|
||||
const unsigned int *regs, void *val, size_t val_count)
|
||||
{
|
||||
u32 *u32 = val;
|
||||
u16 *u16 = val;
|
||||
|
|
@ -3210,7 +3209,7 @@ EXPORT_SYMBOL_GPL(regmap_bulk_read);
|
|||
* A value of zero will be returned on success, a negative errno will
|
||||
* be returned in error cases.
|
||||
*/
|
||||
int regmap_multi_reg_read(struct regmap *map, unsigned int *regs, void *val,
|
||||
int regmap_multi_reg_read(struct regmap *map, const unsigned int *regs, void *val,
|
||||
size_t val_count)
|
||||
{
|
||||
if (val_count == 0)
|
||||
|
|
|
|||
|
|
@ -506,6 +506,32 @@ struct regmap_range_cfg {
|
|||
unsigned int window_len;
|
||||
};
|
||||
|
||||
/**
|
||||
* struct regmap_sdw_mbq_cfg - Configuration for Multi-Byte Quantities
|
||||
*
|
||||
* @mbq_size: Callback returning the actual size of the given register.
|
||||
* @deferrable: Callback returning true if the hardware can defer
|
||||
* transactions to the given register. Deferral should
|
||||
* only be used by SDCA parts and typically which controls
|
||||
* are deferrable will be specified in either as a hard
|
||||
* coded list or from the DisCo tables in the platform
|
||||
* firmware.
|
||||
*
|
||||
* @timeout_us: The time in microseconds after which waiting for a deferred
|
||||
* transaction should time out.
|
||||
* @retry_us: The time in microseconds between polls of the function busy
|
||||
* status whilst waiting for an opportunity to retry a deferred
|
||||
* transaction.
|
||||
*
|
||||
* Provides additional configuration required for SoundWire MBQ register maps.
|
||||
*/
|
||||
struct regmap_sdw_mbq_cfg {
|
||||
int (*mbq_size)(struct device *dev, unsigned int reg);
|
||||
bool (*deferrable)(struct device *dev, unsigned int reg);
|
||||
unsigned long timeout_us;
|
||||
unsigned long retry_us;
|
||||
};
|
||||
|
||||
struct regmap_async;
|
||||
|
||||
typedef int (*regmap_hw_write)(void *context, const void *data,
|
||||
|
|
@ -652,6 +678,7 @@ struct regmap *__regmap_init_sdw(struct sdw_slave *sdw,
|
|||
const char *lock_name);
|
||||
struct regmap *__regmap_init_sdw_mbq(struct sdw_slave *sdw,
|
||||
const struct regmap_config *config,
|
||||
const struct regmap_sdw_mbq_cfg *mbq_config,
|
||||
struct lock_class_key *lock_key,
|
||||
const char *lock_name);
|
||||
struct regmap *__regmap_init_spi_avmm(struct spi_device *spi,
|
||||
|
|
@ -713,6 +740,7 @@ struct regmap *__devm_regmap_init_sdw(struct sdw_slave *sdw,
|
|||
const char *lock_name);
|
||||
struct regmap *__devm_regmap_init_sdw_mbq(struct sdw_slave *sdw,
|
||||
const struct regmap_config *config,
|
||||
const struct regmap_sdw_mbq_cfg *mbq_config,
|
||||
struct lock_class_key *lock_key,
|
||||
const char *lock_name);
|
||||
struct regmap *__devm_regmap_init_slimbus(struct slim_device *slimbus,
|
||||
|
|
@ -942,7 +970,22 @@ bool regmap_ac97_default_volatile(struct device *dev, unsigned int reg);
|
|||
*/
|
||||
#define regmap_init_sdw_mbq(sdw, config) \
|
||||
__regmap_lockdep_wrapper(__regmap_init_sdw_mbq, #config, \
|
||||
sdw, config)
|
||||
sdw, config, NULL)
|
||||
|
||||
/**
|
||||
* regmap_init_sdw_mbq_cfg() - Initialise MBQ SDW register map with config
|
||||
*
|
||||
* @sdw: Device that will be interacted with
|
||||
* @config: Configuration for register map
|
||||
* @mbq_config: Properties for the MBQ registers
|
||||
*
|
||||
* The return value will be an ERR_PTR() on error or a valid pointer
|
||||
* to a struct regmap. The regmap will be automatically freed by the
|
||||
* device management code.
|
||||
*/
|
||||
#define regmap_init_sdw_mbq_cfg(sdw, config, mbq_config) \
|
||||
__regmap_lockdep_wrapper(__regmap_init_sdw_mbq, #config, \
|
||||
sdw, config, mbq_config)
|
||||
|
||||
/**
|
||||
* regmap_init_spi_avmm() - Initialize register map for Intel SPI Slave
|
||||
|
|
@ -1155,7 +1198,22 @@ bool regmap_ac97_default_volatile(struct device *dev, unsigned int reg);
|
|||
*/
|
||||
#define devm_regmap_init_sdw_mbq(sdw, config) \
|
||||
__regmap_lockdep_wrapper(__devm_regmap_init_sdw_mbq, #config, \
|
||||
sdw, config)
|
||||
sdw, config, NULL)
|
||||
|
||||
/**
|
||||
* devm_regmap_init_sdw_mbq_cfg() - Initialise managed MBQ SDW register map with config
|
||||
*
|
||||
* @sdw: Device that will be interacted with
|
||||
* @config: Configuration for register map
|
||||
* @mbq_config: Properties for the MBQ registers
|
||||
*
|
||||
* The return value will be an ERR_PTR() on error or a valid pointer
|
||||
* to a struct regmap. The regmap will be automatically freed by the
|
||||
* device management code.
|
||||
*/
|
||||
#define devm_regmap_init_sdw_mbq_cfg(sdw, config, mbq_config) \
|
||||
__regmap_lockdep_wrapper(__devm_regmap_init_sdw_mbq, \
|
||||
#config, sdw, config, mbq_config)
|
||||
|
||||
/**
|
||||
* devm_regmap_init_slimbus() - Initialise managed register map
|
||||
|
|
@ -1244,7 +1302,7 @@ int regmap_noinc_read(struct regmap *map, unsigned int reg,
|
|||
void *val, size_t val_len);
|
||||
int regmap_bulk_read(struct regmap *map, unsigned int reg, void *val,
|
||||
size_t val_count);
|
||||
int regmap_multi_reg_read(struct regmap *map, unsigned int *reg, void *val,
|
||||
int regmap_multi_reg_read(struct regmap *map, const unsigned int *reg, void *val,
|
||||
size_t val_count);
|
||||
int regmap_update_bits_base(struct regmap *map, unsigned int reg,
|
||||
unsigned int mask, unsigned int val,
|
||||
|
|
|
|||
|
|
@ -4,6 +4,9 @@
|
|||
#ifndef __SDW_REGISTERS_H
|
||||
#define __SDW_REGISTERS_H
|
||||
|
||||
#include <linux/bitfield.h>
|
||||
#include <linux/bits.h>
|
||||
|
||||
/*
|
||||
* SDW registers as defined by MIPI 1.2 Spec
|
||||
*/
|
||||
|
|
@ -329,16 +332,27 @@
|
|||
* 2:0 Control Number[2:0]
|
||||
*/
|
||||
|
||||
#define SDW_SDCA_CTL(fun, ent, ctl, ch) (BIT(30) | \
|
||||
(((fun) & 0x7) << 22) | \
|
||||
(((ent) & 0x40) << 15) | \
|
||||
(((ent) & 0x3f) << 7) | \
|
||||
(((ctl) & 0x30) << 15) | \
|
||||
(((ctl) & 0x0f) << 3) | \
|
||||
(((ch) & 0x38) << 12) | \
|
||||
((ch) & 0x07))
|
||||
#define SDW_SDCA_CTL(fun, ent, ctl, ch) (BIT(30) | \
|
||||
(((fun) & GENMASK(2, 0)) << 22) | \
|
||||
(((ent) & BIT(6)) << 15) | \
|
||||
(((ent) & GENMASK(5, 0)) << 7) | \
|
||||
(((ctl) & GENMASK(5, 4)) << 15) | \
|
||||
(((ctl) & GENMASK(3, 0)) << 3) | \
|
||||
(((ch) & GENMASK(5, 3)) << 12) | \
|
||||
((ch) & GENMASK(2, 0)))
|
||||
|
||||
#define SDW_SDCA_CTL_FUNC(reg) FIELD_GET(GENMASK(24, 22), (reg))
|
||||
#define SDW_SDCA_CTL_ENT(reg) ((FIELD_GET(BIT(21), (reg)) << 6) | \
|
||||
FIELD_GET(GENMASK(12, 7), (reg)))
|
||||
#define SDW_SDCA_CTL_CSEL(reg) ((FIELD_GET(GENMASK(20, 19), (reg)) << 4) | \
|
||||
FIELD_GET(GENMASK(6, 3), (reg)))
|
||||
#define SDW_SDCA_CTL_CNUM(reg) ((FIELD_GET(GENMASK(17, 15), (reg)) << 3) | \
|
||||
FIELD_GET(GENMASK(2, 0), (reg)))
|
||||
|
||||
#define SDW_SDCA_MBQ_CTL(reg) ((reg) | BIT(13))
|
||||
#define SDW_SDCA_NEXT_CTL(reg) ((reg) | BIT(14))
|
||||
|
||||
/* Check the reserved and fixed bits in address */
|
||||
#define SDW_SDCA_VALID_CTL(reg) (((reg) & (GENMASK(31, 25) | BIT(18) | BIT(13))) == BIT(30))
|
||||
|
||||
#endif /* __SDW_REGISTERS_H */
|
||||
|
|
|
|||
|
|
@ -42,14 +42,31 @@ enum sdca_function_type {
|
|||
#define SDCA_FUNCTION_TYPE_HID_NAME "HID"
|
||||
|
||||
enum sdca_entity0_controls {
|
||||
SDCA_CONTROL_ENTITY_0_COMMIT_GROUP_MASK = 0x01,
|
||||
SDCA_CONTROL_ENTITY_0_INTSTAT_CLEAR = 0x02,
|
||||
SDCA_CONTROL_ENTITY_0_INT_ENABLE = 0x03,
|
||||
SDCA_CONTROL_ENTITY_0_FUNCTION_SDCA_VERSION = 0x04,
|
||||
SDCA_CONTROL_ENTITY_0_FUNCTION_TOPOLOGY = 0x05,
|
||||
SDCA_CONTROL_ENTITY_0_FUNCTION_MANUFACTURER_ID = 0x06,
|
||||
SDCA_CONTROL_ENTITY_0_FUNCTION_ID = 0x07,
|
||||
SDCA_CONTROL_ENTITY_0_FUNCTION_VERSION = 0x08
|
||||
SDCA_CTL_ENTITY_0_COMMIT_GROUP_MASK = 0x01,
|
||||
SDCA_CTL_ENTITY_0_FUNCTION_SDCA_VERSION = 0x04,
|
||||
SDCA_CTL_ENTITY_0_FUNCTION_TYPE = 0x05,
|
||||
SDCA_CTL_ENTITY_0_FUNCTION_MANUFACTURER_ID = 0x06,
|
||||
SDCA_CTL_ENTITY_0_FUNCTION_ID = 0x07,
|
||||
SDCA_CTL_ENTITY_0_FUNCTION_VERSION = 0x08,
|
||||
SDCA_CTL_ENTITY_0_FUNCTION_EXTENSION_ID = 0x09,
|
||||
SDCA_CTL_ENTITY_0_FUNCTION_EXTENSION_VERSION = 0x0A,
|
||||
SDCA_CTL_ENTITY_0_FUNCTION_STATUS = 0x10,
|
||||
SDCA_CTL_ENTITY_0_FUNCTION_ACTION = 0x11,
|
||||
SDCA_CTL_ENTITY_0_MATCHING_GUID = 0x12,
|
||||
SDCA_CTL_ENTITY_0_DEVICE_MANUFACTURER_ID = 0x2C,
|
||||
SDCA_CTL_ENTITY_0_DEVICE_PART_ID = 0x2D,
|
||||
SDCA_CTL_ENTITY_0_DEVICE_VERSION = 0x2E,
|
||||
SDCA_CTL_ENTITY_0_DEVICE_SDCA_VERSION = 0x2F,
|
||||
|
||||
/* Function Status Bits */
|
||||
SDCA_CTL_ENTITY_0_DEVICE_NEWLY_ATTACHED = BIT(0),
|
||||
SDCA_CTL_ENTITY_0_INTS_DISABLED_ABNORMALLY = BIT(1),
|
||||
SDCA_CTL_ENTITY_0_STREAMING_STOPPED_ABNORMALLY = BIT(2),
|
||||
SDCA_CTL_ENTITY_0_FUNCTION_FAULT = BIT(3),
|
||||
SDCA_CTL_ENTITY_0_UMP_SEQUENCE_FAULT = BIT(4),
|
||||
SDCA_CTL_ENTITY_0_FUNCTION_NEEDS_INITIALIZATION = BIT(5),
|
||||
SDCA_CTL_ENTITY_0_FUNCTION_HAS_BEEN_RESET = BIT(6),
|
||||
SDCA_CTL_ENTITY_0_FUNCTION_BUSY = BIT(7),
|
||||
};
|
||||
|
||||
#endif
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user