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drm/xe/gt: Use CLASS() for forcewake in xe_gt_enable_comp_1wcoh

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Adopt the scoped forcewake management using CLASS(xe_force_wake, ...)
to simplify the code and ensure proper resource release.

Cc: Xin Wang <x.wang@intel.com>
Cc: Matthew Auld <matthew.auld@intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Shuicheng Lin <shuicheng.lin@intel.com>
Reviewed-by: Xin Wang <x.wang@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
Link: https://patch.msgid.link/20260123180425.3262944-2-shuicheng.lin@intel.com
This commit is contained in:
Shuicheng Lin 2026-01-23 18:04:26 +00:00 committed by Ashutosh Dixit
parent d043b95983
commit 6edeabacb7
1 changed files with 2 additions and 5 deletions
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7
drivers/gpu/drm/xe/xe_gt.c
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@ -141,15 +141,14 @@ static void xe_gt_disable_host_l2_vram(struct xe_gt *gt)
static void xe_gt_enable_comp_1wcoh(struct xe_gt *gt)
{
struct xe_device *xe = gt_to_xe(gt);
unsigned int fw_ref;
u32 reg;
if (IS_SRIOV_VF(xe))
return;
if (GRAPHICS_VER(xe) >= 30 && xe->info.has_flat_ccs) {
fw_ref = xe_force_wake_get(gt_to_fw(gt), XE_FW_GT);
if (!fw_ref)
CLASS(xe_force_wake, fw_ref)(gt_to_fw(gt), XE_FW_GT);
if (!fw_ref.domains)
return;
reg = xe_gt_mcr_unicast_read_any(gt, XE2_GAMREQSTRM_CTRL);
@ -163,8 +162,6 @@ static void xe_gt_enable_comp_1wcoh(struct xe_gt *gt)
reg |= EN_CMP_1WCOH_GW;
xe_gt_mcr_multicast_write(gt, XE2_GAMWALK_CTRL_3D, reg);
}
xe_force_wake_put(gt_to_fw(gt), fw_ref);
}
}