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perf jevents: Add local/remote miss latency metrics for Intel
Derive from CBOX/CHA occupancy and inserts the average latency as is provided in Intel's uncore performance monitoring reference. Signed-off-by: Ian Rogers <irogers@google.com> Tested-by: Thomas Falcon <thomas.falcon@intel.com> Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Benjamin Gray <bgray@linux.ibm.com> Cc: Caleb Biggers <caleb.biggers@intel.com> Cc: Edward Baker <edward.baker@intel.com> Cc: Ingo Molnar <mingo@redhat.com> Cc: James Clark <james.clark@linaro.org> Cc: Jing Zhang <renyu.zj@linux.alibaba.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: John Garry <john.g.garry@oracle.com> Cc: Leo Yan <leo.yan@arm.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Perry Taylor <perry.taylor@intel.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Sandipan Das <sandipan.das@amd.com> Cc: Weilin Wang <weilin.wang@intel.com> Cc: Xu Yang <xu.yang_2@nxp.com> Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
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@ -6,9 +6,10 @@ import math
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import os
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import re
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from typing import Optional
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from metric import (d_ratio, has_event, max, CheckPmu, Event, JsonEncodeMetric,
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JsonEncodeMetricGroupDescriptions, Literal, LoadEvents,
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Metric, MetricConstraint, MetricGroup, MetricRef, Select)
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from metric import (d_ratio, has_event, max, source_count, CheckPmu, Event,
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JsonEncodeMetric, JsonEncodeMetricGroupDescriptions,
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Literal, LoadEvents, Metric, MetricConstraint, MetricGroup,
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MetricRef, Select)
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# Global command line arguments.
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_args = None
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@ -624,6 +625,68 @@ def IntelL2() -> Optional[MetricGroup]:
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], description="L2 data cache analysis")
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def IntelMissLat() -> Optional[MetricGroup]:
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try:
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ticks = Event("UNC_CHA_CLOCKTICKS", "UNC_C_CLOCKTICKS")
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data_rd_loc_occ = Event("UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_LOCAL",
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"UNC_CHA_TOR_OCCUPANCY.IA_MISS",
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"UNC_C_TOR_OCCUPANCY.MISS_LOCAL_OPCODE",
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"UNC_C_TOR_OCCUPANCY.MISS_OPCODE")
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data_rd_loc_ins = Event("UNC_CHA_TOR_INSERTS.IA_MISS_DRD_LOCAL",
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"UNC_CHA_TOR_INSERTS.IA_MISS",
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"UNC_C_TOR_INSERTS.MISS_LOCAL_OPCODE",
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"UNC_C_TOR_INSERTS.MISS_OPCODE")
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data_rd_rem_occ = Event("UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE",
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"UNC_CHA_TOR_OCCUPANCY.IA_MISS",
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"UNC_C_TOR_OCCUPANCY.MISS_REMOTE_OPCODE",
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"UNC_C_TOR_OCCUPANCY.NID_MISS_OPCODE")
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data_rd_rem_ins = Event("UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE",
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"UNC_CHA_TOR_INSERTS.IA_MISS",
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"UNC_C_TOR_INSERTS.MISS_REMOTE_OPCODE",
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"UNC_C_TOR_INSERTS.NID_MISS_OPCODE")
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except:
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return None
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if (data_rd_loc_occ.name == "UNC_C_TOR_OCCUPANCY.MISS_LOCAL_OPCODE" or
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data_rd_loc_occ.name == "UNC_C_TOR_OCCUPANCY.MISS_OPCODE"):
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data_rd = 0x182
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for e in [data_rd_loc_occ, data_rd_loc_ins, data_rd_rem_occ, data_rd_rem_ins]:
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e.name += f"/filter_opc={hex(data_rd)}/"
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elif data_rd_loc_occ.name == "UNC_CHA_TOR_OCCUPANCY.IA_MISS":
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# Demand Data Read - Full cache-line read requests from core for
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# lines to be cached in S or E, typically for data
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demand_data_rd = 0x202
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# LLC Prefetch Data - Uncore will first look up the line in the
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# LLC; for a cache hit, the LRU will be updated, on a miss, the
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# DRd will be initiated
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llc_prefetch_data = 0x25a
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local_filter = (f"/filter_opc0={hex(demand_data_rd)},"
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f"filter_opc1={hex(llc_prefetch_data)},"
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"filter_loc,filter_nm,filter_not_nm/")
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remote_filter = (f"/filter_opc0={hex(demand_data_rd)},"
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f"filter_opc1={hex(llc_prefetch_data)},"
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"filter_rem,filter_nm,filter_not_nm/")
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for e in [data_rd_loc_occ, data_rd_loc_ins]:
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e.name += local_filter
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for e in [data_rd_rem_occ, data_rd_rem_ins]:
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e.name += remote_filter
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else:
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assert data_rd_loc_occ.name == "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_LOCAL", data_rd_loc_occ
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ticks_per_cha = ticks / source_count(data_rd_loc_ins)
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loc_lat = interval_sec * 1e9 * data_rd_loc_occ / \
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(ticks_per_cha * data_rd_loc_ins)
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ticks_per_cha = ticks / source_count(data_rd_rem_ins)
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rem_lat = interval_sec * 1e9 * data_rd_rem_occ / \
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(ticks_per_cha * data_rd_rem_ins)
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return MetricGroup("lpm_miss_lat", [
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Metric("lpm_miss_lat_loc", "Local to a socket miss latency in nanoseconds",
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loc_lat, "ns"),
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Metric("lpm_miss_lat_rem", "Remote to a socket miss latency in nanoseconds",
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rem_lat, "ns"),
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])
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def IntelMlp() -> Optional[Metric]:
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try:
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l1d = Event("L1D_PEND_MISS.PENDING")
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@ -1005,6 +1068,7 @@ def main() -> None:
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IntelIlp(),
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IntelL2(),
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IntelLdSt(),
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IntelMissLat(),
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IntelMlp(),
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IntelPorts(),
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IntelSwpf(),
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