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arm64: dts: qcom: sm8750: Add SDC2 nodes for sm8750 soc

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Add SD Card host controller for sm8750 soc.

Signed-off-by: Sarthak Garg <sarthak.garg@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20251202081017.2234677-2-sarthak.garg@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
This commit is contained in:
Sarthak Garg 2025-12-02 13:40:15 +05:30 committed by Bjorn Andersson
parent fc4795cf96
commit 6e6cf8ff99
1 changed files with 54 additions and 0 deletions
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54
arch/arm64/boot/dts/qcom/sm8750.dtsi
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@ -2597,6 +2597,60 @@ data-pins {
};
};
sdhc_2: mmc@8804000 {
compatible = "qcom,sm8750-sdhci", "qcom,sdhci-msm-v5";
reg = <0x0 0x08804000 0x0 0x1000>;
interrupts = <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "hc_irq",
"pwr_irq";
clocks = <&gcc GCC_SDCC2_AHB_CLK>,
<&gcc GCC_SDCC2_APPS_CLK>,
<&rpmhcc RPMH_CXO_CLK>;
clock-names = "iface",
"core",
"xo";
interconnects = <&aggre2_noc MASTER_SDCC_2 QCOM_ICC_TAG_ALWAYS
&mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>,
<&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
&config_noc SLAVE_SDCC_2 QCOM_ICC_TAG_ACTIVE_ONLY>;
interconnect-names = "sdhc-ddr",
"cpu-sdhc";
power-domains = <&rpmhpd RPMHPD_CX>;
operating-points-v2 = <&sdhc2_opp_table>;
qcom,dll-config = <0x0007442c>;
qcom,ddr-config = <0x80040868>;
iommus = <&apps_smmu 0x540 0x0>;
dma-coherent;
bus-width = <4>;
max-sd-hs-hz = <37500000>;
resets = <&gcc GCC_SDCC2_BCR>;
status = "disabled";
sdhc2_opp_table: opp-table {
compatible = "operating-points-v2";
opp-100000000 {
opp-hz = /bits/ 64 <100000000>;
required-opps = <&rpmhpd_opp_low_svs>;
};
opp-202000000 {
opp-hz = /bits/ 64 <202000000>;
required-opps = <&rpmhpd_opp_svs_l1>;
};
};
};
usb_hsphy: phy@88e3000 {
compatible = "qcom,sm8750-m31-eusb2-phy";
reg = <0x0 0x88e3000 0x0 0x29c>;