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irqchip/renesas-rzg2l: Split EOI handler into separate IRQ and TINT functions
The common rzg2l_irqc_eoi() handler uses a conditional to determine whether
to clear an IRQ or an TINT interrupt.
Split this into two dedicated handlers, rzg2l_irqc_irq_eoi() and
rzg2l_irqc_tint_eoi(), each handling only their respective interrupt type
without the need for range checks.
While at it, simplify rzg2l_irqc_{irq,tint}_eoi() by replacing
raw_spin_lock locking/unlocking with scoped_guard().
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Signed-off-by: Thomas Gleixner <tglx@kernel.org>
Link: https://patch.msgid.link/20260325192451.172562-7-biju.das.jz@bp.renesas.com
This commit is contained in:
parent
4b11d14cac
commit
6e5e0331de
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@ -130,17 +130,25 @@ static void rzg2l_clear_tint_int(struct rzg2l_irqc_priv *priv, unsigned int hwir
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}
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}
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static void rzg2l_irqc_eoi(struct irq_data *d)
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static void rzg2l_irqc_irq_eoi(struct irq_data *d)
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{
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struct rzg2l_irqc_priv *priv = irq_data_to_priv(d);
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unsigned int hw_irq = irqd_to_hwirq(d);
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raw_spin_lock(&priv->lock);
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if (hw_irq >= IRQC_IRQ_START && hw_irq <= IRQC_IRQ_COUNT)
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scoped_guard(raw_spinlock, &priv->lock)
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rzg2l_clear_irq_int(priv, hw_irq);
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else if (hw_irq >= IRQC_TINT_START && hw_irq < IRQC_NUM_IRQ)
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irq_chip_eoi_parent(d);
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}
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static void rzg2l_irqc_tint_eoi(struct irq_data *d)
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{
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struct rzg2l_irqc_priv *priv = irq_data_to_priv(d);
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unsigned int hw_irq = irqd_to_hwirq(d);
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scoped_guard(raw_spinlock, &priv->lock)
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rzg2l_clear_tint_int(priv, hw_irq);
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raw_spin_unlock(&priv->lock);
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irq_chip_eoi_parent(d);
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}
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@ -438,7 +446,7 @@ static struct syscore rzg2l_irqc_syscore = {
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static const struct irq_chip rzg2l_irqc_irq_chip = {
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.name = "rzg2l-irqc",
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.irq_eoi = rzg2l_irqc_eoi,
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.irq_eoi = rzg2l_irqc_irq_eoi,
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.irq_mask = irq_chip_mask_parent,
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.irq_unmask = irq_chip_unmask_parent,
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.irq_disable = rzg2l_irqc_irq_disable,
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@ -455,7 +463,7 @@ static const struct irq_chip rzg2l_irqc_irq_chip = {
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static const struct irq_chip rzg2l_irqc_tint_chip = {
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.name = "rzg2l-irqc",
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.irq_eoi = rzg2l_irqc_eoi,
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.irq_eoi = rzg2l_irqc_tint_eoi,
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.irq_mask = irq_chip_mask_parent,
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.irq_unmask = irq_chip_unmask_parent,
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.irq_disable = rzg2l_irqc_irq_disable,
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@ -472,7 +480,7 @@ static const struct irq_chip rzg2l_irqc_tint_chip = {
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static const struct irq_chip rzfive_irqc_irq_chip = {
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.name = "rzfive-irqc",
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.irq_eoi = rzg2l_irqc_eoi,
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.irq_eoi = rzg2l_irqc_irq_eoi,
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.irq_mask = rzfive_irqc_mask,
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.irq_unmask = rzfive_irqc_unmask,
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.irq_disable = rzfive_irqc_irq_disable,
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@ -489,7 +497,7 @@ static const struct irq_chip rzfive_irqc_irq_chip = {
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static const struct irq_chip rzfive_irqc_tint_chip = {
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.name = "rzfive-irqc",
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.irq_eoi = rzg2l_irqc_eoi,
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.irq_eoi = rzg2l_irqc_tint_eoi,
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.irq_mask = rzfive_irqc_mask,
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.irq_unmask = rzfive_irqc_unmask,
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.irq_disable = rzfive_irqc_irq_disable,
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